JP2021129121A - Light irradiation device - Google Patents

Abstract

To provide a light irradiation device with higher luminance than before.SOLUTION: A semiconductor light-emitting element in a light irradiation device includes a substrate, a semiconductor layer formed on an upper layer of the substrate and including an n-type or p-type first semiconductor layer, an active layer, and a second semiconductor layer with a conductivity different from that of the first semiconductor layer, a light absorption electrode electrically connected to the first semiconductor layer or the second semiconductor layer and formed of a material absorbing light with the same wavelength as the light emitted from the active layer, and a reflection layer formed on an upper layer of a light extraction surface formed by any of a surface of the substrate on the opposite side of the semiconductor layers and a surface of the semiconductor layers on the opposite side of the substrate at a position opposite to the light absorption electrode in a direction orthogonal to the surface of the substrate and formed of a material that reflects light with the same wavelength as the light emitted from the active layer.SELECTED DRAWING: Figure 1A

Description

The present invention relates to a light irradiation device.

In recent years, the use of a light irradiation device using a solid-state light source element such as an LED instead of a discharge lamp has been expanding. In such a light irradiation device, a light source unit is configured by using, for example, a plurality of LED elements.

The discharge lamp has a high luminous intensity per light source area, and high brightness is realized. On the other hand, a solid-state light source element such as an LED has a problem that the brightness is lower than that of a discharge lamp, and it is difficult to increase the brightness in principle because of surface emission.

For example, Patent Document 1 below discloses a technique for increasing the brightness when a discharge lamp is used. This discharge lamp is provided with an elliptical reflector on the back side of the light source body, the light source body is arranged at the first focal point of the elliptical reflector, and the light is focused on the second focal point side. A spherical reflector is provided on the front side of the light source body, and the light emitted in front of the light source body is returned to the bright spot again through the spherical reflector. With such a configuration, all the light from the light source body is collected at the second focal point through the elliptical reflector, whereby all the emitted light can be collected within the same viewing angle, and high brightness can be realized.

Japanese Unexamined Patent Publication No. 6-250288

However, when the light source is a solid-state light source element such as an LED element, the method of Patent Document 1 cannot be adopted for surface emission. An object of the present invention is to realize a light irradiation device including a semiconductor light emitting element and having a higher brightness than the conventional one.

The light irradiation device according to the present invention includes a semiconductor light emitting device.
The semiconductor light emitting device is
With the board
A semiconductor layer formed on the upper layer of the substrate, including an n-type or p-side first semiconductor layer, an active layer, and a second semiconductor layer having a conductive type different from that of the first semiconductor layer.
A light absorbing electrode electrically connected to the first semiconductor layer and made of a material that absorbs light having the same wavelength as the light emitted from the active layer.
Light extraction composed of either a surface of the surface of the substrate opposite to the semiconductor layer or a surface of the surface of the semiconductor layer located on the side opposite to the substrate. It is made of a material that reflects light having the same wavelength as the light emitted from the active layer, which is an upper layer of the surface and is formed at a position facing the light absorbing electrode in a direction orthogonal to the surface of the substrate. It includes a reflective layer.
The light irradiation device is further arranged so as to surround an axis orthogonal to the light extraction surface of the semiconductor light emitting element, and is a mirror for returning a part of the light emitted from the light extraction surface to the reflection layer. It has a part.

A semiconductor light emitting device requires an electrode for supplying an electric current to the semiconductor layer. The electrode that is electrically connected to the first semiconductor layer is selected from the viewpoints of reduction of contact resistance, stability of the material, and the like. However, many such materials absorb light having the same wavelength as the light emitted from the active layer. As an example, such an electrode is used as Au or an alloy containing Au. Such an electrode that absorbs light having the same wavelength as the light emitted from the active layer is referred to as a "light absorption electrode" in the present specification.

In a semiconductor light emitting device having a light absorbing electrode, a region of the light extraction surface in which the light absorbing electrode is formed at a position facing the direction orthogonal to the surface is a non-light emitting region. Therefore, in the conventional light emitting element, the entire light extraction surface cannot be made to emit light.

By the way, a semiconductor light emitting device is used in combination with various optical systems for guiding light to a target application in which the emitted light is housed in a predetermined case. Therefore, when the semiconductor light emitting device is used in a normal state, a part of the light emitted from the active layer is reflected by these cases and the surface of the optical system. This reflected light constitutes a return light guided to the light extraction surface side of the semiconductor light emitting element.

In the semiconductor light emitting device having the above configuration, a reflection layer is formed at a position which is an upper layer of the light extraction surface and faces the light absorption electrode in a direction orthogonal to the surface of the substrate. Therefore, when a part of the return light is incident on a portion forming a non-light emitting region in the conventional light emitting element, it is reflected by the reflective layer and emitted from the element again. That is, in the conventional light emitting element, the portion forming the non-light emitting region constitutes the light emitting region. As a result, a light emitting element having a higher brightness than the conventional one is realized.

By the way, in the field of semiconductor light emitting devices, a configuration having a reflecting electrode is known at a position closer to the active layer than the light extraction surface, that is, in an internal region of the light emitting device. Even when such a configuration is adopted, when the return light is generated, the light can be guided in the extraction direction by reflecting it by the reflective electrode, so that the same effect as the above can be obtained. Seem. However, in the case of such a configuration, since the non-light emitting region still exists on the light extraction surface side, the effect of improving the brightness on the light emitting surface is low. Further, in order to reflect the light on the surface of the reflective electrode, the return light is guided from the light extraction surface to the reflective electrode via the semiconductor layer, then reflected on the surface of the reflective electrode, and then the reverse of the above. It is necessary to take out through the same optical path in the same direction, and light absorption may occur in this process.

According to the configuration of the present invention, since the reflection layer is provided on the upper layer of the light extraction surface, the non-light emitting region can be changed to the light emitting region, and the return light is absorbed by the time it is extracted again. The amount of light is lower than that of the configuration provided with the above-mentioned reflective electrode. As a result, a light emitting element having a higher brightness than the conventional one is realized.

Here, the reflective layer formed on the upper layer of the light extraction surface may be arranged so as to have a shape that is rotationally asymmetric with respect to the direction parallel to the light extraction surface. According to such a configuration, a part of the light emitted from the region of the light extraction surface at a position not facing the light absorbing electrode in the direction orthogonal to the surface of the substrate is directed to the substrate with respect to the light absorbing electrode. It becomes easy to return to the position facing the direction orthogonal to the plane of the above, that is, the position where the reflective layer is formed. As a result, the effect of increasing the brightness is improved.

The reflective layer is preferably made of a material having a reflectance of 40% or more with respect to light having the same wavelength as the light emitted from the active layer. Further, the reflectance is more preferably 60% or more, and further preferably 90% or more.

For example, when the wavelength of the light emitted from the active layer is in the ultraviolet region of 410 nm or less, the reflective layer may be at least one of Al, Ag, Cu, Ni, Pt, Rh, Cr and Co. It can be composed of a material containing. The material constituting the reflective layer can be appropriately selected according to the wavelength band of the light emitted from the active layer.

The semiconductor light emitting device may be configured to include a first protective layer formed on the upper layer of the reflective layer and made of a material that transmits light emitted from the active layer.

With such a configuration, the reflective surface of the reflective layer is prevented from being exposed to the atmosphere, so that the material constituting the reflective layer is less likely to be oxidized or sulfurized, and the reflectance is suppressed from decreasing over time. Will be done. Further, according to this configuration, it becomes possible to use a material having relatively low stability (such as an alloy containing Ag) as the reflective layer, and the degree of freedom in material selection is increased.

The light extraction surface is composed of a surface of the first semiconductor layer located on the side opposite to the substrate.
The light absorption electrode may be formed on the upper layer of the first semiconductor layer. In this case, the semiconductor light emitting device may be configured to include a reflective electrode formed in contact with the surface of the second semiconductor layer on the side opposite to the active layer.

As a result, in the so-called vertical structure semiconductor light emitting device, the brightness can be increased as compared with the conventional case.

The light absorption electrode may be formed by extending a plurality of the light absorption electrodes in the upper layer of the first semiconductor layer in a direction parallel to the surface of the substrate. In this case, it is preferable that the reflective layer formed on the upper layer of the light extraction surface has a shape that is rotationally asymmetric with respect to the direction parallel to the light extraction surface.

The semiconductor light emitting device may include a second protective layer made of a material that transmits light emitted from the active layer between the first semiconductor layer and the light absorbing electrode.

When the light absorbing electrode is made of a material having low stability, the electrode material may diffuse (for example, migrate) to the reflective layer and reduce the reflectance of the reflective layer. According to the above configuration, since the diffusion of the electrode material toward the reflective layer side is suppressed, it is possible to prevent the reflectance of the reflective layer from decreasing with time.

The light extraction surface is composed of a surface of the substrate that is located on the side opposite to the semiconductor layer.
The semiconductor layer has a first region in which the first semiconductor layer, the active layer, and the second semiconductor layer are laminated, and the active layer and the second semiconductor layer in a direction parallel to the surface of the substrate. Has a second region in which the first semiconductor layer is formed without
The light absorption electrode may be composed of a first electrode electrically connected to the first semiconductor layer in the second region.

As a result, in a semiconductor light emitting device having a so-called flip chip structure, the brightness can be increased as compared with the conventional case.

When the light extraction surface is composed of a surface of the substrate that is located on the side opposite to the semiconductor layer.
A reflective electrode formed in contact with a surface of the second semiconductor layer opposite to the active layer,
It has at least a recess that penetrates the first semiconductor layer and the active layer and reaches the second semiconductor layer.
The light absorbing electrode is formed so as to be inserted into the recess and come into contact with the first semiconductor layer while maintaining an insulating state between the active layer, the first semiconductor layer, and the reflecting electrode. It does not matter if it is.

Further, the light extraction surface may be composed of a surface of the surface of the first semiconductor layer located on the side opposite to the substrate. In this case
The semiconductor light emitting device is
A reflective electrode formed in contact with a surface of the second semiconductor layer opposite to the active layer,
It has at least a recess that penetrates the first semiconductor layer and the active layer and reaches the second semiconductor layer.
The light absorbing electrode is formed so as to be inserted into the recess and come into contact with the first semiconductor layer while maintaining an insulating state between the active layer, the first semiconductor layer, and the reflecting electrode. It does not matter if it is.

As a result, in a semiconductor light emitting device having a so-called via type structure, the brightness can be increased as compared with the conventional case.

According to the present invention, a semiconductor light emitting device having increased brightness is realized.

It is sectional drawing which shows typically the structure of the semiconductor light emitting element of 1st Embodiment. It is a top view when the semiconductor light emitting element of 1st Embodiment is seen from the light extraction surface side. It is a top view when the semiconductor light emitting element of 1st Embodiment is seen from the light extraction surface side. It is a drawing which shows typically an example of the light source part including a semiconductor light emitting element. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 1st Embodiment. It is sectional drawing which shows typically another structure of the semiconductor light emitting device of 1st Embodiment. It is sectional drawing which shows typically another structure of the semiconductor light emitting device of 1st Embodiment. It is sectional drawing which shows typically another structure of the semiconductor light emitting device of 1st Embodiment. It is sectional drawing which shows typically another structure of the semiconductor light emitting device of 1st Embodiment. It is sectional drawing which shows typically another structure of the semiconductor light emitting device of 1st Embodiment. It is sectional drawing which shows typically another structure of the semiconductor light emitting device of 1st Embodiment. It is a top view when another structure of the semiconductor light emitting element of 1st Embodiment is seen from the light extraction surface side. It is sectional drawing which shows typically the structure of the semiconductor light emitting element of 2nd Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 2nd Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 2nd Embodiment. It is a drawing which shows typically the structure of the semiconductor light emitting element of 3rd Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 3rd Embodiment. It is sectional drawing which shows typically one step in the manufacturing method of the semiconductor light emitting element of 3rd Embodiment. It is a drawing which shows typically another structure of the semiconductor light emitting device of 3rd Embodiment.

The semiconductor light emitting device of the present invention will be described with reference to the drawings. In each figure, the dimensional ratio in the drawing and the actual dimensional ratio do not always match. The dimensions such as manufacturing conditions and film thickness described below are merely examples, and are not limited to these values.

In the present specification, the description of "AlGaN" _{is synonymous with the description of Al m} Ga _1-m N (0 <m <1), and the description of the composition ratio of Al and Ga is simply omitted. Therefore, it is not intended to be limited to the case where the composition ratio of Al and Ga is 1: 1. The same applies to the description of "InGaN" and the like.

In the present specification, "a layer X1 is formed on an upper layer of another layer X2" means that the layer X2 is formed in direct contact with the layer X1 as well as the layer X2 is another layer X3. It is intended to include the case where it is formed in contact with the layer X1 via. Further, the above description is intended to include a configuration in which the layer X2 is located above the layer X1 by rotating the element.

(First Embodiment)
The first embodiment of the semiconductor light emitting device will be described.

[structure]
FIG. 1A is a cross-sectional view schematically showing the configuration of the first embodiment of the semiconductor light emitting device of the present invention. The semiconductor light emitting device 1 includes a substrate 3, a semiconductor layer 5 formed on the upper layer of the substrate 3, a first electrode 15, a second electrode 13, and a reflection layer 31. In the following, the semiconductor light emitting device 1 may be simply abbreviated as "light emitting element 1" as appropriate.

FIG. 1B is a plan view of the semiconductor light emitting device 1 when viewed from the light extraction surface side. However, for convenience of explanation, the illustration of the reflective layer 31 is omitted. FIG. 1A corresponds to a cross-sectional view taken along the line X1-X1 in FIG. 1B. In the following, the light extraction plane is defined as the XY plane, and the direction orthogonal to the XY plane is defined as the Z direction.

Hereinafter, the structure of the light emitting element 1 will be described in detail.

(Board 3)
The substrate 3 is composed of, for example, a conductive substrate such as CuW, W, or Mo, or a semiconductor substrate such as Si.

(Semiconductor layer 5)
In the present embodiment, the semiconductor layer 5 is formed by laminating the p-type semiconductor layer 11, the active layer 9, and the n-type semiconductor layer 7 in this order from the side closer to the substrate 3. In the present embodiment, the n-type semiconductor layer 7 corresponds to the "first semiconductor layer", and the p-type semiconductor layer 11 corresponds to the "second semiconductor layer".

The p-type semiconductor layer 11 is composed of a nitride semiconductor layer doped with p-type impurities such as Mg, Be, Zn, and C. As the nitride semiconductor layer, for example, GaN, AlGaN, AlInGaN and the like can be used.

The active layer 9 is composed of, for example, a semiconductor layer in which a light emitting layer made of InGaN and a barrier layer made of n-type AlGaN are periodically repeated. These layers may be undoped, p-type or n-type doped. The active layer 9 may be formed by laminating layers made of at least two types of materials having different energy band gaps. The constituent material of the active layer 9 is appropriately selected according to the wavelength of the light to be generated. In the light emitting element 1 of the present embodiment, the main light emitting wavelength in the active layer 9 can be 410 nm or less. For example, when the main emission wavelength is 365 nm, the active layer 9 is composed of In _0.05 Ga _0.95 N and Al _0.09 Ga _0.91 N repeatedly laminated.

The n-type semiconductor layer 7 is composed of a nitride semiconductor layer doped with n-type impurities such as Si, Ge, S, Se, Sn, or Te. As the nitride semiconductor layer, for example, GaN, AlGaN, AlInGaN and the like can be used. The concentration of n-type impurities in the n-type semiconductor layer 7 is set to, for example, about 3 × 10 ¹⁹ / cm ³ . The n-type impurity concentration of the n-type semiconductor layer 7 ^{is preferably 1 × 10 18} / cm ³ or more, more preferably 1 × 10 ¹⁹ / cm ³ or more, and 3 × 10 ¹⁹ / cm ³ or more. It is even more preferable to have it.

The n-type semiconductor layer 7 may be made of a material having a composition different from that of the p-type semiconductor layer 11. In the light emitting element 1 of the present embodiment, the n-type semiconductor layer 7 constitutes the light extraction surface 28a.

(First electrode 15)
The first electrode 15 is formed in contact with the surface of the semiconductor layer 5 on the side farther from the substrate 3. More specifically, the first electrode 15 is formed in contact with the surface of the n-type semiconductor layer 7.

In the present embodiment, the first electrode 15 constitutes an electrode on the n side. The first electrode 15 is composed of, for example, a multilayer structure of Ni / Al / Ni / Ti / Au, Cr / Au, Ti / Pt / Au, Ti / Pt / Cr / Au / Cr / Pt / Au, and the like. be able to. The first electrode 15 is preferably a material capable of forming ohmic contact with the n-type semiconductor layer 7 and having a low contact resistance, and more preferably a chemically stable material. As such a material, as described above, an alloy containing Au is suitable.

However, when light having a wavelength of, for example, 410 nm or less is emitted from the active layer 9, such a metal material has extremely low reflectance to light in this wavelength band and absorbs most of the incident light. That is, the first electrode 15 constitutes a “light absorption electrode”.

By the way, in the present embodiment, as shown in FIG. 1B, the first electrode 15 shows a frame shape when viewed in the Z direction (direction orthogonal to the surface of the substrate 3). More specifically, the outer edge portion of the first electrode 15 has a frame shape along the outer edge portion of the semiconductor layer 5. The light emitting element 1 shown in FIG. 1A has two first electrodes extending in the Y direction at two locations inside the outer edge portion of the first electrode 15 showing the frame shape, at positions separated from the outer edge portion in the X direction. It has an electrode 15. However, the number of stretched first electrodes 15 inside the region showing the frame shape is not limited to two, and may be one or three or more. The shape of the first electrode 15 shown in FIG. 1B is merely an example, and can be arbitrarily changed according to the design.

The first electrode 15 is configured to include a current supply unit 15a to which the current supply line 14 is connected at a part. The current supply unit 15a shows a wider region as compared with other regions of the first electrode 15. The current supply line 14 is made of, for example, Au, Cu, or the like. The end of the current supply line 14 opposite to the end to which the current supply unit 15a is connected is connected to, for example, a power supply pattern of a package substrate.

(Second electrode 13)
The second electrode 13 is formed in contact with the p-type semiconductor layer 11, and ohmic contact is formed with the p-type semiconductor layer 11. In the present embodiment, the second electrode 13 constitutes the p-side electrode. When a voltage is applied between the first electrode 15 and the second electrode 13, a current flows through the active layer 9 and the active layer 9 emits light.

The second electrode 13 is preferably made of a conductive material having a high reflectance (for example, 80% or more, more preferably 90% or more) with respect to the light emitted from the active layer 9. More specifically, the second electrode 13 is made of a material containing, for example, Ag, Al, or Rh. The light emitting element 1 shown in FIG. 1A is assumed to extract the light emitted from the active layer 9 to the n-type semiconductor layer 7. Since the second electrode 13 is made of a material showing high reflectance, the light radiated from the active layer 9 toward the substrate 3 side is reflected toward the n-type semiconductor layer 7, so that the light extraction efficiency is improved. Can be enhanced. At this time, the second electrode 13 constitutes a “reflection electrode”.

Unlike the second electrode 13, it is difficult to select a conductive material that exhibits high reflectance for the light (light of the same wavelength) emitted from the active layer 9 for the first electrode 15. This is because the range of selection of the material that can realize ohmic contact with the n-type semiconductor layer 7 is narrower than that of the material that can realize ohmic contact with the p-type semiconductor layer 11.

(Conductive layer 20)
The conductive layer 20 is formed on the upper layer of the substrate 3. In the present embodiment, the conductive layer 20 is composed of a multilayer structure of a protective layer 23, a bonding layer 21, a bonding layer 19, and a protective layer 17.

The bonding layer 19 and the bonding layer 21 are composed of, for example, Au-Sn, Au-In, Au-Cu-Sn, Cu-Sn, Pd-Sn, Sn and the like. As will be described later, in these bonding layers 19 and 21, the bonding layer 21 formed on the substrate 3 and the bonding layer 19 formed on another substrate (growth substrate 25 described later) are opposed to each other. Later, it was formed by pasting both together. These bonding layers 19 and 21 may be integrated as a single layer.

The protective layer 17 is composed of a multilayer structure such as Ni / Ti / Pt and TiW / Pt, and the material constituting the bonding layer (19, 21) is diffused to the second electrode 13 side to form the second electrode. It is provided for the purpose of suppressing a decrease in the reflectance of 13. However, it is arbitrary whether or not the light emitting element 1 includes the protective layer 17.

The protective layer 23 is made of the same material as the protective layer 17, for example, and is provided for the purpose of suppressing the material constituting the bonding layer (19, 21) from diffusing toward the substrate 3. However, it is arbitrary whether or not the light emitting element 1 includes the protective layer 23.

(Current cutoff layer 24)
The light emitting element 1 of the present embodiment includes a current cutoff layer 24 formed so as to be in contact with the second electrode 13 at a position facing the first electrode 15 in the Z direction. The current cutoff layer 24 is composed of, for example, SiO _2, SiN, Zr ₂ O ₃ , Al N, Al ₂ O _{3 and the} like. The current cutoff layer 24 plays a role of spreading the current flowing through the active layer 9 in a direction parallel to the XY plane. However, it is arbitrary whether or not the light emitting element 1 includes the current cutoff layer 24.

(Reflective layer 31)
The light emitting element 1 of the present embodiment includes a reflective layer 31 on the upper layer of the first electrode 15. The reflective layer 31 is made of a material that exhibits high reflectance with respect to light having the same wavelength as the light emitted from the active layer 9. As an example, when light having a wavelength of, for example, 410 nm or less is emitted from the active layer 9, the reflective layer 31 contains at least one of Al, Ag, Cu, Ni, Pt, Rh, Cr, and Co. It can be composed of a material, and is particularly preferably composed of a material containing Al or Ag.

When the light emitting element 1 does not include the reflective layer 31, that is, when it has a structure as shown in the plan view of FIG. 1B, the region where the first electrode 15 constituting the light absorbing electrode is formed is non-light emitting. Make up the area. However, as described above, the reflective layer 31 is formed on the upper layer of the first electrode 15. FIG. 1C schematically shows a plan view of the configuration of the light emitting element 1 when viewed from the light extraction surface, including the reflection layer 31. According to such a configuration, a part of the return light of the light emitted from the light extraction surface 28a of the light emitting element 1 is incident on the reflection layer 31, is re-reflected by the reflection layer 31 and guided in the extraction direction. ..

FIG. 2 is a drawing schematically showing an example of a light source unit including a light emitting element 1. The light source unit 40 has a mirror unit 41 so as to surround the axis with a direction orthogonal to the light extraction surface of the light emitting element 1 as an axis. The light emitted from the light emitting element 1 is emitted from the light emitting surface 42 of the light source unit 40.

Here, a part of the light L1 emitted from the light extraction surface 28a of the light emitting element 1 is reflected by the mirror portion 41, and a part of the reflected light L1'is incident on the region 28b. Since the reflective layer 31 is formed in this region 28b, it is reflected by the reflective layer 31 and guided to the light emitting surface 42. When the reflective layer 31 is not formed, the region 28b constitutes a non-light emitting region, but according to the light emitting element 1 of the present embodiment, the region 28b also constitutes a light emitting region, so that the brightness is higher than before. Be done.

Although the light source unit 40 in FIG. 2 is configured to include the mirror unit 41, it does not necessarily have to include the mirror unit 41. That is, the light source device including the light emitting element 1 usually includes various optical systems in order to utilize the light emitted from the light emitting element 1. When incident on such an optical system, some light is inevitably reflected. When a part of the reflected light is guided as return light toward the region 28b, it is reflected by the reflection layer 31 formed in the region 28b. Therefore, the region 28b can be set as a light emitting region, and a high-luminance light emitting element is realized.

[Production method]
Hereinafter, an example of a method for manufacturing the semiconductor light emitting device 1 will be described with reference to FIGS. 3A to 3H and FIGS. 1A.

(Step S1)
First, as shown in FIG. 3A, the growth substrate 25 is prepared. As the growth substrate 25, a sapphire substrate having a C surface can be used as an example.

As a preparatory step, the growth substrate 25 is cleaned. As a more specific example of this cleaning, a growth substrate 25 is placed in a processing furnace of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and a predetermined flow rate of hydrogen gas is provided in the processing furnace. It is carried out by raising the temperature in the furnace to, for example, 1150 ° C.

(Step S2)
As shown in FIG. 3B, the base layer 27, the n-type semiconductor layer 7, the active layer 9, and the p-type semiconductor layer 11 are formed in this order on the upper layer of the growth substrate 25. This step S2 is performed, for example, in the following procedure.

First, the pressure inside the furnace of the МОCVD apparatus is set to 100 kPa, and the temperature inside the furnace is set to 480 ° C. Then, while flowing nitrogen gas and hydrogen gas having a flow rate of 5 slm as carrier gases in the processing furnace, trimethylgallium (TMG) having a flow rate of 50 μmol / min and ammonia having a flow rate of 250,000 μmol / min are used as raw material gases in the processing furnace. Is supplied for 68 seconds. As a result, a low temperature buffer layer made of GaN having a thickness of 20 nm is formed on the surface of the growth substrate 25.

Next, the temperature inside the MOCVD apparatus is raised to 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as carrier gas in the processing furnace, TMG having a flow rate of 100 μmol / min and ammonia having a flow rate of 250,000 μmol / min are used as raw material gas in the processing furnace. Supply in for 30 minutes. As a result, a buffer layer made of GaN having a thickness of 1.7 μm is formed on the surface of the low temperature buffer layer. The base layer 27 is formed by these buffer layers.

Next, the n-type semiconductor layer 7 is formed on the upper layer of the base layer 27. A specific method for forming the n-type semiconductor layer 7 is as follows, for example.

Subsequently, the pressure inside the MOCVD apparatus is set to 30 kPa while the temperature inside the furnace is set to 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as carrier gases in the processing furnace, TMG having a flow rate of 94 μmol / min and trimethylaluminum (TMA) having a flow rate of 6 μmol / min were used as raw material gases. A ammonia having a flow rate of 250,000 μmol / min and a tetraethylsilane having a flow rate of 0.013 μmol / min for doping n-type impurities are supplied into the processing furnace for 60 minutes. As a result, for example, _{an n-type semiconductor layer 7 having a composition of Al 0.06} Ga _0.94 N, a thickness of 2 μm, and an n-type impurity concentration of 3 × 10 ¹⁹ / cm ³ is formed on the upper layer of the third semiconductor layer 28. When the n-type semiconductor layer 7 is composed of GaN or AlGaN, the composition ratio of Al is preferably 0% or more and 15% or less, more preferably 2% or more and 11% or less, and 5% or more. Even more preferably, it is 9% or less.

After that, by stopping the supply of TMA and supplying other raw material gas for 6 seconds, a protective layer made of n-type GaN having a thickness of about 5 nm is provided on the upper layer of the n-type AlGaN layer. The n-type semiconductor layer 7 may be realized.

In the above description, the case where the n-type impurity contained in the n-type semiconductor layer 7 is Si has been described, but as the n-type impurity, Ge, S, Se, Sn, Te, or the like can be used in addition to Si. ..

Next, the active layer 9 is formed on the upper layer of the n-type semiconductor layer 7. The specific method for forming the active layer 9 is as follows, for example.

First, the pressure inside the MOCVD apparatus is set to 100 kPa, and the temperature inside the furnace is set to 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as carrier gases in the processing furnace, TMG having a flow rate of 10 μmol / min and trimethylindium (TMI) having a flow rate of 12 μmol / min are used as raw material gases. A step of supplying ammonia having a flow rate of 300,000 μmol / min into the processing furnace for 48 seconds is performed. Then, a step of supplying TMG having a flow rate of 10 μmol / min, TMA having a flow rate of 1.6 μmol / min, tetraethylsilane having a flow rate of 0.002 μmol / min, and ammonia having a flow rate of 300,000 μmol / min into the processing furnace for 120 seconds is performed. Hereinafter, by repeating these two steps, the active layer 9 formed by laminating a light emitting layer made of InGaN having a thickness of 2 nm and a barrier layer made of n-type AlGaN having a thickness of 7 nm for 15 cycles is formed as an n-type semiconductor layer. It is formed on the upper layer of 7.

When the wavelength of the light emitted from the active layer 9 is 410 nm or less, the In composition ratio of InGaN constituting the light emitting layer is preferably 10% or less. In this case, the Al composition ratio of GaN or AlGaN constituting the barrier layer is preferably 0% or more and 15% or less, more preferably 2% or more and 13% or less, and 5% or more and 10% or less. Is even more preferable.

Next, the p-type semiconductor layer 11 is formed on the upper layer of the active layer 9. A specific method for forming the p-type semiconductor layer 11 is as follows, for example.

Specifically, the pressure inside the MOCVD apparatus is maintained at 100 kPa, and the temperature inside the furnace is raised to 1025 ° C. while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm as carrier gases in the processing furnace. do. Then, as the raw material gas, TMG having a flow rate of 35 μmol / min, TMA having a flow rate of 20 μmol / min, ammonia having a flow rate of 250,000 μmol / min, and biscyclopenta having a flow rate of 0.1 μmol / min for doping p-type impurities. Dienyl magnesium (Cp ₂ Mg) is supplied into the processing furnace for 60 seconds. As a result, a hole supply layer having _{a thickness of 20 nm and a composition of Al 0.3} Ga _0.7 N is formed on the surface of the active layer 33. Then, the flow rate of TMA is changed to 4 μmol / min and the raw material gas is supplied for 360 seconds to form a hole supply layer having _{a thickness of 120 nm and a composition of Al 0.13} Ga _{0.87 N.} The p-type semiconductor layer 11 is formed by these hole supply layers. The concentration of p-type impurities in these hole supply layers is set to, for example, about 3 × 10 ¹⁹ / cm ³ / cm ³ .

After this step, the supply of TMA is stopped, _{the flow rate of Cp 2} Mg is changed to 0.2 μmol / min, and the raw material gas is supplied for 20 seconds, so that the thickness is about 5 nm and the p-type impurity concentration is high. The p-type semiconductor layer 11 having a p-type GaN layer having a value of about 1 × 10 ²⁰ / cm ^{3 may be realized.}

In the above description, the case where the p-type impurity contained in the p-type semiconductor layer 11 is Mg has been described, but as the p-type impurity, Be, Zn, C or the like can be used in addition to Mg.

(Step S3)
The wafer obtained in step S2 is activated. As a specific example, an RTA (Rapid Thermal Anneal) apparatus is used to perform activation treatment at 650 ° C. for 15 minutes in a nitrogen atmosphere.

(Step S4)
As shown in FIG. 3C, the current cutoff layer 24 is formed on the upper surface of a predetermined region of the p-type semiconductor layer 11. The current cutoff layer 24 is formed by, for example, _{forming a film of SiO 2} , SiN, Zr ₂ O ₃ , Al N, Al ₂ O ₃ , or the like by a sputtering method or the like. In this step S4, the current cutoff layer 24 is formed at a position facing the Z direction with respect to the region where the first electrode 15 is to be formed in the later step S12.

(Step S5)
Next, as shown in FIG. 3C, the second electrode 13 is formed on the upper surface of a predetermined region of the p-type semiconductor layer 11. Here, the second electrode 13 is also formed on the upper surface of the current blocking layer 24, but the shape of the second electrode 13 is arbitrarily selected. The second electrode 13 is formed by, for example, forming a Ni / Ag film with a sputtering apparatus and then performing contact annealing in a dry air atmosphere using an RTA apparatus. Here, as an example, an alloy of Ni and Ag is mentioned as the material of the second electrode 13, but an alloy of Al, Rh, Ag, Pd and Cu or the like can also be used. As described above, as the material of the second electrode 13, it is preferable to use a material having a high reflectance to the light emitted from the active layer 9.

(Step S6)
Next, as shown in FIG. 3C, the protective layer 17 is formed on the upper surface of the second electrode 13, and the bonding layer 19 is formed on the upper surface of the protective layer 17.

The protective layer 17 is formed by, for example, using an electron beam vapor deposition apparatus (EB apparatus) to form Ni having a film thickness of 80 nm, Ti having a film thickness of 100 nm, and Pt having a film thickness of 200 nm. As the material of the protective layer 17, TiW / Pt or the like can be used in addition to Ni / Ti / Pt.

Then, Ti with a film thickness of 10 nm is vapor-deposited on the upper surface of the protective layer 17, and then Au-Sn solder composed of Au 80% Sn 20% is vapor-deposited with a film thickness of 3 μm to form the bonding layer 19. As the bonding layer 19, in addition to Au-Sn solder, Au-In, Au-Cu-Sn, Cu-Sn, Pd-Sn, Sn and the like can be used.

(Step S7)
As shown in FIG. 3D, the protective layer 23 and the bonding layer 21 are formed on the upper surface of the substrate 3 prepared separately from the growth substrate 25. As the substrate 3, as described above, a conductive substrate such as CuW, W, Mo, or a semiconductor substrate such as Si can be used. The protective layer 23 can be formed in the same manner as the protective layer 17, and the bonding layer 21 can be formed in the same manner as the bonding layer 19. Whether or not the protective layer 23 is provided is optional.

(Step S8)
As shown in FIG. 3E, the growth substrate 25 and the substrate 3 are bonded by bonding the bonding layer 19 formed on the upper layer of the growth substrate 25 and the bonding layer 21 formed on the upper layer of the substrate 3. As a specific example, the bonding process is performed at a temperature of 280 ° C. and a pressure of 0.2 MPa.

By this step, the bonding layer 19 and the bonding layer 21 are melted and bonded to form a structure in which the substrate 3 and the growth substrate 25 are bonded to the front and back surfaces. That is, the bonding layer 19 and the bonding layer 21 may be integrated after this step. Since the protective layer 23 and the protective layer 17 are formed before the execution of this step S8, the diffusion of the constituent materials of the bonding layers (19, 21) is suppressed.

(Step S9)
As shown in FIG. 3F, the growth substrate 25 is peeled off. More specifically, the laser beam is irradiated from the growth substrate 25 side. Here, the laser light to be irradiated is set to light having a wavelength that allows the light to pass through the constituent material (sapphire in the present embodiment) of the growth substrate 25 and be absorbed by the constituent material (GaN in the present embodiment) of the base layer 27. .. As a result, the laser beam is absorbed by the base layer 27, so that the interface between the growth substrate 25 and the base layer 27 becomes high in temperature, GaN is decomposed, and the growth substrate 25 is peeled off.

(Step S10)
After removing the metal Ga remaining on the wafer with hydrochloric acid or the like, the GaN (base layer 27) is removed by dry etching using an ICP device to expose the n-type semiconductor layer 7 (see FIG. 3G). ..

(Step S11)
As shown in FIG. 3H, adjacent elements are separated from each other. Specifically, the semiconductor layer 5 is etched by using an ICP device with respect to the boundary region with the adjacent element until the upper surface of the current blocking layer 24 formed in the element separation region is exposed. At this time, the current cutoff layer 24 functions as an etching stopper layer. In FIG. 3H, the side surface of the semiconductor layer 5 is shown to be inclined with respect to the vertical direction, but this is an example and is not intended to be limited to such a shape.

(Step S12)
As shown in FIG. 1A, the first electrode 15 is formed at a position of the upper surface of the n-type semiconductor layer 7 facing the current blocking layer 24 in the Z direction. Specifically, in a state in which a non-target region forming the first electrode 15 of the surface of the n-type semiconductor layer 7 is masked with a resist or the like, for example, Ni / Al / Ni / Ti by an electron beam deposition apparatus, for example. A conductive material made of / Au is deposited with a film thickness of about 3 μm. Then, the mask is peeled off.

(Step S13)
As shown in FIG. 1A, the reflective layer 31 is formed on the upper surface of the first electrode 15. Specifically, in a state where the upper surface of the n-type semiconductor layer 7 constituting the current supply unit 15a and the light extraction surface 28a is masked with a resist or the like, for example, Al is formed on the upper surface of the first electrode 15 with a film thickness of about 10 nm to 1 μm. Evaporate. Then, the mask is peeled off.

The reflective layer 31 may be coated with a material layer by a sputtering method. According to this method, the reflective layer 31 is formed without using a mask. According to this method, by adjusting the particle size of the material to be sprayed, the reflective layer 31 having a diffuse reflection surface is formed, so that the reflectance can be further increased.

(Later process)
Divide the wafer into chip units. As a specific example, each element is separated from each other by, for example, a laser dicing device.

After that, the back surface of the substrate 3 is joined to the package with, for example, Ag paste, and the current supply line 14 is connected to the current supply unit 15a. For example, wire bonding is performed by connecting a current supply line 14 of Φ100 μm made of Au to the current supply unit 15a with a load of 50 g. As a result, the light emitting element 1 is formed.

[Separate configuration]
Hereinafter, another configuration example of the light emitting element 1 of the present embodiment will be described.

<1> A protective layer 32 may be provided on the upper layer of the reflective layer 31 (see FIG. 4A). FIG. 4A is an enlarged view of the vicinity of the first electrode 15. The protective layer 32 is made of a material having a property of transmitting light having the same wavelength as the light emitted from the active layer 9, and for example, SiO _2, SiN, Zr ₂ O ₃ , ZrO ₂ , HfO ₂ , Hf ₂ It is composed of O ₃ , AlN, Al ₂ O _{3, and the like.} The protective layer 32 corresponds to the "first protective layer". According to this configuration, since the upper surface of the reflective layer 31 is protected, the material constituting the reflective layer 31 is less likely to be oxidized or sulfurized, and the decrease in reflectance with time is suppressed.

As shown in FIG. 4B, fine irregularities may be formed on the surface of the protective layer 32. With such a configuration, the extraction efficiency of the return light L1'reflected on the surface of the reflective layer 31 is enhanced.

Further, as shown in FIG. 4C, the protective layer 32 may be formed so as to cover the upper surface and the side surface of the reflective layer 31. With such a configuration, the effect of preventing the reflectance of the reflective layer 31 from decreasing with time is further enhanced. Although the protective layer 32 is configured to cover the outer surface of the first electrode 15 in FIG. 4C, it may be configured to cover only the upper surface and the outer surface of the reflective layer 31.

<2> A protective layer 34 may be provided between the reflective layer 31 and the first electrode 15 (see FIG. 4D). Unlike the protective layer 32, the protective layer 34 does not necessarily have to have the property of transmitting light having the same wavelength as the light emitted from the active layer 9. The protective layer 34 is composed of, for example, SiO _2, SiN, Zr ₂ O ₃ , ZrO ₂ , HfO ₂ , Hf ₂ O ₃ , AlN, Al ₂ O _{3, and the} like. The protective layer 34 corresponds to the "second protective layer".

When the first electrode 15 is made of a material having low stability, the electrode material of the first electrode 15 may diffuse to the reflective layer and reduce the reflectance of the reflective layer 31. According to the above configuration, the material of the first electrode 15 is less likely to be diffused toward the reflective layer 31, and the reflectance of the reflective layer 31 can be prevented from decreasing with time.

A configuration combined with another configuration example <1> may be adopted (see, for example, FIGS. 4E and 4F).

<3> As shown in FIG. 5, the reflective layer 31 formed on the light emitting element 1 may be arranged rotationally asymmetrically when viewed from the direction orthogonal to the light extraction surface (Z direction). When the light extraction surface 28a is arranged at a position rotationally symmetric when viewed from the Z direction, the light extraction surface 28a of the return light L1'reflected at a predetermined location after being emitted from the light extraction surface 28a is again. The rate of being returned to is increasing. As shown in FIG. 5, by arranging the light extraction surface 28a rotationally asymmetrically when viewed from the Z direction, that is, by arranging the reflective layer 31 rotationally asymmetrically when viewed from the Z direction, the reflective layer of the return light L1'is arranged. The amount of light returned to 31 can be increased. As a result, the brightness of the light emitting element 1 is further increased.

According to the embodiment, when the reflective layer 31 is arranged in a predetermined shape to be rotationally asymmetric when viewed from the Z direction, as compared with the case where the reflective layer 31 is arranged completely rotationally symmetric when viewed from the Z direction. It was confirmed that the amount of light from the light emitting element 1 was improved by 3%.

<4> The upper surface of the n-type semiconductor layer 7 may be subjected to uneven processing. Thereby, the light extraction efficiency can be further improved. As an example, after step S11, the n-type semiconductor layer 7 can be subjected to unevenness processing by immersing it in a predetermined alkaline solution such as KOH and performing wet etching.

<5> In the above configuration, among the layers constituting the semiconductor layer 5, the side closer to the substrate 3 is referred to as the p-type semiconductor layer 11, and the side far from the substrate 3 is referred to as the n-type semiconductor layer 7. May be reversed.

(Second Embodiment)
A second embodiment of the semiconductor light emitting device will be described. The same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

[structure]
FIG. 6 is a cross-sectional view schematically showing the configuration of the second embodiment of the semiconductor light emitting device of the present invention. The light emitting element 1 includes a substrate 25, a semiconductor layer 5 formed on the upper layer of the substrate 25, a first electrode 15, a second electrode 13, and a reflection layer 31. The light emitting element 1 shown in FIG. 5 has a so-called "flip chip" type structure, and a light extraction surface 28a is formed on a surface of the substrate 25 opposite to the semiconductor layer 5. There is.

In the light emitting device 1 of the present embodiment, the semiconductor layer 5 includes a region in which the n-type semiconductor layer 7, the active layer 9, and the p-type semiconductor layer 11 are laminated (corresponding to the “first region”) and the active layer 9. And a region having an n-type semiconductor layer 7 without having a p-type semiconductor layer 11 (corresponding to a “second region”). The first electrode 15 is formed in contact with the n-type semiconductor layer 7 located in the second region. The first electrode 15 is made of a metal material containing, for example, Au, and constitutes a "light absorption electrode" as in the first embodiment. The second electrode 13 is formed in contact with the p-type semiconductor layer 11 located in the first region, and is made of a material that exhibits high reflectance to the light emitted from the active layer 9. preferable.

The first electrode 15 is communicated with the bonding electrode 54 via the pad electrode 52. The second electrode 13 is in contact with the bonding electrode 53 via the pad electrode 51. These bonding electrodes (53, 54) are electrically connected to the mounting substrate 55.

In the light emitting element 1 of the present embodiment, the reflection layer 31 is formed on the light extraction surface side in the region 28b facing the first electrode 15 in the direction orthogonal to the substrate 25. If the reflective layer 31 is not present, the region 28b constitutes a non-light emitting region. However, also in the light emitting element 1 of the present embodiment, the return light of a part of the light emitted from the light extraction surface 28a is re-reflected by the reflection layer 31 and guided in the extraction direction, so that the region 28b is the light emitting region. Can be. As a result, the brightness is increased as compared with the conventional case.

[Production method]
Hereinafter, an example of the method for manufacturing the light emitting element 1 of the present embodiment will be described with reference to FIGS. 7A to 7B and FIG.

Steps S1 to S3 are executed in the same manner as in the first embodiment.

(Step S21)
As shown in FIG. 7A, the p-type semiconductor layer 11 and the active layer 9 formed in a part of the region are removed by dry etching using an ICP device to expose the n-type semiconductor layer 7.

(Step S22)
As shown in FIG. 7B, the first electrode 15 is formed on the upper surface of the exposed n-type semiconductor layer 7, and the second electrode 13 is formed on the upper surface of the p-type semiconductor layer 11. The first electrode 15 can be formed, for example, in the same manner as in step S12. The second electrode 13 can be formed, for example, in the same manner as in step S5.

(Step S23)
The reflection layer 31 is formed in the predetermined region 28b described above among the surfaces of the substrate 25 located on the side opposite to the semiconductor layer 5. The reflective layer 31 can be formed, for example, in the same manner as in step S13.

(Later process)
A pad electrode 52 is formed on the upper surface of the first electrode 15, and a pad electrode 51 is formed on the upper surface of the second electrode 13. After that, the pad electrode 52 and the mounting substrate 55 are connected by the bonding electrode 54, and the pad electrode 51 and the mounting substrate 55 are connected by the bonding electrode 53. As a result, the light emitting element 1 shown in FIG. 6 is formed.

[Separate configuration]
In the above configuration, among the layers constituting the semiconductor layer 5, the side closer to the substrate 25 is referred to as the n-type semiconductor layer 7, and the side far from the substrate 25 is referred to as the p-type semiconductor layer 11. However, these conductive types are inverted. It doesn't matter. Further, also in the present embodiment, as described with reference to FIGS. 4A to 4D, the protective layer 32 (first protective layer) may be provided so as to cover the surface of the reflective layer 31.

(Third Embodiment)
A third embodiment of the semiconductor light emitting device will be described. The same components as those in the first embodiment are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

[structure]
FIG. 8 is a drawing schematically showing the configuration of the third embodiment of the semiconductor light emitting device of the present invention. In FIG. 8, (a) corresponds to a plan view and (b) corresponds to a cross-sectional view. The light emitting element 1 includes a substrate 25, a semiconductor layer 5 formed on the upper layer of the substrate 25, a first electrode 15, a second electrode 13, and a reflection layer 31. The light emitting element 1 shown in FIG. 8 has a so-called “via” type structure, and a light extraction surface 28a is formed on a surface of the substrate 25 opposite to the semiconductor layer 5. ..

In the light emitting device 1 of the present embodiment, the semiconductor layer 5 includes a region in which the n-type semiconductor layer 7, the active layer 9, and the p-type semiconductor layer 11 are laminated (corresponding to the “first region”) and the active layer 9. And a region having an n-type semiconductor layer 7 without having a p-type semiconductor layer 11 (corresponding to a “second region”). The second region is configured to be surrounded by the first region. More specifically, the semiconductor layer 5 has a recess that penetrates the p-type semiconductor layer 11 and the active layer 9 and reaches the n-type semiconductor layer 7. Then, the first electrode 15 is arranged so as to be inserted into the recess. Similar to the first embodiment, the first electrode 15 is made of a metal material containing Au or the like, and constitutes a “light absorption electrode”. The light emitting element 1 has an insulating layer 58, and the insulating property between the first electrode 15 and the p-type semiconductor layer 11, the active layer 9, and the second electrode 13 is ensured.

The light emitting element 1 of the present embodiment has a second electrode 13 arranged in contact with the upper surface of the p-type semiconductor layer 11. Similar to the first embodiment, the second electrode 13 is preferably made of a material that exhibits high reflectance with respect to the light emitted from the active layer 9. In this case, the second electrode 13 is ". It constitutes a "reflecting electrode".

In the light emitting element 1 of the present embodiment, the reflection layer 31 is formed on the light extraction surface side in the region 28b facing the first electrode 15 in the direction orthogonal to the substrate 25. As described above in the first embodiment, if the reflective layer 31 is not present, the region 28b constitutes a non-light emitting region. However, also in the light emitting element 1 of the present embodiment, the return light of a part of the light emitted from the light extraction surface 28a is re-reflected by the reflection layer 31 and guided in the extraction direction, so that the region 28b is the light emitting region. Can be. As a result, the brightness is increased as compared with the conventional case.

[Production method]
Hereinafter, an example of the method for manufacturing the light emitting element 1 of the present embodiment will be described with reference to FIGS. 9A to 9B and FIG.

Steps S1 to S3 are executed in the same manner as in the first embodiment.

(Step S31)
As shown in FIG. 9A, the second electrode 13 is formed at a predetermined position on the upper surface of the p-type semiconductor layer 11. Specifically, the second electrode 13 is selectively formed on the upper surface of the p-type semiconductor layer 11 other than one or more island-shaped regions. The wafer that has passed through step S31 has an island-shaped exposed region of the p-type semiconductor layer 11 and an exposed region of the second electrode 13 on the upper surface. The second electrode 13 can be formed, for example, in the same manner as in step S5.

(Step S32)
As shown in FIG. 9B, the surface of the p-type semiconductor layer 11 exposed through step S31 is etched to expose the upper surface of the n-type semiconductor layer 7. As a result, a recess is formed that penetrates the p-type semiconductor layer 11 and the active layer 9 and reaches the n-type semiconductor layer 7. After that, the insulating layer 58 is formed so as to cover the inner surface of the recess. As the insulating layer 58, SiO _2, SiN, Zr ₂ O ₃ , AlN, Al ₂ O _{3 and the} like can be used.

(Step S33)
A conductive material is formed to form the first electrode 15 so as to fill the recesses. The first electrode 15 can be formed, for example, in the same manner as in step S12.

(Step S34)
The reflective layer 31 is formed in a region of the substrate 25 that is located on the opposite side of the semiconductor layer 5 and that faces the first electrode 15 in the direction orthogonal to the substrate 25. The reflective layer 31 can be formed, for example, in the same manner as in step S13.

(Later process)
A protective layer 56 and a bonding layer 57 are formed on the upper surfaces of the exposed first electrode 15 and the second electrode 13, and the mounting substrate 55 is bonded via the bonding layer 57 (see FIG. 8). As a specific example, a protective layer 56 is formed by forming Ti and Pt in three cycles with an electron beam vapor deposition apparatus (EB apparatus), and then Ti is formed on the upper surface (Pt surface) of the protective layer 56. And Au-Sn solder is vapor-deposited to form the bonding layer 57. Then, the mounting substrate 55 for applying a voltage to each electrode (13, 15) is bonded via the bonding layer 57. As the mounting substrate 55, a conductive substrate such as CuW, W, Mo, a semiconductor substrate such as Si, or an insulating substrate such as AlN provided with a wiring pattern can be used.

[Separate configuration]
Hereinafter, another configuration example of the light emitting element 1 of the present embodiment will be described.

<1> As shown in FIG. 10, it is also possible to adopt a configuration in which the substrate 25 is peeled off. In this case, the n-type semiconductor layer 7 constitutes the light extraction surface, and the reflection layer 31 is arranged at a position on the surface of the n-type semiconductor layer corresponding to the direction orthogonal to the light extraction surface with respect to the first electrode 15. Will be done. Even with this configuration, since the return light of a part of the light emitted from the light extraction surface 28a is re-reflected by the reflection layer 31 and guided in the extraction direction, the region 28b can be set as the light emitting region. As a result, the brightness is increased as compared with the conventional case.

When manufacturing the light emitting element 1 shown in FIG. 10, for example, it can be manufactured by the following method. After executing step S33, the mounting substrate 55 is joined via the protective layer 56 and the joining layer 57 by the method described above. Then, for example, the growth substrate 25 and the base layer 27 are removed by the same method as in steps S9 to S10. Then, the reflection layer 31 is formed at a position of the exposed n-type semiconductor layer 7 facing the first electrode 15 in the direction orthogonal to the light extraction surface.

<2> In the above configuration, among the layers constituting the semiconductor layer 5, the side closer to the mounting substrate 55 is referred to as the p-type semiconductor layer 11, and the side far from the mounting substrate 55 is referred to as the n-type semiconductor layer 7. The conductive type may be inverted. Further, also in the present embodiment, as described with reference to FIGS. 4A to 4D, the protective layer 32 (first protective layer) may be provided so as to cover the surface of the reflective layer 31.

1: Semiconductor light emitting element 3: Substrate 5: Semiconductor layer 7: n-type semiconductor layer 9: Active layer 11: p-type semiconductor layer 13: Second electrode 14: Current supply line 15: First electrode 15a: Current supply unit 17: Protective layer 19: Bonding layer 20: Conductive layer 21: Bonding layer 23: Protective layer 24: Current blocking layer 25: Growth substrate 27: Underlayer layer 28a: Light extraction surface 28b: Region 31: Reflective layer 32: Protective layer (first) Protective layer)
34: Protective layer (second protective layer)
40: Light source unit 41: Mirror unit 42: Light emitting surface 51, 52: Pad electrode 53, 54: Bonding electrode 55: Mounting substrate 56: Protective layer 57: Bonding layer 58: Insulating layer

Claims (8)

A light irradiation device including a semiconductor light emitting element.
The semiconductor light emitting device is
With the board
It contains an n-type or p-side first semiconductor layer, an active layer, and a second semiconductor layer having a conductive type different from that of the first semiconductor layer, which are formed on the upper layer of the substrate, and are in order from the side closer to the substrate. A semiconductor layer formed by laminating the second semiconductor layer, the active layer, and the first semiconductor layer in this order,
A light absorbing electrode that comes into contact with the first semiconductor layer on the surface opposite to the active layer and contains Au or an Au alloy.
An upper layer of a light extraction surface formed of a surface of the semiconductor layer opposite to the substrate, and from the substrate rather than the light absorption electrode in a direction orthogonal to the surface of the substrate. A reflective layer formed only at a distant position and made of a material having a reflectance of 40% or more with respect to light having the same wavelength as the light emitted from the active layer.
A reflective electrode formed in contact with the surface of the second semiconductor layer opposite to the active layer is provided.
The light irradiation device is further arranged so as to surround an axis orthogonal to the light extraction surface of the semiconductor light emitting element, and is a mirror for returning a part of the light emitted from the light extraction surface to the reflection layer. A light irradiation device characterized by having a part. The light irradiation device according to claim 1, wherein the reflective layer constitutes a diffuse reflection surface with respect to the light returned from the mirror portion. The light according to claim 1 or 2, wherein the semiconductor light emitting device includes a first protective layer formed on an upper layer of the reflective layer and made of a material that transmits light emitted from the active layer. Irradiation device. The method according to any one of claims 1 to 3, wherein the light absorbing electrode is formed by extending a plurality of the light absorbing electrodes in the upper layer of the first semiconductor layer in a direction parallel to the surface of the substrate. Light irradiation device. The light irradiation device according to claim 4, wherein the reflective layer is formed by extending a plurality of the upper layer of the first semiconductor layer in a direction parallel to the surface of the substrate. The light irradiation device according to claim 5, wherein the reflective layer has a frame shape when viewed from a direction orthogonal to the surface of the substrate. Claim 1 is characterized in that the semiconductor light emitting device includes a second protective layer made of a material that transmits light emitted from the active layer between the first semiconductor layer and the light absorbing electrode. 6. The light irradiation device according to any one of 6. The light irradiation device according to any one of claims 1 to 7, wherein the active layer is made of a nitride semiconductor material having a main emission wavelength of 410 nm or less.

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