JP2021101520A - Operational amplifier - Google Patents

Abstract

To provide an operational amplifier in which the occurrence of an output phase inversion phenomenon is prevented and a deterioration in input-referred noise voltage characteristics is prevented.SOLUTION: An operational amplifier includes: an input differential circuit including transistors Q1 and Q2, a first load, a second load and a current source I1; an intermediate circuit including a transistor Q3 with the base that is connected to the collector of the transistor Q1 and a transistor Q4 with the base that is connected to the collector of the transistor Q2; a diode D1 connected between a non-inverting input terminal 1 and the emitter of the transistor Q4; a diode D2 connected between an inverting input terminal 2 and the emitter of the transistor Q3; and an output differential circuit 6 outputting a voltage according to the difference between the emitter voltages of the transistors Q3 and Q4.SELECTED DRAWING: Figure 1

Description

The present invention relates to an operational amplifier using a bipolar transistor.

In an operational amplifier, when the input voltage greatly exceeds the power supply voltage on the collector side of the bipolar input transistor, the output voltage changes due to the current passing through the parasitic diode between the base and collector of the input transistor, and the output voltage changes. Causes an output phase inversion phenomenon in which is out of phase with the input voltage.

FIG. 2 shows an operational amplifier without measures to prevent such an output phase inversion phenomenon. 1 is a forward rotation input terminal, 2 is an inverting input terminal, 3 is an output terminal, 4 is a power supply terminal having a voltage of Vcc, 5 is a ground terminal, and 6 is an output differential circuit.

Q1 and Q2 are NPN transistors that form an input differential circuit in which the emitter is commonly connected to the current source I1, the base is connected to the forward rotation input terminal 1 and the inverting input terminal 2, and between the collector and the power supply terminal 4. Resistors R1 and R2 as loads are connected, respectively. The resistance values of the resistors R1 and R2 are the same. Dbc1 is a parasitic diode between the base and collector of the transistor Q1, and Dbc2 is a parasitic diode between the base and collector of the transistor Q2. Output differential circuit 6 outputs the voltage V _-IN appearing at the collectors of the transistors Q1, Q2, the voltage corresponding to the difference between V + _IN to the output terminal 3.

ここで、Ｉ_CQ1はトランジスタＱ１のコレクタ電流、Ｉ_CQ2はトランジスタＱ２のコレクタ電流である。 In the operational amplifier of FIG. 2, when a voltage for normal operation of the transistors Q1 and Q2 is applied to the forward rotation input terminal 1 and the inverting input terminal 2, the input voltage V _{+ IN of the normal rotation input terminal 61 of the output differential circuit 6} , The input voltage V- _IN of the inverting input terminal 62 is given by Eqs. (1) and (2), respectively.

Here, I _CQ1 the collector current of the transistor Q1, I _CQ2 is the collector current of the transistor Q2.

When a voltage Vcc / 2 is applied to the forward rotation input terminal 1 and the inverting input terminal 2, if the current of the current source I1 is I1, the same collector current (= I1 / 2) flows through the transistors Q1 and Q2, and the same resistance. The same current flows through the values R1 and R2. Therefore, the input voltage V _{+ IN} of the output differential circuit 6, V _-IN is the same voltage.

となる。 Here, for example, when the applied voltage of the forward rotation input terminal 1 is increased, the collector current of the transistor Q1 increases and the collector current of the transistor Q2 decreases. The amount of increase in the collector current of the transistor Q1 and the amount of decrease in the collector current of the transistor Q2 are equal. When the variation in the current at this time is [Delta] it, the input voltage V _{+ IN} of the output differential circuit 6, V _-IN is

It becomes.

Thus, V + _IN> V _-IN and the voltage at the output terminal 3 of the output differential circuit 6 is increased. This operation is a normal operation as the operational amplifier of FIG.

Ｖ_INPは正転入力端子１の電圧である。Ｖ_Dbc1は寄生ダイオードＤbc1にかかる電圧であり、０．７Ｖ程度である。 However, the applied voltage of the non-inverting input terminal 1 rises and becomes higher than the power supply voltage Vcc, by a parasitic diode Dbc1 transistor Q1 is turned on, the input voltage V _-IN an expression of the output differential circuit 6 It changes as in (6).

V INP is the voltage of the _{forward rotation input terminal 1.} V _Dbc1 is a voltage applied to the parasitic diode Dbc1 and is about 0.7V.

ここで

となるまで正転入力端子１の電圧Ｖ_INPが上昇すると、Ｖ_+IN＜Ｖ_-INとなり、出力差動回路６の出力端子３の電圧が低下する方向に働いてしまう。これが出力位相反転現象である。 On the other hand, when the transistor Q2 is turned off, its collector current I _CQ2 becomes zero, and the input voltage V _{+ IN} of the output differential circuit 6 changes as shown in equation (7).

here

When the voltage V _{INP of the forward rotation} input terminal 1 rises until it becomes, V _{+ IN} <V-IN, and the voltage of the output terminal 3 of the output differential circuit 6 works in the direction of falling. This is the output phase inversion phenomenon.

Therefore, as an operational amplifier with measures to prevent the output phase inversion phenomenon without using a diode with a large area, resistors R5 and R6 are connected in series to the bases of the input transistors Q1 and Q2, respectively, as shown in FIG. There is a configuration in which a diode D4 is connected between the transfer input terminal 1 and the collector of the transistor Q2, and a diode D5 is connected between the inverting input terminal 2 and the collector of the transistor Q1 (Patent Document 1).

In the operational amplifier of FIG. 3, for example, when the voltage of the forward rotation input terminal 1 becomes higher than the power supply voltage Vcc, it is generated by the current flowing to the power supply terminal 4 via the normal rotation input terminal 1 → the diode D4 → the resistor R2. input voltage V _{+ iN} which is the non-inverting input terminal 1 → resistor R5 → parasitic diode DBC1 → as via a resistor R1 is higher than the voltage V _-IN generated by the current flowing through the power supply terminal 4, the resistor R5 by setting the value, it is possible to V + _iN> V _-IN, it is possible to prevent the occurrence of output phase inversion in this case.

Further, when the voltage of the inverting input terminal 2 becomes higher than the power supply voltage Vcc, the voltage V- _IN generated by the current flowing to the power supply terminal 4 via the inverting input terminal 2 → diode D5 → resistor R1 is inverting input. By setting the value of the resistor R6 so that it is higher than _{the voltage V + IN} generated by the current flowing to the power supply terminal 4 via the terminal 2 → resistor R6 → parasitic diode Dbc2 → resistor R2 _{, V + IN} < Since it can be set to V- _IN , it is possible to prevent the occurrence of the output phase inversion phenomenon at this time.

Japanese Unexamined Patent Publication No. 2010-28311

However, in the operational amplifier shown in FIG. 3, a resistor R5 for dividing the excessive voltage input to the forward rotation input terminal 1 with the resistor R1 is connected in series to the base of the transistor Q1 and is input to the inverting input terminal 2. Since it is necessary to connect the resistor R6 for dividing the voltage with the resistor R2 in series with the base of the transistor Q2, those resistors R5 and R6 are always connected, and even during normal operation, those resistors R5 and R6 are connected. There is a problem that the input conversion noise voltage characteristic of the entire operational amplifier is deteriorated by the thermal noise generated by R6.

An object of the present invention is to provide an operational amplifier that prevents the occurrence of an output phase inversion phenomenon and prevents deterioration of the input conversion noise voltage characteristics of the entire operational amplifier.

In order to achieve the above object, the invention according to claim 1 is a bipolar first conductive type first transistor in which a base is connected to a first input terminal and a collector is connected to a first power supply terminal via a first load. , The bipolar first conductive type second transistor whose base is connected to the second input terminal and the collector is connected to the first power supply terminal via the second load, the emitter and the second power supply of the first and second transistors. An input differential circuit including a first current source connected between the terminals and the collector voltage of the second transistor are input to the third input terminal, and the collector voltage of the first transistor is input to the fourth input terminal. In an arithmetic amplifier including an output differential circuit, a bipolar first conductive type third transistor in which a base is connected to a collector of the first transistor and an emitter is connected to the fourth input terminal, and a base is the second transistor. An intermediate circuit including a bipolar first conductive type fourth transistor connected to a collector of a transistor and an emitter connected to the third input terminal was connected between the first input terminal and the emitter of the fourth transistor. It is characterized by further including a first diode and a second diode connected between the second input terminal and the emitter of the third transistor.

The invention according to claim 2 is characterized in that, in the operational amplifier according to claim 1, a third diode is connected between the collectors of the third and fourth transistors and the first power supply terminal. ..

The invention according to claim 3 comprises a bipolar second conductive type fifth transistor inserted and connected between the emitter of the third transistor and the fourth input terminal in the operational amplifier according to claim 1 or 2. A bipolar second conductive type sixth transistor inserted and connected between the emitter of the fourth transistor and the third input terminal is further provided, and a common voltage is applied to the bases of the fifth and sixth transistors. It is characterized by that.

According to the fourth aspect of the present invention, in the operational amplifier according to the third aspect, the common voltage is such that the first and second diodes do not turn on during normal operation, and the first power supply terminal is connected to the first input terminal. The first diode is turned on when a voltage equal to or higher than the voltage of the above is applied, and the second diode is turned on when a voltage equal to or higher than the voltage of the first power supply terminal is applied to the second input terminal. The voltage is set to control the 5th and 6th transistors.

According to the present invention, when a voltage equal to or higher than the power supply voltage is input to the first input terminal or the second input terminal, the voltage generated by the current passing through the first or second diode is directly one of the output differential circuits. The voltage generated by the current passing through the parasitic diode of the 1st or 2nd transistor of the input differential circuit is lower by the voltage between the base and emitter of the 3rd or 4th transistor of the intermediate circuit. Since the voltage is input to the other input terminal of the output differential circuit, it is possible to prevent the occurrence of the output phase inversion phenomenon. Further, since it is not necessary to connect a resistor in series to the bases of the first and second transistors, it is possible to obtain an operational amplifier having the same input conversion noise voltage characteristics as when the output phase inversion phenomenon prevention measure is not taken. ..

It is a circuit diagram of the operational amplifier of the Example of this invention. It is a circuit diagram of a conventional operational amplifier. It is a circuit diagram of the conventional operational amplifier which took measures to prevent the output phase inversion phenomenon. FIG. 5 is a waveform diagram showing a simulation result of an output voltage when a sine wave having an amplitude equal to or higher than the power supply voltage is input to one of the input terminals by applying feedback that becomes a 1x closed loop to the operational amplifier of FIG. FIG. 5 is a waveform diagram showing a simulation result of an output voltage when a sine wave having an amplitude equal to or higher than the power supply voltage is input to one of the input terminals by applying feedback that becomes a 1x closed loop to the operational amplifier of FIG.

FIG. 1 shows a circuit of an embodiment of the operational amplifier of the present invention. 1 is a forward rotation input terminal (first input terminal of the claim), 2 is an inverting input terminal (second input terminal of the claim), 3 is an output terminal, 4 is a power supply terminal of voltage Vcc, 5 is a ground terminal, 6 Is an output differential circuit, 61 is a forward rotation input terminal (the third input terminal of the claim) of the output differential circuit, and 62 is an inverting input terminal (the fourth input terminal of the claim).

Q1 and Q2 are NPN transistors that form an input differential circuit in which the emitter is commonly connected to the current source I1, the base is connected to the forward rotation input terminal 1 and the inverting input terminal 2, and between the collector and the power supply terminal 4. Resistors R1 and R2 as loads are connected, respectively. The resistance values of the resistors R1 and R2 are the same. Dbc1 is a parasitic diode between the base and collector of the transistor Q1, and Dbc2 is a parasitic diode between the base and collector of the transistor Q2.

Q3 and Q4 are NPN transistors in which the collector is commonly connected to the diode D3 to form an intermediate circuit, the base is connected to the collector of the transistors Q1 and Q2, and the emitter is the PNP transistors Q5 and Q6 and the resistors R3 and R4 as loads. It is connected to the ground terminal 5 via. The resistance values of the resistors R3 and R4 are the same. Transistors Q5 and Q6 are transistors forming a buffer circuit, and a fixed voltage Va is applied to the base. D1 is a diode connected between the forward rotation input terminal 1 and the emitter of the transistor Q4, and D2 is a diode connected between the inverting input terminal 2 and the emitter of the transistor Q3. Output differential circuit 6 outputs emitter voltage of the transistor Q3, Q4, i.e. the voltage V _-IN generated in the resistor R3, R4, a voltage corresponding to the difference between the V + _IN from the output terminal 3.

従って、Ｖ_BQ3＜Ｖ_BQ4となる。 Here, in the input voltage range in which the transistors Q1 and Q2 operate normally, the collector current of the transistor Q1 and the collector current of the transistor Q2 when a high voltage is applied to the forward rotation input terminal 1 and a low voltage is applied to the inverting input terminal 2. _Assuming that the fluctuation of the collector current is ΔI, the base voltages V BQ3 and V _BQ4 of the transistors Q3 and Q4 are represented by the equations (9) and (10), respectively.

Therefore, V _BQ3 <V _BQ4 .

となり、Ｖ_EQ3＜Ｖ_EQ4となる。 Further, the emitter voltages V _EQ3 and V _EQ4 of the transistors Q3 and Q4 are voltages that are _{lower than} the base voltages V BQ3 and V _BQ4 of the transistors Q3 and Q4 by the voltage between the base and the emitter. When the base-emitter voltage of the transistor Q3 is V _BEQ3 and the base-emitter voltage of the transistor Q4 is V _BEQ4 , if V _BEQ3 ≒ V _BEQ4 ≒ V _BE , the emitter voltages V _EQ3 and V _EQ4 are

Then, V _EQ3 <V _EQ4 .

Since the magnitude relationship between the emitter voltages V _EQ3 and V _EQ4 is directly applied to the forward rotation input terminal 61 and the inverting input terminal 62 of the output differential circuit 6 via the transistors Q5 and Q6, V _{+ IN} > V _-IN Therefore, the voltage of the output terminal 3 of the output differential circuit 6 works in an increasing direction. The above is the normal operation of the operational amplifier of FIG.

となる。トランジスタＱ３のエミッタ電圧Ｖ_EQ3は式（１１）と同様であるので、

となる。 Here, when the voltage V _INP of the forward rotation input terminal 1 rises until the parasitic diode Dbc1 is turned on, the base voltage V _BQ3 of the transistor Q3 becomes.

It becomes. Since the emitter voltage V _EQ3 of the transistor Q3 is the same as that in the equation (11),

It becomes.

となる。 On the other hand, since the diode D1 is turned on, the emitter voltage V _EQ4 of the transistor Q4 is assumed that the voltage applied to the diode D1 is V _D1 .

It becomes.

Therefore, assuming that the forward voltage of each diode is almost equal and V _Dbc1 ≒ V _D1 , from equations (14) and (15), the voltage V _EQ3 is lower than the voltage V _{EQ 4} by the voltage V _BE. V _EQ3 <V _EQ4 . From this, similarly to the normal operation, V + _IN> V _-IN next, to work in the direction voltage is to increase the output terminal 3 of the output differential circuit 6, output phase inversion does not occur.

Also, if the applied voltage V _INN of the inverting input terminal 2 is a parasitic diode Dbc2 rises to turn on the contrary to the above, the voltage V _EQ4 becomes voltage V _BE amount corresponding voltage lower than the voltage V _EQ3, V _EQ3> It becomes V _EQ4. From this, similarly to the normal operation, since V + _IN <V _-IN, and the voltage of the output terminal 3 outputs a differential circuit 6 acting in the direction to decrease the output phase inversion does not occur.

The diode D3 protects the transistor Q4 from destruction when a voltage higher than the power supply voltage Vcc is applied to the emitter of the transistor Q4 from the forward rotation input terminal 1 via the diode D1 and also protects the transistor Q4 from destruction. When a voltage higher than the power supply voltage Vcc is applied from the inverting input terminal 2 via the diode D2, the transistor Q3 is protected from destruction.

Since a fixed voltage Va is applied to the base of the buffer circuit composed of the transistors Q5 and Q6, by appropriately setting the value of this voltage Va, the diodes D1 and D2 are subjected to an excess voltage at the input terminals 1 and 2. It can be turned on only when applied and turned off during normal operation.

FIG. 4 shows a simulation result of an output voltage when a sine wave having an amplitude equal to or higher than the power supply voltage is input to the input by applying feedback that becomes a 1x closed loop to the conventional operational amplifier of FIG. In FIG. 4, it can be seen that the output phase inversion phenomenon occurs when the input voltage exceeds the upper power supply voltage Vcc, and the output voltage is significantly reduced.

FIG. 5 shows the result of the same simulation with the operational amplifier of this embodiment of FIG. In FIG. 5, it can be seen that the output voltage does not decrease even when the power supply voltage Vcc is exceeded, and the output phase inversion phenomenon is suppressed.

As described above, in this embodiment, when a voltage exceeding the power supply voltage Vcc is applied to the forward rotation input terminal 1, the normal rotation input terminal 1 → the parasitic diode Dbc1 → between the base and emitter of the transistor Q3 → the transistor Q5. _{Between the emitter and collector → The voltage V-IN} generated by the current flowing to the ground terminal 5 via the resistor R3 is the forward rotation input terminal 1 → the diode D1 → between the emitter and collector of the transistor Q6 → grounded via the resistor R4. than the voltage V _{+ iN} generated by the current flowing through the terminal 5, that is lower by V _BE3 minutes, V + _iN> V _-IN, and the output phase inversion of the voltage at the output terminal 3 of the output differential circuit 6 Be prevented.

When a voltage exceeding the power supply voltage Vcc is applied to the inverting input terminal 2, the inverting input terminal 2 → the parasitic diode Dbc2 → between the base and emitter of the transistor Q4 → between the emitter and collector of the transistor Q6 → via the resistor R4. voltage voltage V _{+ iN} generated by the current flowing to the ground terminal 5 is generated by the current flowing through the ground terminal 5 via the emitter-collector → resistor R3 of the inverting input terminal 2 → the diode D2 → the transistor Q5 Te V _- than _iN, that lower only V _BE4 minutes, V + _iN <V _-IN, and the output phase inversion of the voltage at the output terminal 3 of the output differential circuit 6 is prevented.

That is, since the functions of the resistors R5 and R6 in FIG. 3 are _{realized by the base-emitter voltages V BE3} and V _BE4 of the transistors Q3 and Q4, it is not necessary to use the resistors R5 and R6, and the input conversion noise voltage characteristic. There is no problem of deterioration.

In FIG. 1, the collectors of the transistors Q3 and Q4 are commonly connected and the protection diode D3 is connected to the power supply terminal 4, but the collectors of the transistors Q3 and Q4 are separated from each other. A protective diode may be individually connected between the collector and the power supply terminal 4.

1: Forward rotation input terminal (1st input terminal) 2: Inverted input terminal (2nd input terminal) 3: Output terminal 4: Power supply terminal 5: Ground terminal, 6: Output differential circuit, 61: Positive Input terminal (3rd input terminal), 62: Inverted input terminal (4th input terminal)
Q1, Q2, Q3, Q4: NPN transistor Q5, Q6: PNP transistor R1, R2, R3, R4, R5, R6: Resistance D1, D2, D3, D4, D5: Diode Dbc1: Between base and collector of transistor Q1 Parasitic diode Dbc2: Parasitic diode between the base and collector of transistor Q2

Claims (4)

The base is connected to the first input terminal and the collector is connected to the first power supply terminal via the first load. Bipolar first conductive type first transistor, the base is connected to the second input terminal and the collector is connected to the second load. Input difference including a bipolar first conductive type second transistor connected to the first power supply terminal via a first current source connected between the emitters of the first and second transistors and the second power supply terminal. In an operational amplifier including a dynamic circuit and an output differential circuit in which the collector voltage of the second transistor is input to the third input terminal and the collector voltage of the first transistor is input to the fourth input terminal.
A bipolar first conductive type third transistor whose base is connected to the collector of the first transistor and an emitter is connected to the fourth input terminal, and a base is connected to the collector of the second transistor and the emitter is connected to the third input terminal. An intermediate circuit including a bipolar first conductive type fourth transistor connected to the
A first diode connected between the first input terminal and the emitter of the fourth transistor,
A second diode connected between the second input terminal and the emitter of the third transistor,
An operational amplifier characterized by further equipped with. In the operational amplifier according to claim 1,
An operational amplifier characterized in that a third diode is connected between the collectors of the third and fourth transistors and the first power supply terminal. In the operational amplifier according to claim 1 or 2.
A bipolar second conductive type fifth transistor inserted and connected between the emitter of the third transistor and the fourth input terminal, and a bipolar inserted and connected between the emitter of the fourth transistor and the third input terminal. Further equipped with a second conductive type sixth transistor,
An operational amplifier characterized in that a common voltage is applied to the bases of the fifth and sixth transistors. In the operational amplifier according to claim 3,
The common voltage is such that the first and second diodes do not turn on during normal operation, and the first diode turns on when a voltage equal to or higher than the voltage of the first power supply terminal is applied to the first input terminal. It is characterized in that the voltage for controlling the fifth and sixth transistors is set so that the second diode is turned on when a voltage equal to or higher than the voltage of the first power supply terminal is applied to the second input terminal. Operational amplifier.

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