JP7388914B2 - operational amplifier - Google Patents

Description

The present invention relates to an operational amplifier using bipolar transistors.

In an operational amplifier, when the input voltage greatly exceeds the power supply voltage on the collector side of the bipolar input transistor, the output voltage changes due to the current passing through the parasitic diode between the base and collector of the input transistor, causing the output voltage to change. This causes an output phase inversion phenomenon in which the output voltage becomes the opposite phase to the input voltage.

FIG. 2 shows an operational amplifier that does not take measures to prevent such an output phase inversion phenomenon. 1 is a normal input terminal, 2 is an inverting input terminal, 3 is an output terminal, 4 is a power supply terminal whose voltage is Vcc, 5 is a ground terminal, and 6 is an output differential circuit.

Q1 and Q2 are NPN transistors constituting an input differential circuit whose emitters are commonly connected to the current source I1, whose bases are connected to the normal input terminal 1 and the inverting input terminal 2, and between the collector and the power supply terminal 4. Resistors R1 and R2 are connected as loads, respectively. The resistance values of the resistors R1 and R2 are the same. Dbc1 is a parasitic diode between the base and collector of the transistor Q1, and Dbc2 is a parasitic diode between the base and collector of the transistor Q2. The output differential circuit 6 outputs to the output terminal 3 a voltage corresponding to the difference between the voltages V _-IN and V _+IN appearing at the collectors of the transistors Q1 and Q2.

In the operational amplifier shown in FIG. 2, when a voltage at which transistors Q1 and Q2 operate normally is applied to the normal input terminal 1 and the inverting input terminal 2, the input voltage V _+IN of the normal input terminal 61 of the output differential circuit 6 is , the input voltage V _-IN of the inverting input terminal 62 are expressed by equations (1) and (2), respectively.
Here, I _CQ1 is the collector current of transistor Q1, and I _CQ2 is the collector current of transistor Q2.

When voltage Vcc/2 is applied to normal input terminal 1 and inverting input terminal 2, if the current of current source I1 is I1, the same collector current (=I1/2) flows through transistors Q1 and Q2, and the same resistance The same current flows through the resistors R1 and R2. Therefore, the input voltages V _+IN and V _-IN of the output differential circuit 6 are the same voltage.

Here, for example, when the voltage applied to the normal rotation input terminal 1 is increased, the collector current of the transistor Q1 increases and the collector current of the transistor Q2 decreases. The amount of increase in the collector current of transistor Q1 is equal to the amount of decrease in the collector current of transistor Q2. If the current variation at this time is ΔI, the input voltages V _+IN and V _-IN of the output differential circuit 6 are as follows:
becomes.

As a result, V _+IN >V _-IN , and the voltage at the output terminal 3 of the output differential circuit 6 increases. This operation is the normal operation of the operational amplifier shown in FIG.

However, when the voltage applied to the normal input terminal 1 rises and becomes even higher than the power supply voltage Vcc, the parasitic diode Dbc1 of the transistor Q1 turns on, and the input voltage V _-IN of the output differential circuit 6 becomes It changes as shown in (6).
V _INP is the voltage at the normal rotation input terminal 1. V _Dbc1 is a voltage applied to the parasitic diode Dbc1, and is approximately 0.7V.

On the other hand, by turning off the transistor Q2, its collector current I _CQ2 becomes zero, and the input voltage V _+IN of the output differential circuit 6 changes as shown in equation (7).
here
When the voltage V _INP at the normal rotation input terminal 1 increases until it becomes , V _+IN < V _-IN , which causes the voltage at the output terminal 3 of the output differential circuit 6 to decrease. This is the output phase inversion phenomenon.

Therefore, in order to create an operational amplifier that takes measures to prevent the output phase reversal phenomenon without using large-area diodes, resistors R5 and R6 are connected in series to the bases of input transistors Q1 and Q2, respectively, as shown in Figure 3. There is a configuration in which a diode D4 is connected between the inverting input terminal 1 and the collector of the transistor Q2, and a diode D5 is connected between the inverting input terminal 2 and the collector of the transistor Q1 (Patent Document 1).

In the operational amplifier of FIG. 3, for example, when the voltage at the normal input terminal 1 becomes higher than the power supply voltage Vcc, a current is generated that flows to the power supply terminal 4 via the normal input terminal 1 → diode D4 → resistor R2. The resistor R5 is adjusted so that the input voltage V _+IN generated by the current flowing to the power supply terminal 4 via the normal input terminal 1 → resistor R5 → parasitic diode Dbc1 → resistor R1 is higher than the voltage V _-IN generated by the current flowing to the power supply terminal 4 via the normal input terminal 1 → resistor R5 → parasitic diode Dbc1 → resistor R1. By setting the value, V _+IN > V _-IN can be satisfied, so it is possible to prevent the output phase inversion phenomenon from occurring at this time.

Furthermore, when the voltage at the inverting input terminal 2 becomes higher than the power supply voltage Vcc, the voltage V _-IN generated by the current flowing to the power supply terminal 4 via the inverting input terminal 2 → diode D5 → resistor R1 is By setting the value of resistor R6 to be higher than the voltage V _+IN generated by the current flowing to power supply terminal 4 via terminal 2 → resistor R6 → parasitic diode Dbc2 → resistor R2, V _+IN < Since the output voltage can be set to V _-IN , it is possible to prevent the output phase inversion phenomenon from occurring at this time.

JP2010-28311A

However, in the operational amplifier shown in FIG. 3, a resistor R5 is connected in series to the base of the transistor Q1 to divide the excessive voltage input to the non-inverting input terminal 1 with the resistor R1, and the excessive voltage input to the inverting input terminal 2 is connected in series to the base of the transistor Q1. Since it is necessary to connect the resistor R6 in series to the base of the transistor Q2 to divide the voltage between the resistor R6 and the resistor R2, these resistors R5 and R6 are always connected, and even during normal operation, the resistors R5, There is a problem in that the thermal noise generated by R6 deteriorates the input equivalent noise voltage characteristics of the entire operational amplifier.

An object of the present invention is to provide an operational amplifier that prevents the occurrence of an output phase inversion phenomenon and prevents deterioration of the input-referred noise voltage characteristics of the entire operational amplifier.

In order to achieve the above object, the invention according to claim 1 provides a bipolar first conductivity type first transistor whose base is connected to a first input terminal and whose collector is connected to a first power supply terminal via a first load. , a bipolar first conductivity type second transistor having a base connected to a second input terminal and a collector connected to the first power supply terminal via a second load; emitters of the first and second transistors and a second power supply. an operational amplifier including an input differential circuit including a first current source connected between the terminals and an output differential circuit having a third input terminal and a fourth input terminal, the base of which is connected to the first transistor; a bipolar third transistor of the first conductivity type whose base is connected to the collector of the second transistor and whose emitter is connected to the third input terminal; an intermediate circuit including a fourth transistor of one conductivity type; and an anode connected between the first input terminal and the emitter of the fourth transistor and serving as a terminal of a parasitic diode between the base and collector of the first transistor; Alternatively, a terminal of the same type as the terminal connected to the first input terminal among the cathodes is connected between the first diode connected to the first input terminal, the second input terminal and the emitter of the third transistor. and a terminal of the same type as the terminal connected to the second input terminal among the anode or cathode terminal of the parasitic diode between the base and collector of the second transistor is connected to the second input terminal. The invention is characterized in that it further comprises a second diode.

The invention according to claim 2 is characterized in that, in the operational amplifier according to claim 1, a third diode is connected between the collectors of the third and fourth transistors and the first power supply terminal. .

The invention according to claim 3 is the operational amplifier according to claim 1 or 2, wherein a fifth transistor of a bipolar second conductivity type is inserted and connected between the emitter of the third transistor and the fourth input terminal; The device further includes a bipolar second conductivity type sixth transistor inserted and connected between the emitter of the fourth transistor and the third input terminal, and a common voltage is applied to the bases of the fifth and sixth transistors. It is characterized by

The invention according to claim 4 is the operational amplifier according to claim 3, in which the common voltage is connected to the first power supply terminal at the first input terminal without turning on the first and second diodes during normal operation. The first diode is turned on when a voltage equal to or higher than the voltage of the first power supply terminal is applied to the second input terminal, and the second diode is turned on when a voltage equal to or higher than the voltage of the first power supply terminal is applied to the second input terminal. The voltage is set to control the fifth and sixth transistors.

According to the present invention, when a voltage higher than the power supply voltage is input to the first input terminal or the second input terminal, the voltage generated by the current passing through the first or second diode is directly transferred to one side of the output differential circuit. However, the voltage generated by the current passing through the parasitic diode of the first or second transistor of the input differential circuit is lower by the base-emitter voltage of the third or fourth transistor of the intermediate circuit. Since the output signal is inputted to the other input terminal of the output differential circuit, it is possible to prevent the output phase inversion phenomenon from occurring. Furthermore, since there is no need to connect a resistor in series to the bases of the first and second transistors, it is possible to obtain an operational amplifier that has equivalent input noise voltage characteristics as in the case where no measures are taken to prevent the output phase reversal phenomenon. .

FIG. 2 is a circuit diagram of an operational amplifier according to an embodiment of the present invention. FIG. 1 is a circuit diagram of a conventional operational amplifier. 1 is a circuit diagram of a conventional operational amplifier in which measures are taken to prevent an output phase reversal phenomenon. FIG. 3 is a waveform diagram showing a simulation result of an output voltage when the operational amplifier of FIG. 2 is subjected to feedback to form a closed loop of 1 times and a sine wave having an amplitude greater than the power supply voltage is input to one input terminal. FIG. 2 is a waveform diagram showing a simulation result of an output voltage when the operational amplifier of FIG. 1 is subjected to feedback to form a closed loop of 1 times and a sine wave having an amplitude equal to or higher than the power supply voltage is input to one input terminal.

FIG. 1 shows a circuit of an embodiment of the operational amplifier of the present invention. 1 is a normal input terminal (first input terminal in the claims), 2 is an inversion input terminal (second input terminal in the claims), 3 is an output terminal, 4 is a power supply terminal for voltage Vcc, 5 is a ground terminal, 6 is an output differential circuit, 61 is a normal input terminal (third input terminal in the claims), and 62 is an inverting input terminal (fourth input terminal in the claims) of the output differential circuit.

Q1 and Q2 are NPN transistors constituting an input differential circuit whose emitters are commonly connected to the current source I1, whose bases are connected to the normal input terminal 1 and the inverting input terminal 2, and between the collector and the power supply terminal 4. Resistors R1 and R2 are connected as loads, respectively. The resistance values of the resistors R1 and R2 are the same. Dbc1 is a parasitic diode between the base and collector of the transistor Q1, and Dbc2 is a parasitic diode between the base and collector of the transistor Q2.

Q3 and Q4 are NPN transistors whose collectors are commonly connected to the diode D3 and constitute an intermediate circuit, whose bases are connected to the collectors of the transistors Q1 and Q2, and whose emitters are connected to the PNP transistors Q5 and Q6 and resistors R3 and R4 as loads. It is connected to the ground terminal 5 via the ground terminal 5. The resistance values of resistors R3 and R4 are the same. Transistors Q5 and Q6 are transistors forming a buffer circuit, and a fixed voltage Va is applied to their bases. D1 is a diode connected between the normal input terminal 1 and the emitter of the transistor Q4, and D2 is a diode connected between the inverting input terminal 2 and the emitter of the transistor Q3. The output differential circuit 6 outputs from the output terminal 3 a voltage corresponding to the emitter voltage of the transistors Q3 and Q4, that is, the difference between the voltages V _-IN and V _+IN generated across the resistors R3 and R4.

Here, in the input voltage range in which transistors Q1 and Q2 operate normally, the collector current of transistor Q1 and the collector current of transistor Q2 when a high voltage is applied to the non-inverting input terminal 1 and a low voltage is applied to the inverting input terminal 2. When the collector current variation is ΔI, the base voltages V _BQ3 and V _BQ4 of the transistors Q3 and Q4 are expressed by equations (9) and (10), respectively.
Therefore, V _BQ3 <V _BQ4 .

Furthermore, the emitter voltages V _EQ3 and V _EQ4 of the transistors Q3 and Q4 are voltages lower than the base voltages V _BQ3 and V _BQ4 of those transistors Q3 and Q4 by the base-emitter voltage. When the base-emitter voltage of transistor Q3 is V _BEQ3 and the base-emitter voltage of transistor Q4 is V _BEQ4 , and if V _BEQ3 ≒ V _BEQ4 ≒ V _BE , the emitter voltages V _EQ3 and V _EQ4 are as follows.
Therefore, V _EQ3 < V _EQ4 .

Since the emitter voltages V _EQ3 and V _EQ4 are directly applied to the normal input terminal 61 and the inverted input terminal 62 of the output differential circuit 6 via the transistors Q5 and Q6, V _+IN > V _-IN Therefore, the voltage at the output terminal 3 of the output differential circuit 6 works in the direction of increasing. The above is the normal operation of the operational amplifier shown in FIG.

Here, when the voltage V _INP of the normal input terminal 1 increases until the parasitic diode Dbc1 turns on, the base voltage V _BQ3 of the transistor Q3 becomes
becomes. Since the emitter voltage V _EQ3 of transistor Q3 is similar to equation (11),
becomes.

On the other hand, since the diode D1 is turned on, the emitter voltage V _EQ4 of the transistor Q4 is as follows, assuming that the voltage applied to the diode D1 is V _D1 .
becomes.

Therefore, assuming that the forward voltages of each diode are approximately equal and V _Dbc1 ≈ V _D1 , from equations (14) and (15), the voltage V _EQ3 will be lower than the voltage V _EQ4 by the voltage V _BE , V _EQ3 < V _EQ4 . From this, as in normal operation, V _+IN > V _-IN , and the voltage at the output terminal 3 of the output differential circuit 6 acts in the direction of increasing, so that no output phase inversion phenomenon occurs.

In addition, when the voltage V _INN applied to the inverting input terminal 2 increases until the parasitic diode Dbc2 turns on, contrary to the above, the voltage V _EQ4 becomes lower than the voltage V _EQ3 by the voltage V _BE , and V _EQ3 > V _EQ4 . As a result, as in normal operation, V _+IN <V _-IN , and the voltage at the output terminal 3 of the output differential circuit 6 acts in the direction of decreasing, so that no output phase inversion phenomenon occurs.

Note that the diode D3 protects the transistor Q4 from destruction when a voltage higher than the power supply voltage Vcc is applied to the emitter of the transistor Q4 from the normal input terminal 1 via the diode D1, and also protects the emitter of the transistor Q4 from destruction. When a voltage higher than the power supply voltage Vcc is applied from the inverting input terminal 2 via the diode D2 to the transistor Q3, the transistor Q3 is protected from destruction.

The buffer circuit consisting of transistors Q5 and Q6 has a fixed voltage Va applied to its base, so by appropriately setting the value of this voltage Va, the diodes D1 and D2 can be connected to the input terminals 1 and 2 to avoid excessive voltage. It can be turned on only when the voltage is applied and turned off during normal operation.

FIG. 4 shows a simulation result of the output voltage when the conventional operational amplifier of FIG. 2 is subjected to feedback to form a closed loop of 1 times, and a sine wave having an amplitude equal to or higher than the power supply voltage is input to the input. In FIG. 4, it can be seen that an output phase inversion phenomenon occurs when the input voltage exceeds the upper power supply voltage Vcc, and the output voltage significantly decreases.

FIG. 5 shows the results of a similar simulation using the operational amplifier of this embodiment shown in FIG. In FIG. 5, it can be seen that the output voltage does not decrease even if it exceeds the power supply voltage Vcc, and the output phase inversion phenomenon is suppressed.

As described above, in this embodiment, when a voltage exceeding the power supply voltage Vcc is applied to the normal input terminal 1, the normal input terminal 1 → the parasitic diode Dbc1 → the base-emitter of the transistor Q3 → the transistor Q5. The voltage V _-IN generated by the current flowing to the grounding terminal 5 between the emitter and collector → via the resistor R3 is transferred to the normal input terminal 1 → the diode D1 → between the emitter and collector of the transistor Q6 → to the ground via the resistor R4. Since the voltage V _+IN generated by the current flowing through the terminal 5 becomes lower by V _BE3 , V _+IN > V _-IN , and the output phase inversion phenomenon of the voltage at the output terminal 3 of the output differential circuit 6 occurs. Prevented.

Furthermore, when a voltage exceeding the power supply voltage Vcc is applied to the inverting input terminal 2, the voltage is applied to the inverting input terminal 2 → parasitic diode Dbc2 → between the base and emitter of transistor Q4 → between the emitter and collector of transistor Q6 → via resistor R4. The voltage V _+IN generated by the current flowing to the ground terminal 5 is the voltage V - generated by the current flowing to the ground terminal 5 via the inverting input terminal 2 → diode D2 → emitter-collector of transistor Q5 → resistor R3 _. By being lower than _IN by V _BE4 , V _+IN < V _-IN , and the output phase inversion phenomenon of the voltage at the output terminal 3 of the output differential circuit 6 is prevented.

In other words, since the functions of resistors R5 and R6 in FIG. 3 are realized by the base-emitter voltages V _BE3 and V _BE4 of transistors Q3 and Q4, there is no need to use resistors R5 and R6, and the input-referred noise voltage characteristics The problem of deterioration does not occur.

In addition, in FIG. 1, the collectors of transistors Q3 and Q4 are commonly connected and a protection diode D3 is connected between them and the power supply terminal 4, but the collectors of transistors Q3 and Q4 are separated and their A protective diode may be individually connected between the collector and the power supply terminal 4.

1: Normal input terminal (first input terminal), 2: Inverting input terminal (second input terminal), 3: Output terminal, 4: Power supply terminal, 5: Ground terminal, 6: Output differential circuit, 61: Positive Inversion input terminal (third input terminal), 62: Inversion input terminal (fourth input terminal)
Q1, Q2, Q3, Q4: NPN transistor Q5, Q6: PNP transistor R1, R2, R3, R4, R5, R6: Resistor D1, D2, D3, D4, D5: Diode Dbc1: Between the base and collector of transistor Q1 Parasitic diode Dbc2: Parasitic diode between the base and collector of transistor Q2

Claims (4)

a bipolar first conductivity type first transistor whose base is connected to a first input terminal and whose collector is connected to a first power supply terminal via a first load; whose base is connected to a second input terminal and whose collector connects to a second load; a second bipolar transistor of a first conductivity type connected to the first power supply terminal via a first current source connected between the emitters of the first and second transistors and the second power supply terminal; An operational amplifier comprising a differential circuit and an output differential circuit having a third input terminal and a fourth input terminal,
a third transistor of a bipolar first conductivity type, the base of which is connected to the collector of the first transistor, and the emitter of which is connected to the fourth input terminal; the base is connected to the collector of the second transistor, and the emitter is connected to the third input terminal; an intermediate circuit including a fourth transistor of a bipolar first conductivity type connected to;
It is connected between the first input terminal and the emitter of the fourth transistor, and is connected to the first input terminal of an anode or a cathode that is a terminal of a parasitic diode between the base and collector of the first transistor. a first diode in which a terminal of the same type as the terminal is connected to the first input terminal ;
The second input terminal is connected between the second input terminal and the emitter of the third transistor, and the anode or cathode, which is a terminal of a parasitic diode between the base and collector of the second transistor, is connected to the second input terminal. a second diode, the same type of terminal as the terminal being connected to the second input terminal ;
An operational amplifier further comprising: The operational amplifier according to claim 1,
An operational amplifier characterized in that a third diode is connected between the collectors of the third and fourth transistors and the first power supply terminal. The operational amplifier according to claim 1 or 2,
a fifth transistor of a bipolar second conductivity type inserted and connected between the emitter of the third transistor and the fourth input terminal; and a bipolar fifth transistor inserted and connected between the emitter of the fourth transistor and the third input terminal. further comprising a sixth transistor of the second conductivity type,
An operational amplifier characterized in that a common voltage is applied to the bases of the fifth and sixth transistors. The operational amplifier according to claim 3,
The common voltage is such that the first and second diodes are not turned on during normal operation, and the first diode is turned on when a voltage higher than the voltage of the first power supply terminal is applied to the first input terminal, The voltage is set to control the fifth and sixth transistors so that the second diode is turned on when a voltage higher than the voltage of the first power supply terminal is applied to the second input terminal. operational amplifier.