JP2001195141A - Band gap reference circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an effective band gap reference circuit to reduce the number of elements and power consumption. SOLUTION: This circuit generates an offset voltage VOS at an inverting input end by providing a pair of transistors Q2, Q3 having respectively different emitter areas, amplifies the offset voltage VOS by resistive elements R1, R2 and outputs the offset voltage from an output end OUT by further adding the voltage between a base and an emitter of a transistor Q12 to it.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bandgap reference circuit, and more particularly to a bandgap reference circuit which obtains an output which suppresses fluctuation of a reference voltage using a semiconductor (silicon) bandgap voltage with respect to a temperature change.

[0002]

2. Description of the Related Art When many loads are driven by the output potential of a bandgap reference circuit, it is necessary to secure an output current capacity corresponding to the load.
As shown in (1), a method of impedance conversion using an all feedback operational amplifier can be considered. FIG. 4 shows a specific circuit example of this method.

[0005] A band gap section for generating an output VO due to an offset voltage and suppressing a fluctuation of the output with respect to a temperature change includes a constant current source I21 connected to a VCC line on a high power supply side and a GND (ground) line on a low power supply side. And is provided between them.

The bandgap portion has an NPN transistor Q21 having a base connected to a collector and an emitter connected to a GND (ground) line, and a constant current source I21 for flowing a constant current I21 to the collector of the transistor Q21.
A resistor R21 having a resistance R21 connected therebetween, a base connected to the base of the transistor Q21, an emitter connected to the GND line through a resistor R23 having a resistance R23, and a collector connected via a resistor R22 having a resistance R22. And the emitter area Xn is n times as large as the emitter area X1 of the transistor Q21.
N transistor Q22, base is transistor Q22
Is connected to the connection node between the collector of the resistor 22 and the resistor 22, the emitter is connected to the GND line, and the collector is connected to the resistor R2.
4, a NPN transistor Q23 connected to the constant current source I21 via the resistor R24, and a phase correction capacitor connected between a connection node between the collector of the transistor Q22 and the resistor R22 and a connection node between the collector of the transistor Q23 and the resistor R24. An element C22 and a PNP transistor Q24 having a base connected to a connection node between the collector of the transistor Q23 and the resistance element R24, an emitter connected to the constant current source I21, and a collector connected to the GND line. I have.

On the other hand, in the operational amplifier section, the base is a non-inverting input terminal for inputting the voltage VO obtained by the band gap section, and the emitter is a constant current source I2 through which a constant current I22 flows.
2, a PNP transistor Q25 whose collector is connected to the GND line, an inverting input terminal whose base is connected to the output terminal OUT, and an emitter which is connected to the VCC via a constant current source I24 through which a constant current I24 flows. PNP connected to line and collector connected to GND line
Transistor Q28 has a base connected to the emitters of transistors Q25 and Q27, respectively, and has an emitter connected in common to supply a constant current I23 through constant current source I23.
PNP transistors Q26 and Q connected to CC line
27, an NPN transistor Q29 having an emitter connected to the GND line, a collector connected to the collector of the transistor Q26, an emitter connected to the GND line, a base connected to the collector and the base of the transistor Q29, and a collector connected to the transistor Q27. Connected NPN
A transistor Q30, an NPN transistor Q31 connected to a VCC line via a constant current source I25 having a base and a collector connected to flow a constant current I25, and an emitter
A PNP transistor Q32 connected to the emitter of the PN transistor Q31, the base and the collector are connected, the base is connected to the connection node between the collectors of the transistors Q26 and Q29, the emitter is connected to the GND line, and the collector is the base of the transistor Q32. An NPN transistor Q33 connected to a connection node between
A phase correction capacitor C21 connected between a connection node between the collectors of the transistors Q27 and Q30 and a connection node between the base and collector of the transistor Q32 and the collector of the transistor Q33, and a base connected to the base and collector of the transistor Q31; Collector is VCC
NPN connected to the output terminal VOUT and the base of the transistor Q28 which becomes the inverting input.
Transistor Q34 and emitter Q34
And a PNP transistor Q35 whose base is connected to a connection node between the base and collector of the transistor Q32 and the collector of the transistor Q33.

With such a structure, the emitter area of the transistor Q22 in the band gap portion and the transistor Q22
The voltage VO obtained based on the offset voltage based on the ratio n to the emitter area of 21 is input to the non-inverting input terminal of the operational amplifier unit, and this VO is output from the output terminal OUT as a reference voltage.

[0007]

However, in the above-mentioned prior art, a feedback loop is provided in each of the bandgap section and the full feedback operational amplifier section, and two phase correction capacitance elements C2 are provided.
Since this is an inefficient circuit configuration requiring 2 and C21, there is a problem that the number of elements increases and power consumption increases.

Accordingly, an object of the present invention is to provide an effective bandgap reference circuit which has reduced the number of elements and reduced current consumption.

[0009]

A feature of the present invention is a first means for generating an offset voltage at an inverting input terminal by including a pair of transistors having different emitter areas from each other; And a third means for adding a base-emitter voltage to the amplified voltage, wherein the bandgap reference circuit outputs the added voltage from an output terminal.

The second means includes a first resistance element having one end connected to the inverting input terminal and the other end connected to a low potential line, and one end connected to the inverting input terminal and the other end connected to the inverting input terminal. A second resistance element connected to the third means.

The third means includes a transistor having a collector connected to a high potential line, a base connected to the output terminal, and an emitter connected to the other end of the second resistance element. The addition by the base-emitter voltage of this transistor can be performed. At this time, it is preferable that a constant current source be connected to the transistor so that a constant current flows so that the base-emitter voltage becomes constant when the temperature is constant.

Alternatively, the third means includes a first transistor having a collector connected to a high potential line and a base connected to the output terminal, and a collector connected to the base and connected to an emitter of the first transistor. And a second transistor having an emitter connected to the other end of the second resistance element, and the addition can be performed by a base-emitter voltage of the first and second transistors.
At this time, a constant current source is connected to the series connection of the first and second transistors so that a constant current flows so that the base-emitter voltage of the two transistors is constant when the temperature is constant. It is preferred that

In the above-mentioned band gap reference circuit, a change in a voltage value of the offset voltage amplified by the second means with respect to a temperature,
It is preferable that the change in the base-emitter voltage with respect to the temperature in the means is set so as to cancel each other.

[Detailed Description of the Invention]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a bandgap reference circuit according to a first embodiment of the present invention.

The base, which is a non-inverting input terminal, is connected to the low-power-side G
The transistor Q1 is connected to the ND (ground) line, the emitter is connected to the VCC line on the high power supply side via the constant current source I1 for flowing the constant current I1, the collector is connected to the GND line, and the base is the inverting input terminal. The emitter is connected to the VCC line on the high power supply side via a constant current source I3 flowing with a constant current I3 having the same current value as the constant current I1, and the collector is connected to the GN.
The transistor P4 having the same configuration as the transistor Q4 connected to the D line
It is an NP transistor.

A PNP transistor Q2 having a base connected to the emitter of the transistor Q1 has an emitter area of X1, a PNP transistor Q3 having a base connected to the emitter of the transistor Q4 has an emitter area of Xn,
Xn is n times X1. The emitter of the transistor Q2 and the emitter of the transistor Q3 are commonly connected, and are connected to the VCC line on the high power supply side via the constant current source I2 for flowing the constant current I2. The transistors Q2 and Q3 have the same configuration except for the emitter area.

The bases of the NPN transistors Q5 and Q6 are connected to each other, the respective emitters are connected to the GND line, and the collectors are respectively connected to the collectors of the transistors Q2 and Q3.
The collector of transistor Q6 is connected to its base.

Therefore, a current mirror circuit is formed, and half of the current I2 flows through the transistors Q2 and Q3.

An NPN transistor Q7 having a diode configuration by connecting a collector and a base and a PNP transistor Q8 having a diode configuration by connecting a collector and a base
Are connected to the VCC line on the high power supply side via a constant current source I4 for flowing a constant current I4, the collector is connected to the base and collector of the transistor Q8, and the emitter is G
It has an NPN transistor Q9 connected to the ND line, a base connected to a connection node between the collectors of the transistors Q2 and Q5, and a phase correction capacitor C1 connected between the base and the collector of the transistor Q9. .

Also, the collector is connected to the VCC line,
An NPN transistor Q10 having a base connected to the base-collector connection node of the transistor Q7, a collector connected to the GND line, a base connected to the base-collector connection node of the transistor Q8, and an emitter connected to the NPN
It has an NPN transistor Q11 connected to the emitter of the transistor Q10.

Transistors Q10 and Q11
To form an emitter follower circuit to amplify the current, determine the idling current of the transistors Q10 and Q11 by the transistors Q7 and Q8, the transistor Q9 acts as an amplifier with a common emitter, and the phase correction capacitor C1 corrects the phase. And performs the function of preventing oscillation.

With the above configuration, the offset voltage VOS
Is obtained as the voltage of the base of the transistor Q4, which is the inverting terminal.

In the first embodiment of the present invention, a first resistance element R1 having a resistance value R1 having one end connected to the base of the transistor Q4, which is an inverting input terminal, and the other end connected to a GND line, A second resistor R2 having a resistance value R2 having one end connected to the base of the transistor Q4 together with the first resistor, a collector connected to the VCC line, a base connected to the output terminal OUT, and an emitter connected to the second resistor. It has an NPN transistor Q12 connected to the other end of the element and connected to the VCC line on the high power supply side via a constant current source I5 for flowing a constant current I5.

Next, the reference voltage output V0 in the band gap reference circuit of FIG. 1 will be described.

Transistor base-emitter voltage VB
The relationship between E and the collector current (emitter current) I is V =
(KT / q) log _e (I / Is). K: Boltzmann's constant, T: absolute temperature, q: electron charge, Is:
It is the saturation current.

As described above, the base of the transistor Q1 is grounded (0 V), and the collector currents (emitter currents) I of the transistors Q2 and Q3 are equal to each other (half of I2). The emitter and the emitter of the transistor Q3 are connected.

Therefore, the potential of the base of the transistor Q4, which is the inverting input terminal, is determined by the ratio of the saturation current of the transistor Q3 to the saturation current of the transistor Q2, and the ratio of the saturation current is the ratio of the area of the emitter.
4, the offset voltage VOS = (k
T / q) log _e (n).

As described above, by setting the emitter area ratio of the transistor pair Q2 and Q3 constituting the input differential amplifier to n times, the V of each transistor in a balanced state is set.
The BE difference (kT / q) log _e (n) is the offset voltage.

The first and second non-inverting gain setting resistors
NPN transistor Q1
2 has a potential of VOS · (R1 + R2) / R1
When the base-emitter voltage of the NPN transistor Q12 constituting the emitter follower is VBE, the reference output VO at the output terminal OUT is VO = VBE + VOS.
(R1 + R2) / R1.

When this VO is partially differentiated with respect to the absolute temperature T, d
VO / dT = (R1 + R2) / R1 × (k / q) log
_e (n) + dVBE / dT. Here, d is a partial differential symbol.

It is necessary to make dVO / dT, that is, the change of VO due to temperature, as small as possible. For example, VBE
Is −2 mV / ° C., as a numerical example, n =
10, the output voltage VO temperature-compensated by setting (R1 + R2) / R1 = 10 is VO = 1.25.
About V is obtained.

FIG. 2 is a circuit diagram showing a bandgap reference circuit according to a second embodiment of the present invention. Note that, in FIG. 2, the same or similar portions as those in FIG. 1 are denoted by the same reference numerals, and duplicate description will be omitted.

In FIG. 2, the collector and the base of the NPN transistor Q13 are connected to the emitter of the transistor Q12, the emitter is connected to the other end of the second resistance element, and the constant current source I5 flows with the constant current I5. To the VCC line on the high power supply side.

Thus, in FIG. 2, the output voltage VO is provided because two stages of pn junction forward voltages having a negative temperature coefficient are provided.
Is VO = 2VBE + VOS. (R1 + R2) / R1,
As a result, the voltage rises by VBE of the NPN transistor Q13, and a higher output voltage can be obtained.

The temperature coefficient of VO in FIG.
dT = (R1 + R2) / R1 × (k / q) log _e
(N) + d2VBE / dT. Here, d is a partial differential symbol.

R is adjusted so that dVO / dT becomes zero.
By setting 1, R2, temperature characteristic compensation can be performed.

For example, the temperature coefficient of VBE is -2 mV / ° C.
Then, as a numerical example, n = 10, (R1 + R2) / R
By setting 1 = 20, about VO = 2.5 V can be obtained as the temperature-compensated output voltage VO.

As described above, according to the present invention, a constant temperature-dependent flat voltage can be obtained as the output potential of the feedback amplifier using the operational amplifier. Further, since the output of the operational amplifier becomes a constant voltage output, a large current capacity can be secured.

The output VO of the operational amplifier of the present invention is
The configuration is such that the potential is determined by adding the potential obtained by amplifying the input offset voltage of the operational amplifier by the gain determined by the resistance ratio and the forward voltage of one or more PN junctions.

In the first embodiment, the base-emitter voltage is one stage, and in the second embodiment, the base-emitter voltage is two stages. However, in order to obtain a higher potential output VO, the number of stages of the base-emitter voltage may be further increased. That is, VO
= A · VOS + B · VF, where VO: output potential of the operational amplifier, VOS: input offset voltage of the operational amplifier, VF: forward voltage (base-emitter voltage) of the PN junction, and A: gain determined by the resistance ratio , B: the number of stages of the PN junction).

[0041]

According to the circuit of the present invention described above, the number of elements can be reduced to about 70% as compared with the conventional example, and the current consumption is reduced by about 300 μA for driving a general band gap. can do.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a block diagram showing a conventional technique.

FIG. 4 is a circuit diagram showing a conventional technique.

[Explanation of symbols]

Q1, Q2, Q3, Q4, Q8, Q11 PNP transistors Q5, Q6, Q7, Q9, Q10, Q12, Q13
NPN transistor I1, I2, I3, I4, I5 Constant current (constant current source) R1, R2 Resistance value (resistance element) C1 Capacitance element Q24, Q25, Q26, Q27, Q28, Q32, Q
35 PNP transistors Q21, Q22, Q23, Q29, Q30, Q31, Q
33, Q34 NPN transistor I21, I22, I23, I24, I25 Constant current (constant current source) R21, R22, R23, R24 Resistance value (resistance element) C21, C22 Capacitance element

Claims (7)

[Claims] A first means for generating an offset voltage at an inverting input terminal comprising a pair of transistors having different emitter areas from each other; a second means for amplifying the offset voltage by a resistance element circuit; A third means for adding a base-emitter voltage to the amplified voltage, and outputting the added voltage from an output terminal. 2. The second means includes a first resistance element having one end connected to the inverting input terminal and the other end connected to a low potential line, and one end connected to the inverting input terminal and the other end connected to the inverting input terminal. 2. The band gap reference circuit according to claim 1, further comprising a second resistance element connected to the third means. 3. The third means includes a transistor having a collector connected to a high potential line, a base connected to the output end, and an emitter connected to the other end of the second resistance element. 3. The band gap reference circuit according to claim 2, wherein the addition is performed based on a voltage between a base and an emitter of the transistor. 4. The band gap reference circuit according to claim 3, wherein a constant current source is connected to said transistor so that a constant current flows. 5. The third means includes a first transistor having a collector connected to a high potential line and a base connected to the output terminal, and a collector connected to a base and connected to an emitter of the first transistor. Connect the emitter to the second
3. The band gap reference according to claim 2, further comprising a second transistor connected to the other end of the resistance element, wherein the addition is performed by a base-emitter voltage of the first and second transistors. circuit. 6. The band gap reference circuit according to claim 5, wherein a constant current source is connected to a series connection of the first and second transistors so that a constant current flows. 7. A change in a voltage value obtained by amplifying the offset voltage by the second means with respect to a temperature and a change in the base-emitter voltage with the temperature in the third means are set so as to cancel each other. The bandgap reference circuit according to claim 1, wherein: