JP2020009432A5 - - Google Patents

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Publication number
JP2020009432A5
JP2020009432A5 JP2019118472A JP2019118472A JP2020009432A5 JP 2020009432 A5 JP2020009432 A5 JP 2020009432A5 JP 2019118472 A JP2019118472 A JP 2019118472A JP 2019118472 A JP2019118472 A JP 2019118472A JP 2020009432 A5 JP2020009432 A5 JP 2020009432A5
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Japan
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circuit
transistor
gate
input terminal
output terminal
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JP2019118472A
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Japanese (ja)
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JP2020009432A (ja
JP7337563B2 (ja
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JP2019118472A 2018-06-29 2019-06-26 半導体装置、及び電子機器 Active JP7337563B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018124122 2018-06-29
JP2018124122 2018-06-29

Publications (3)

Publication Number Publication Date
JP2020009432A JP2020009432A (ja) 2020-01-16
JP2020009432A5 true JP2020009432A5 (OSRAM) 2022-06-21
JP7337563B2 JP7337563B2 (ja) 2023-09-04

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JP2019118472A Active JP7337563B2 (ja) 2018-06-29 2019-06-26 半導体装置、及び電子機器

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US (2) US11515873B2 (OSRAM)
JP (1) JP7337563B2 (OSRAM)

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US11515873B2 (en) * 2018-06-29 2022-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
US10924090B2 (en) * 2018-07-20 2021-02-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device comprising holding units
WO2020095140A1 (ja) * 2018-11-08 2020-05-14 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
WO2020234681A1 (ja) * 2019-05-17 2020-11-26 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
US20220326384A1 (en) * 2019-08-23 2022-10-13 Semiconductor Energy Laboratory Co., Ltd. Imaging device, distance estimation device, and moving object
US12205019B2 (en) * 2019-11-19 2025-01-21 Alibaba Group Holding Limited Data layout conscious processing in memory architecture for executing neural network model
US20220261559A1 (en) * 2020-02-27 2022-08-18 Tdk Corporation Arithmetic circuit and neuromorphic device
US11218137B2 (en) * 2020-04-14 2022-01-04 Globalfoundries U.S. Inc. Low clock load dynamic dual output latch circuit

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KR102810037B1 (ko) 2017-08-04 2025-05-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
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