JP2019062046A - Light-emitting thyristor, optical print head, and image forming device - Google Patents

Abstract

To solve such a problem that, although a light-emitting thyristor, in which a second n-type layer, a second p-type layer, a first n-type layer and a first p-type layer are laminated by epitaxial growth and an anode electrode, a gate electrode and a cathode electrode are formed after etching the laminate, is known, there are cases where a leakage current is caused by the formation of an interface state during etching process and accordingly desired characteristics cannot be obtained.SOLUTION: In a light-emitting thyristor 20 including a first p-type layer 101, a first n-type layer 102, and a second n-type layer 104, a pn junction comprises an n-Al0.15Ga0.85As layer 102b and a p-type InGaP layer of an epitaxial layer which are grown on a second p-type layer 103. In the pn junction, an InGaP layer contains Zn as a dopant, and the concentration of the Zn at the interface between the n-Al0.15Ga0.85As layer 102b and the p-type InGaP layer is in the range of 1E18/cm-2E18/cm.SELECTED DRAWING: Figure 1

Description

  The present invention relates to the structure of an optical print head, and more particularly to the structure of a thyristor as a light source thereof.

  Conventionally, a light emitting thyristor is known in which a second n-type layer, a second p-type layer, a first n-type layer, and a first p-type layer are stacked by epitaxial growth and etched to form an anode electrode, a gate electrode, and a cathode electrode. (See, for example, Patent Document 1).

JP, 2009-260246, A (page 4, FIG. 1)

  However, due to the formation of interface states at the time of etching, a leakage current may occur, and a desired characteristic may not be obtained.

A light emitting thyristor according to the present invention is a light emitting thyristor having an anode layer, a gate layer, and a cathode layer,
In a pn junction composed of an n-type AlGaAs layer of an epitaxial layer and a p-type InGaP layer grown on a GaAs substrate, Zn is contained as a dopant in the InGaP layer, and at the interface between the n-type AlGaAs layer and the p-type InGaP layer the concentration of the ^Zn, characterized in that in the range of ^{1E18 / cm 3 ~2E18 / cm 3} .

  According to the light emitting thyristor of the present invention, since the interface position of the pn junction is formed in the vicinity of the InGaP layer / AlGaAs interface, the n value in the forward IV characteristic is suppressed to a small value, and the diffusion current flows well. As a result, good electrical characteristics can be obtained.

It is a figure which shows the structure of the semiconductor epitaxial layer 10 of Embodiment 1 which comprises the light-emitting thyristor by this invention. It is the simplified block diagram which divided the semiconductor epitaxial layer shown in FIG. 1 into every semiconductor type. It is process drawing which shows the process of processing the semiconductor epitaxial layer shown in FIG. 2 and producing a light emitting thyristor, and the figure (b) shows a mode of the stage which wet-etched one part, and the figure (c) The state of the stage which formed each electrode is shown. It is the graph which calculated | required the concentration distribution of the depth direction of Zn in the semiconductor epitaxial layer of Embodiment 1 by secondary ion mass spectrometry, and plotted the result. It is the elements on larger scale which expanded the area | region of 545 nm-570 nm in FIG. 4 to the same direction. It is the graph which plotted the measurement result in each sample by taking the Zn concentration of the interface on the horizontal axis and the n value on the vertical axis. It is a figure which shows the structure of the semiconductor epitaxial layer shown as a reference example. In a reference example, it is a graph which shows the diffusion state of Zn doped as a dopant in p-In0.47Ga0.53P layer of the 1st p type layer. It is explanatory drawing which showed typically the mode of Zn diffusion in the epitaxial growth process at the time of producing a semiconductor epitaxial layer. It is a graph which shows a measurement result when a thyristor element is created using several semiconductor epitaxial layers with which layer thicknesses of n-In0.47Ga0.53P differ, and a forward IV characteristic between anode and gate is measured. It is the graph which plotted the n value computed based on Formula 1, taking the thickness of the n-In0.47Ga0.53P layer at the time of design of a semiconductor epitaxial layer on the horizontal axis, taking the n value on the vertical axis. It is a figure which shows the structure of the semiconductor epitaxial layer of Embodiment 2 which comprises the light emission thyristor by this invention. It is a block diagram which shows the print head of Embodiment 3 based on the optical print head of this invention. It is a plane arrangement plan showing an example of 1 composition of a light emitting element unit. FIG. 18 is a main part configuration diagram schematically showing a main part configuration of an image forming apparatus of a fourth embodiment based on the image forming apparatus of the present invention.

Embodiment 1
FIG. 1 is a view showing the structure of a semiconductor epitaxial layer 10 of the first embodiment which constitutes a light emitting thyristor according to the present invention.

  As shown in the figure, the semiconductor epitaxial layer 10 shown here is, from the top, a first p-type layer 101 as an anode layer, a first n-type layer 102 as a gate layer, a second p-type layer 103 as a GaAs substrate, a cathode layer. The first p-type layer 101 includes, from the upper layer, a p-GaAs layer 101a, a p-Al0.4Ga0.6As layer 101b, and a p-In0.47Ga0.53P layer 101c as an InGaP layer. The first n-type layer 102 is formed from the upper layer to the n-In0.47Ga0.53P layer 102a as the InGaP layer and the n-Al0.15Ga0.85As layer 102b from the upper layer, and the second p-type layer 103 is Sequentially form the p-Al0.15Ga0.85As layer 103a and the p-Al10.35Ga0.65As layer 103b in this order The second n-type layer 104 includes, from the upper layer, an n-Al0.15Ga0.85As layer 104a, an n-Al0.4Ga0.6As layer 104b, an n-In0.47Ga0.53P layer 104c, and an n-Al0.25Ga0.75As layer 104d. It is formed in order of.

The Zn concentration of the p-In 0.47 Ga 0.53 P layer 101 c of the first p-type layer 101 is 4.0E18 / cm ³ (thickness 15 nm), and the Zn concentration of the n-In 0.47 Ga 0.53 P layer of the first n-type layer 102 is The thickness is 11 nm.

  The Zn concentration of the p-In 0.47 Ga 0.53 P layer 101 c of the first p-type layer 101 of the semiconductor epitaxial layer 10 shown in FIG. 1 and the Si concentration of the n-In 0.47 Ga 0.53 P layer 102 a of the first n-type layer 102 are And the design value before epitaxially growing the upper layer p-Al0.4Ga0.6As layer 101b, and as described later, Zn in the process of epitaxially growing the upper layer p-Al0.4Ga0.6As layer 101b. By diffusing in the lower layer and changing the concentration distribution of Zn, it is set as a design value for achieving the final purpose suitable state described later.

  Next, a manufacturing process of forming the light emitting thyristor 20 based on the semiconductor epitaxial layer 10 will be described. FIG. 2 is a simplified configuration diagram in which the semiconductor epitaxial layer 10 shown in FIG. 1 is divided into layers for each semiconductor type, and FIG. 3 shows a process of processing the semiconductor epitaxial layer 10 shown in FIG. FIG.

  A part of the semiconductor epitaxial layer 10 shown in FIG. 3A is processed by wet etching as shown in FIG. 3B to expose a surface for electrode formation. Next, as shown in FIG. 6C, the light emitting thyristor 20 is formed by forming the gate electrode 52 and the cathode electrode 53 which are electrodes for n-type semiconductor and the anode electrode 51 which is an electrode for p-type semiconductor. Be done.

  Since the semiconductor epitaxial layer 10 is processed by etching, the pn junction interface 60 is exposed on the processed surface. As shown in FIG. 1, here, the interface of the pn junction formed in the first p-type layer 101 and the first n-type layer 102 is formed in the In 0.47 Ga 0.53 P layer. The reason for this configuration is that it is generally known that the interface state density formed on the surface exposed by etching is lower in the InGaP layer.

  Further, by using the InGaP layer, selective etching becomes possible at the time of etching shown in FIG. 3B. That is, although GaAs or AlGaAs is easily dissolved in an etchant of phosphoric acid-peroxide system which is obtained by adding hydrogen peroxide solution to phosphoric acid and diluting with water, InGaP is hardly soluble. Therefore, in the case of the epitaxial structure of the semiconductor epitaxial layer 10 shown in FIG. 1, when etching is performed using phosphoric acid water, the InGaP layers (101c, 102a) are stopped. Therefore, the formation surface of the gate electrode 52 shown in FIG. 3C, which is formed on the AlGaAs layer 102b by removing the InGaP layer with hydrochloric acid or the like, is always constant, and the process stability is enhanced.

  Here, a reference example will be described.

  FIG. 7 is a view showing the configuration of a semiconductor epitaxial layer 500 shown as a reference example. The main difference between this semiconductor epitaxial layer 500 and the semiconductor epitaxial layer 10 according to the present invention shown in FIG. 1 is that the Zn concentration and thickness of the p-In0.47Ga0.53P layer of the first p-type layer 501, and the first n-type layer. The Si concentration and thickness of the n-In0.47Ga0.53P layer 502 are not particularly specified.

  Based on the semiconductor epitaxial layer 500 shown as the reference example, the light emitting thyristor of the reference example is manufactured through the same steps as the manufacturing steps described with reference to FIG. 3 and the electrical characteristics are measured. It was done. As a result of analyzing the semiconductor epitaxial layer 500 in the depth direction by secondary ion mass spectrometry, a profile of data shown in FIG. 8 is obtained.

  FIG. 8 is a graph showing the diffusion state of Zn doped as a dopant in the p-In 0.47 Ga 0.53 P layer of the first p-type layer 501. In this graph, the horizontal axis represents the depth from the top surface of the semiconductor epitaxial layer 500, and the vertical axis represents the concentration of Zn and the In secondary ion intensity.

  That is, it was found that Zn doped as a dopant in the p-In0.47Ga0.53P layer of the first p-type layer 501 was diffused into the n-In0.47Ga0.53P layer of the first n-type layer. Since Zn is known to move relatively easily in InGaP, it is fully conceivable that the thermal diffusion phenomenon will occur even at the epitaxial growth temperature.

  FIG. 9 is an explanatory view schematically showing the state of Zn diffusion in the epitaxial growth process when the semiconductor epitaxial layer 500 is formed. Note that only the first p-type layer 501 and the first n-type layer 502 are shown here.

  As shown in the figure, in epitaxial growth, growth is from the lower side of the layer. As shown in FIG. 6A, when growing the p-InGaP layer of the first p-type layer 501, the diffusion of Zn remains only in the same layer. However, as shown in FIG. 6B, while the upper p-Al0.4Ga0.6As layer is stacked, Zn diffuses to the lower side, and the n-InGaP in the region where the Zn concentration becomes larger than the Si concentration. Layer becomes P-type. As shown in FIG. 6C, when the upper layer is further grown, all n-InGaP layers become p-type to become p-type InGaP layers, depending on the growth time.

Here, assuming that the diffusion of Zn is always constant under the same epitaxial growth conditions, a thyristor element is formed using several semiconductor epitaxial layers 500 having different n-In 0.47 Ga 0.53 P layer thicknesses, and an anode-gate. The forward IV characteristics between (between AG) were measured. FIG. 10 is a graph showing the measurement results at this time, in which the current value is taken on the vertical axis and the voltage value is taken on the horizontal axis. Here, the measurement results of the semiconductor epitaxial layers 500 having n-In 0.47 Ga 0.53 P layer thicknesses of 8.7 nm, 10.7 nm, 12.7 nm, and 14.7 nm are shown. Here, the concentration of the dopant Si in the n-InGaP layer and the concentration of the dopant Zn in the p-InGaP layer are the design values shown in FIG. 1, and are 5.0E16 / cm ³ and 4.0E18 / cm, respectively. It is ^three .

Ｉｓ：飽和電流密度
ｅ ：電気素量
Ｖ ：電圧
ｎ ：理想因子
ｋ_Ｂ：ボルツマン定数
Ｔ ：温度 In general, the forward IV characteristic of a semiconductor is expressed by the following equation (1).

Is: saturation current density e: electric charge
V: Voltage n: Ideality factor k _B : Boltzmann constant T: Temperature

  In this equation, it is known that n is called an ideal factor or n value, and approaches 1 when the diffusion current is dominant and approaches 2 when the recombination current is dominant. Here, in the forward I-V characteristic of FIG. 10, the value of n at the steepest point of inclination is defined as n value. In other words, the n value is the minimum value of n.

  FIG. 11 plots the n value calculated based on the equation 1, taking the thickness of the n-In 0.47 Ga 0.53 P layer at the time of design of the semiconductor epitaxial layer 500 as the abscissa and the n value as the ordinate. It is a graph.

  As apparent from the graph, it was found that the n value takes a minimum value. This result also means that good results can not be obtained simply by bonding p-In0.47Ga0.53P and n-Al0.15Ga0.85As. The reason is because of the leakage current due to interface state formation at the time of etching as described above.

  For this reason, in the present invention, in pn junction formation by epitaxial growth of AlGaAs / InGaP system, Zn doped as p-type dopant during epitaxial growth is diffused by heat treatment during epitaxial growth or later, and appropriate at the InGaP layer / AlGaAs layer interface. A semiconductor epitaxial layer having a concentration is formed. The diffusion of Zn depends on the time since the formation of the Zn-containing layer, the epitaxial growth temperature, and the doping concentration of Zn, but as a result of each epitaxial growth, Zn is moderately diffused to the InGaP layer / AIGaAs layer interface Is the point. Therefore, it is important to appropriately design the thickness of the n-InGaP layer through which Z diffuses.

In the semiconductor epitaxial layer 10 (FIG. 1) according to the present invention, as described above, when the Zn concentration of the p-In 0.47 Ga 0.53 P layer 101 c of the first p-type layer 101 is 4.0E18 / cm ³ , the first n-type The thickness of the n-In 0.47 Ga 0.53 P layer 102 a of the layer 102 is 11 nm. This is because, as is apparent from FIG. 11, the n value becomes a local minimum value when the thickness of the n-In 0.47 Ga 0.53 P layer 102 a is about 11 nm under the manufacturing conditions here.

  FIG. 4 is a graph in which the concentration distribution in the depth direction of Zn in the semiconductor epitaxial layer 10 at this stage is determined by secondary ion mass spectrometry, and the result is plotted. In the graph, the horizontal axis represents the depth from the top surface of the semiconductor epitaxial layer 10 (FIG. 1), and the vertical axis represents the Zn concentration and In secondary ion intensity. Moreover, FIG. 5 is the elements on larger scale which expanded the area | region of 545 nm-570 nm in FIG. 4 to the same direction.

  The semiconductor epitaxial layer 10 shown in FIG. 1 is the Zn concentration and thickness of the p-In 0.47 Ga 0.53 P layer of the first p-type layer 501 of the semiconductor epitaxial layer 500 as a reference example shown in FIG. It has a configuration in which the Si concentration and thickness of the n-In0.47Ga0.53P layer 502 are specified as design values, but as described in FIG. 9, the p-Al0.4Ga0.6As layer 101b is epitaxially grown. In the process, Zn diffuses in the lower layer to change the concentration distribution of Zn, thereby forming a semiconductor epitaxial layer 10 'showing the concentration distribution of Zn in the depth direction shown in FIG. Hereinafter, the semiconductor epitaxial layer having the concentration distribution of Zn shown in FIG. 4 is distinguished as a semiconductor epitaxial layer 10 '.

  In FIG. 4, the line plotted with ◇ indicates the Zn concentration, and the line plotted with □ is the secondary ion intensity of In. The logarithmic approximation line L1 (FIG. 5) provided in the Zn concentration data is the In0.47Ga0.53P layer (101c, 102a) / Al0. The dotted line L2 (FIG. 5) provided in the In secondary ion intensity data is a logarithmic approximation line of the Zn concentration near the interface of the l5Ga0.85As layer 102b and the In0.47Ga0.53P layer (101c, 102a) / Al0. It is a linear approximation line of In secondary ion intensity near the interface of the l5Ga0.85As layer 102b. The solid line L3 (FIG. 5) provided in the In secondary ion intensity data is the average intensity of the In secondary ion intensity. The average intensity of In secondary ion intensity was determined by the average of a set of points exhibiting an intensity of 80% or more of the peak intensity.

  The portion where the In secondary ion intensity is rapidly decreasing is considered to be the boundary between the InGaP layers (101c and 102a) and the AlGaAs layer (102b), and the interface was determined by the following method. That is, the intersection point of the solid line L3 (FIG. 5), which is the average of the In secondary ion intensity, and the broken line L2 (FIG. 5), which is an approximation line of the portion where the intensity sharply decreases, was defined as the interface between the two.

Next, the concentration of Zn at the interface was determined from the value of the logarithmic approximation line L1 (FIG. 5) of the Zn concentration at the intersection. As a result, in the same figure (FIG. 5), the concentration of Zn was determined to be 1.3E18 / cm ³ .

  To the samples of thickness n-In0.47Ga0.53P (corresponding to 102a in FIG. 1) shown in FIG. 10, samples having further different layer thicknesses are added, and for these samples, second-order samples are similarly obtained. Ion mass (SIMS) analysis was performed, and In0.47Ga0.53P layer / Al0. The Zn concentration of the l5Ga0.85As layer interface was determined. On the other hand, a thyristor element was formed on each of these samples, the forward IV characteristics between the anode and the gate (between AG) were measured, and the n value was determined based on the equation 1 by the method described above.

  FIG. 6 is a graph in which the Zn concentration at the interface is taken on the horizontal axis and the n value is taken on the vertical axis, and the measurement results for each sample are plotted.

As apparent from the graph of the same figure, it was found that the interface Zn concentration shows a good n value in a certain range.
Since the interface position of the pn junction is formed in the vicinity of the In0.47Ga0.53P layer (101c, 102a) /Al0.15Ga0.85As102b interface, the n value in the forward IV characteristic is suppressed to a small value, so the diffusion is The current flows well and as a result good electrical characteristics are obtained. The range n values in the data of FIG. 6 is 1.46 or less of the range, that is, 1E18 / cm ³ from 2E18 / cm ^3.

  As described above, Zn doped in the p-InGaP layer (101c) diffuses to the n-InGaP layer (102a) by heat during epitaxial growth and the like, and as a result, the pn junction interface becomes InGaP layer (101c, 102a) / AlGaAs Since the state is formed at the layer (102b) interface, the n value (ideal factor) of the forward IV characteristic between the anode and the gate (between AG) approaches 1. That is, good inter-AG forward IV characteristics can be obtained. If the diffusion of Zn is insufficient or if the diffusion progresses more than necessary, the inter-AG forward IV characteristics deteriorate.

  In the embodiment, the composition ratio of Al to Ga is, for example, Al.sub.0. Although 15Ga0.85As is used, the composition ratio of Al to Ga is not limited to this value, and all composition ratios from GaAs to AlAs can be used, and similar effects can be obtained.

  As described above, according to the light-emitting thyristor of the present embodiment, the interface position of the pn junction is formed in the vicinity of the In0.47Ga0.53P layer / Al0.15Ga0.85As interface, and hence the forward direction IV Since the n value in the characteristics can be kept small, the diffusion current flows well, and as a result, good electrical characteristics can be obtained.

Second Embodiment
FIG. 12 is a diagram showing the configuration of the semiconductor epitaxial layer 210 of the second embodiment constituting the light emitting thyristor according to the present invention.

  This semiconductor epitaxial layer 210 mainly differs from the semiconductor epitaxial layer 10 of the first embodiment shown in FIG. 1 described above in the configuration of the first p-type layer 201 and the first n-type layer 202. Therefore, portions in common with this semiconductor epitaxial layer 10 of the first embodiment described above are denoted by the same reference symbols, or the description thereof is omitted while omitting the drawings, and different points are emphasized. Explain to.

  As shown in FIG. 12, in the semiconductor epitaxial layer 210 shown here, the first p-type layer 201 is formed in the order of the p-GaAs layer, the p-Al0.4Ga0.6As layer, and the p-Al0.4Ga0.6As layer from the upper layer The first n-type layer 202 is formed in this order from the upper layer to the n-In0.47Ga0.53P layer and the n-Al0.15Ga0.85As layer.

In addition, the Zn concentration of the p-Al0.4Ga0.6As layer of the first p-type layer 201 is 2.0E19 / cm ³ (thickness 15 nm), and the thickness of the n-In0.47Ga0.53P layer of the first n-type layer 202 Is 70 nm.

As described above, in the semiconductor epitaxial layer 210 of the present embodiment, a p-Al0.4Ga0.6As layer is used as the lowermost layer of the first p-type layer 201 instead of the p-In0.47Ga0.53P layer. The reason for this is that the doping of Zn for In 0.47 Ga 0.53 P has an upper limit of about 4.0E18 / cm ^{3 at the} epi growth temperature with good crystallinity, while the doping into the Al 0.4 Ga 0.6 As layer This is because the doping of Zn can realize a concentration of 1.0E19 / cm ³ or so. FIG. 12 shows a design structure of the semiconductor epitaxial layer 210 when the Zn concentration of the p-Al0.4Ga0.6As layer is 2.0E19 / cm < ³ >.

In the semiconductor epitaxial layer 210, the thickness of the n-In0.47Ga0.53P layer is 70 nm, because the higher the Zn concentration, the larger the diffusion of Zn at the same epi growth temperature and epi growth time. . By appropriately adjusting the thickness of the In0.47Ga0.53P layer to 70 nm as described above, the Zn concentration at the In0.47Ga0.53P layer / Al0.15Ga0.85As layer interface can be favorably set to an n value of 1.4 or less. a range, that is 1E18 ^/ cm ³ ~2E18 ^/ cm 3 of the range to fit it can be.

As described above, in the semiconductor epitaxial layer 210 of the present embodiment, it is possible to increase the concentration to 2.0E19 / cm ³ by performing Zn doping on the Al0.4Ga0.6As layer. Even if the doping concentration of Zn is different, the Zn concentration at the interface of In0.47Ga0.53P layer / Al0.15Ga0.85As layer can be in a good range.

Third Embodiment
FIG. 13 is a block diagram showing a print head 1200 according to a third embodiment based on the optical print head of the present invention.

  As shown in the figure, the light emitting element unit 1202 is mounted on the base member 1201. The light emitting element unit 1202 is obtained by mounting the light emitting thyristors 20 according to the first or second embodiment on the mounting substrate in an array. FIG. 14 is a plan layout view showing one configuration example of the light emitting element unit 1202, and on the mounting substrate 1202e, a semiconductor element array in which the light emitting thyristors 20 described in the above embodiments are arranged in an array is shown. A plurality of light emitting units 1202 a are disposed along the longitudinal direction. In addition, electronic components for driving and controlling the light emitting unit 1202a are disposed on the mounting substrate 1202e, and wiring is formed. Areas 1202b and 1202c for electronic component mounting, wiring and connection, and external control A connector 1202 d or the like for supplying a signal, a power source, and the like is provided.

  Above the light emitting portion of the light emitting portion unit 1202a, a rod lens array 1203 as an optical element for condensing the light emitted from the light emitting portion is disposed. The rod lens array 1203 has a large number of columnar optical lenses arranged along the light emitting portions (in this case, the arrangement of the light emitting thyristors 20 in FIG. 2C) in which the light emitting portion units 1202a are linearly arranged. It is held at a predetermined position by a lens holder 1204 corresponding to an optical element holder.

  The lens holder 1204 is formed to cover the base member 1201 and the light emitting element unit 1202 as shown in the figure. The base member 1201, the light emitting element unit 1202, and the lens holder 1204 are integrally held by a clamper 1205 disposed via the openings 1201 a and 1204 a formed in the base member 1201 and the lens holder 1204. . Therefore, the light generated by the light emitting element unit 1202 is irradiated to a predetermined external member through the rod lens array 1203. The print head 1200 is used, for example, as an exposure apparatus such as an electrophotographic printer or an electrophotographic copying apparatus.

  As described above, according to the print head 1200 of the present embodiment, since the light emitting thyristor 20 of the first or second embodiment is used as the light emitting unit 1202a, the n value in the forward IV characteristic is obtained. It is possible to provide a print head 1200 with excellent electrical characteristics, which is small.

Fourth Embodiment
FIG. 15 is a main part configuration diagram schematically showing a main part configuration of an image forming apparatus 1300 of a fourth embodiment based on the image forming apparatus of the present invention.

  As shown in the figure, in the image forming apparatus 1300, four process units 1301 to 1304 for forming images of yellow, magenta, cyan and black respectively on the conveyance path 1320 of the recording medium 1305 They are arranged in order from the upstream side. Since the internal configuration of these process units 1301 to 1304 is common, the internal configuration of these process units 1303 will be described by way of example.

  In the process unit 1303, a photosensitive drum 1303a as an image carrier is rotatably disposed in the arrow direction, and around the photosensitive drum 1303a, electricity is supplied to the surface of the photosensitive drum 1303a sequentially from the upstream side of the rotational direction. A charging device 1303 b for charging and an exposure device 1303 c for selectively irradiating light to the surface of the charged photosensitive drum 1303 a to form an electrostatic latent image are provided. Further, a developing device 1303d for causing a toner of a predetermined color (cyan) to adhere to the surface of the photosensitive drum 1303a on which the electrostatic latent image is formed to generate a developed image, and the toner remaining on the surface of the photosensitive drum 1303a A cleaning device 1303e to be removed is disposed. The drum or roller used in each of these devices is rotated by a drive source and gear (not shown).

  Further, the image forming apparatus 1300 mounts a sheet cassette 1306 for storing the recording medium 1305 such as paper in a stacked state in the lower part thereof, and separates the recording medium 1305 one by one above and conveys it. A hopping roller 1307 is provided. Furthermore, by pinching the recording medium 1305 with the pinch rollers 1308 and 1309 on the downstream side of the hopping roller 1307 in the conveyance direction of the recording medium 1305, the skew of the recording medium 1305 is corrected, and the process units 1301 to 1304 are processed. The registration rollers 1310 and 1311 are disposed to convey the sheet. The hopping roller 1307 and the registration rollers 1310 and 1311 are interlocked and rotated by a drive source and a gear (not shown).

  Transfer rollers 1312 formed of semiconductive rubber or the like are disposed at positions facing the photosensitive drums of the process units 1301 to 1304, respectively. Then, in order to transfer the toner on the photosensitive drums 1301 a to 1304 a onto the recording medium 1305, a predetermined potential difference is generated between the surface of the photosensitive drums 1301 a to 1304 a and the surface of each of these transfer rollers 1312. It is done.

  The fixing device 1313 has a heating roller and a backup roller, and fixes the toner transferred on the recording medium 1305 by pressing and heating. Further, the discharge rollers 1314 and 1315 sandwich the recording medium 1305 discharged from the fixing device 1313 together with the pinch rollers 1316 and 1317 of the discharge unit, and convey the recording medium 1305 to the recording medium stacker 1318. The discharge rollers 1314 and 1315 are interlocked to rotate by a drive source and a gear (not shown). The print head 1200 described in the third embodiment is used as the exposure device 1303 c used here.

Next, the operation of the image forming apparatus having the above configuration will be described.
First, the recording medium 1305 stored in a stacked state in the sheet cassette 1306 is separated one by one from the top by the hopping roller 1307 and conveyed. Subsequently, the recording medium 1305 is nipped by the registration rollers 1310 and 1311 and the pinch rollers 1308 and 1309, and is conveyed to the photosensitive drum 1301a and the transfer roller 1312 of the process unit 1301. After that, the recording medium 1305 is nipped by the photosensitive drum 1301 a and the transfer roller 1312, and the toner image is transferred onto the recording screen, and at the same time, the recording medium 1305 is conveyed by the rotation of the photosensitive drum 1301 a.

  Similarly, the recording medium 1305 sequentially passes through the process units 1302 to 1304, and in the process of passing, the electrostatic latent images formed by the exposure devices 1301 c to 1304 c are developed by the developing devices 1301 d to 1304 d. The toner image is sequentially superimposed and transferred on the recording screen. Thereafter, the recording medium 1305 on which the toner image is fixed by the fixing device 1313 is nipped by the discharge rollers 1314 and 1315 and the pinch rollers 1316 and 1317, and discharged to the recording medium stacker unit 1318 outside the image forming apparatus 1300. Through the above process, a color image is formed on the recording medium 1305.

  As described above, according to the image forming apparatus of the present embodiment, since the print head 1200 described in the third embodiment is adopted, the electrical characteristics are obtained in which the n value in the forward IV characteristic is suppressed to a small value. An image forming apparatus provided with the excellent print head of

  Moreover, in the above-mentioned claims and embodiments, the words "upper" and "lower" are used, but these are for convenience, and it is absolute in the state where each semiconductor and device are arranged. It does not limit the positional relationship.

  Although this embodiment has been described using a color printer as the image forming apparatus, the present invention can also be applied to a single color printer, a copier, a fax machine, and a multifunction machine combining these.

    DESCRIPTION OF SYMBOLS 10 semiconductor epitaxial layer, 20 light emitting thyristor, 51 anode electrode, 52 gate electrode, 53 cathode electrode, 60 pn junction interface, 101 1st p-type layer, 101a p-GaAs layer, 101 b p-Al 0.4 Ga 0.6 As layer, 101 c p -In0.47Ga0.53P layer, 102 first n-type layer, 102an-In0.47Ga0.53P layer, 102b n-Al0.15Ga0.85As layer, 103 second p-type layer, 103a p-Al0.15Ga0.85As layer, 103b p-Al10.35Ga0.65As layer, 104 second n-type layer, 104an-Al0.15Ga0.85As layer, 104b n-Al0.4Ga0.6As layer, 104cn-In0.47Ga0.53P layer, 104d n-A l0.25Ga0.75As layer, 201 first p-type layer, 202 first n-type layer, 210 semiconductor epitaxial layer, 1200 print head, 1201 base member, 1201a opening, 1202 light emitting element unit, 1202a light emitting unit, 1202b, 1202c area , 1202d connector, 1202e mounting substrate, 1203 rod lens array, 1204 lens holder, 1204a opening, 1205 clamper, 1300 image forming apparatus, 1301 to 1304 process unit, 1303a photosensitive drum, 1303b charging device, 1303c exposure device, 1303d developing device Apparatus, 1303e cleaning apparatus, 1301a to 1304a photosensitive drum, 1305 recording medium, 1306 Paper cassette, 1307 hopping roller, 1308, 1309 pinch roller, 1310, 1311 registration roller, 1312 transfer roller, 1313 fixing device, 1314, 1315 discharge roller, 1316, 1317 pinch roller, 1318 recording medium stacker section, 1320 conveyance path.

Claims (5)

In a light emitting thyristor having an anode layer, a gate layer, and a cathode layer,
In a pn junction composed of an n-type AlGaAs layer of an epitaxial layer and a p-type InGaP layer grown on a GaAs substrate, Zn is contained as a dopant in the InGaP layer, and at the interface between the n-type AlGaAs layer and the p-type InGaP layer light-emitting thyristor in which the concentration of the ^Zn, characterized in that in the range of ^{1E18 / cm 3 ~2E18 / cm 3} .   The p-type InGaP layer is formed by changing an n-type InGaP layer to p-type by Zn diffusion of an InGaP layer containing Zn as a dopant provided adjacently as a Zn supply source. The light emitting thyristor according to claim 1.   The p-type InGaP layer is formed by changing an n-type InGaP layer to p-type by Zn diffusion of an AlGaAs layer containing Zn as a dopant provided adjacently as a supply source of Zn. The light emitting thyristor according to claim 1.   An optical print head comprising a plurality of light emitting thyristors according to any one of claims 1 to 3. An image forming apparatus comprising the optical print head according to claim 4.

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