JP2023018699A - Semiconductor light-emitting element, exposure device, image forming apparatus, and method for manufacturing semiconductor light-emitting element - Google Patents

Abstract

To provide a semiconductor light-emitting element that can efficiently extract light to the outside.SOLUTION: A semiconductor light-emitting element (1) comprises: an electrode of a first conductivity type (18); and a semiconductor lamination part of a second conductivity type (10) that has a first surface in contact with the electrode (18). The semiconductor lamination part (10) has a first semiconductor layer (10a) and a light-emitting layer (14) that is in contact with the first semiconductor layer (10a). The semiconductor lamination part (10) is formed with impurity diffusion areas (17a, 17b) that reach the light-emitting layer (14) from a first surface (10b) through a first semiconductor layer (10a) and in which impurities of the first conductivity type are dispersed. The electrode (18) is arranged in an area not overlapping light-emitting areas (17a1, 17b1) formed through joining of the light-emitting layer (14) and the impurity diffusion areas (17a, 17b) in the lamination direction of the first semiconductor layer (10a) and the light-emitting layer (14).SELECTED DRAWING: Figure 2

Description

The present invention relates to a semiconductor light emitting device, an exposure apparatus, an image forming apparatus, and a method for manufacturing a semiconductor light emitting device.

2. Description of the Related Art Techniques for improving luminous efficiency in semiconductor light emitting devices such as LEDs (Light Emitting Diodes) and semiconductor lasers have been proposed (see, for example, Patent Document 1).

JP-A-8-78775

However, in the above-described conventional semiconductor light emitting device, there is a possibility that the light generated inside is blocked by the electrodes and cannot be efficiently extracted to the outside.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor light emitting device capable of efficiently extracting generated light to the outside, a manufacturing method thereof, and an exposure apparatus and an image forming apparatus to which the semiconductor light emitting device is applied.

A semiconductor light emitting device according to an aspect of the present invention includes an electrode of a first conductivity type, and a semiconductor lamination portion of a second conductivity type different from the first conductivity type, the semiconductor lamination portion having a first surface in contact with the electrode. The semiconductor lamination part has a first semiconductor layer and a light emitting layer in contact with the first semiconductor layer, and the semiconductor lamination part has the first semiconductor layer from the first surface. and an impurity diffusion region in which the impurity of the first conductivity type is diffused is formed, and the electrode extends in the stacking direction of the first semiconductor layer and the light emitting layer. and a light emitting region formed by bonding the light emitting layer and the impurity diffusion region.

A method for manufacturing a semiconductor light emitting device according to another aspect of the present invention is a second conductive type semiconductor lamination having a first semiconductor layer including a first surface and a light emitting layer in contact with the first semiconductor layer. forming a mask having a diffusion window on the first surface of the semiconductor stack; forming an impurity material layer in a region including the diffusion window; Impurities are diffused from a material layer into the semiconductor lamination portion through the diffusion window, reach into the light emitting layer from the first surface, and are of a first conductivity type different from the second conductivity type. forming a diffusion region; and forming an electrode in a region not overlapping a light emitting region formed by joining the light emitting layer and the impurity diffusion region in a stacking direction of the first semiconductor layer and the light emitting layer. and a step.

According to the semiconductor light emitting device of the present invention, the generated light can be efficiently extracted to the outside.

1 is a cross-sectional view schematically showing the configuration of a semiconductor light emitting device according to a first embodiment; FIG. 4 is a diagram showing the positional relationship between the light emitting region and the p-side electrode of the semiconductor light emitting device according to the first embodiment; FIG. 4 is a flow chart showing manufacturing steps of the semiconductor light emitting device according to the first embodiment. (A) and (B) are a plan view and a perspective view showing a mask used for forming a Zn diffusion region of the semiconductor light emitting device according to the first embodiment. (A) and (B) are cross-sectional views showing a solid-phase diffusion process of a semiconductor light emitting device. FIG. 4 is a perspective view showing an electrode formed after formation of the Zn diffusion region; FIG. 4 is a cross-sectional view schematically showing the configuration of a semiconductor light emitting device of a comparative example; FIG. 4 is a cross-sectional view schematically showing the configuration of a semiconductor light emitting device according to a second embodiment; (A) and (B) are a plan view and a perspective view showing a mask used for forming a Zn diffusion region of a semiconductor light emitting device according to a second embodiment. FIG. 11 is a plan view showing a light-emitting element array of an exposure apparatus according to a third embodiment; It is a sectional view showing an exposure apparatus concerning a 3rd embodiment. FIG. 12 is a diagram schematically showing the configuration of an image forming apparatus according to a fourth embodiment; FIG.

A semiconductor light emitting device, an exposure apparatus, an image forming apparatus, and a method for manufacturing a semiconductor light emitting device according to embodiments of the present invention will be described below with reference to the drawings. The following embodiments are merely examples, and various modifications are possible within the scope of the present invention. In the drawings, the same reference numerals are given to the same or corresponding configurations.

<<1>> First Embodiment <<1-1>> Structure FIG. 1 is a cross-sectional view schematically showing the configuration of a semiconductor light emitting device 1 according to a first embodiment. FIG. 2 is a diagram showing the positional relationship between the light emitting region of the semiconductor light emitting device 1 and the p-side electrode 18. As shown in FIG. The semiconductor light emitting element 1 is a light emitting diode (LED). The semiconductor light emitting device 1 has a p-side electrode 18 as an electrode of the first conductivity type, and a first surface 10b that is a surface (upper surface in the figure) in contact with the p-side electrode 18, which is different from the first conductivity type. It has an n-type semiconductor lamination portion 10 which is a semiconductor lamination portion of the second conductivity type, a semiconductor substrate 16 such as an n-GaAs substrate, and an n-side electrode 19 .

The semiconductor lamination portion 10 is, for example, an epitaxial growth layer composed of a plurality of n-type semiconductor layers. The semiconductor lamination portion 10 may be either an epitaxially grown layer epitaxially grown on a semiconductor substrate 16 or an epitaxially grown layer epitaxially grown on a growth substrate (not shown) and moved onto the semiconductor substrate 16.

The semiconductor lamination portion 10 includes, for example _, a contact layer 11 that is an n-GaAs layer and a _lateral current diffusion layer (“current 12, a reverse diffusion current blocking layer (also referred to as a “diffusion current element layer”) 13 which is an n-Al _0.6 Ga _0.4 As layer, and n-Al _0.22. It has a light emitting layer (also referred to as “active layer”) 14 which is a Ga _{0.22 As layer and a current diffusion blocking layer 15 which is an n-Al 0.4 Ga 0.6} As layer. The contact layer 11 , current diffusion layer 12 , and current diffusion blocking layer 13 constitute a first semiconductor layer 10 a sandwiched between the light emitting layer 14 and the p-side electrode 18 . In addition, the bandgap of the light emitting layer 14 is smaller than the bandgap of each layer forming the first semiconductor layer 10a.

In the semiconductor lamination portion 10, Zn (zinc) is diffused as a p-type impurity (here, p-type dopant) from the first surface 10b through the first semiconductor layer 10a into the light emitting layer 14. A first Zn diffusion region 17a and a second Zn diffusion region 17b are formed as impurity diffusion regions. The first Zn diffusion region 17a and the second Zn diffusion region 17b partially overlap in the first semiconductor layer 10a.

The first Zn diffusion region 17a and the second Zn diffusion region 17b are formed by diffusion processing of Zn, which is a p-type dopant. The Zn diffusion treatment is performed, for example, by solid-phase diffusion. Solid phase diffusion is a method in which a solid thin film containing a large amount of impurities is deposited on a semiconductor layer and heated to diffuse (thermally diffuse) the impurities into the semiconductor layer.

Strictly speaking, in solid-phase diffusion, the diffusion rate varies depending on various conditions such as the composition of the semiconductor material and the concentration of the impurity, but the diffusion of the impurity proceeds generally isotropically at the same rate. Also, in an LED, the light emitting region is generally formed at a depth of about 1 μm from the surface. Therefore, when an impurity diffusion region having a depth of about 1 μm is formed by diffusion processing, diffusion in a lateral direction perpendicular to the depth direction (that is, the thickness direction) also occurs by about 1 μm.

For this reason, as shown in FIGS. 1 and 2, the first Zn diffusion region 17a and the second Zn diffusion region 17b are wide at the position of the first surface 10b, but are It becomes narrower toward 10 a and the light emitting layer 14 . In this way, by forming the first Zn diffusion region 17a and the second Zn diffusion region 17b by diffusion treatment, the boundary between the first Zn diffusion region 17a and the second Zn diffusion region 17b and the light emitting layer 14 It is possible to limit the size of the first light emitting region 17a1 and the second light emitting region 17b1 formed in the vicinity of the plane (that is, the pn junction). In other words, by forming the first Zn diffused region 17a and the second Zn diffused region 17b by diffusion treatment, the positions and sizes of the first light emitting region 17a1 and the second light emitting region 17b1 can be changed to desired positions and sizes. can be sized. Therefore, a non-light-emitting region 17c1 can be provided between the first light-emitting region 17a1 and the second light-emitting region 17b1. That is, the p-side electrode 18 is arranged in a region that overlaps neither the first light emitting region 17a1 nor the second light emitting region 17b1 in the stacking direction (that is, when the semiconductor light emitting device 1 is viewed from directly above). It is 1 and 2, the p-side electrode 18 is a region that overlaps neither the first light emitting region 17a1 nor the second light emitting region 17b1 in the stacking direction, and is the first Zn diffused region 17a and the second light emitting region 17b1. 2 on the Zn diffusion region 17b.

1 and 2, the p-side electrode 18 is arranged directly above the non-light-emitting region 17c1, which is a region other than the first light-emitting region 17a1 and the second light-emitting region 17b1. In such a structure, the main current I flowing from the p-side electrode 18 flows as indicated by the arrow in FIG. It occurs in the light emitting region 17a1 and the second light emitting region 17b1.

<<1-2>> Manufacturing Method FIG. 3 is a flow chart showing manufacturing steps of the semiconductor light emitting device 1 . 4A and 4B are a plan view and a perspective view showing a mask 110 used for forming the Zn diffusion region of the semiconductor light emitting device 1. FIG. FIG. 4B is a cross-sectional view along line 3B-3B of the structure of FIG. 4A. 5A and 5B are cross-sectional views showing the solid phase diffusion process of the semiconductor light emitting device 1. FIG.

First, a semiconductor lamination portion 10, which is an epitaxial growth layer, is formed and placed on a semiconductor substrate 16, which is an n-GaAs substrate (steps S1 and S2 in FIG. 3). The semiconductor stack 10 may be grown on the semiconductor substrate 16 .

Next, a mask 110 having diffusion windows 110a and 110b is formed on the semiconductor lamination portion 10, which is an epitaxial growth layer (step S3 in FIG. 3). Here, diffusion windows 110a and 110b are of the same shape.

Next, an impurity material layer 120 is formed in a region including the diffusion windows 110a and 110b (step S4 in FIG. 3). The impurity material layer 120 is a ZnO/SiO ₂ mixed film layer containing Zn, and is formed by sputtering, for example. After that, solid-phase diffusion of impurities is performed by heating (annealing) (step S5 in FIG. 3). Zn is diffused from the impurity material layer 120 into the semiconductor lamination portion 10 through the diffusion windows 110a and 110b, reaches the light emitting layer 14 from the first surface 10b, and is the first Zn diffusion in which p-type impurities are diffused. A region 17a and a second Zn diffusion region 17b are formed. Note that the impurity material layer 120 may be covered with an annealing cap film before heating. Further, in solid-phase diffusion, it is desirable that the pn junction surface is formed at a depth within the range of 0.5 to 2 μm.

Next, the impurity material layer 120 and the mask 110 are removed (step S6 in FIG. 3).

Next, the p-side electrode 18 is a region that does not overlap the first and second light emitting regions 17a1 and 17b1 formed by bonding the light emitting layer 14 and the first and second Zn diffused regions 17a and 17b. , are formed on regions electrically connected to the first and second Zn diffusion regions 17a and 17b, that is, on the first and second Zn diffusion regions 17a and 17b (step S7 in FIG. 3). Through the above steps, the semiconductor light emitting device 1 as shown in the perspective view of FIG. 6 is formed.

<<1-3>> Effect FIG. 7 is a cross-sectional view schematically showing the configuration of a semiconductor light emitting device of a comparative example. In the semiconductor light emitting device of FIG. 7, the p-side electrode 18 is formed directly above the light emitting region in the vicinity of the junction surface between the impurity diffusion layer 17 and the light emitting layer 14 . In this case, since part of the light generated in the light emitting region is blocked by the p-side electrode 18, the light extraction efficiency is lowered. Therefore, the luminous efficiency is low.

In contrast, according to the semiconductor light emitting device 1 according to the first embodiment, since the p-side electrode 18 is arranged at a position shifted from the first and second light emitting regions 17a1 and 17b1, the light is blocked. A decrease in the light extraction efficiency due to this is unlikely to occur. Therefore, luminous efficiency can be improved.

In addition, although the case where two light emitting regions exist was illustrated in the above description, the number of light emitting regions is not limited to two. The number of light emitting regions may be one.

Also, in the above description, an example in which the first conductivity type is the p-type and the second conductivity type is the n-type has been described, but the first conductivity type is the n-type and the second conductivity type is the p-type The present invention can also be applied to semiconductor light emitting devices.

Further, the semiconductor materials and composition ratios constituting the semiconductor lamination portion 10 are not limited to the above examples, and various modifications are possible.

<<2>> Second Embodiment <<2-1>> Structure FIG. 8 is a cross-sectional view schematically showing the configuration of a semiconductor light emitting device 2 according to a second embodiment. In the semiconductor light emitting device 2, the first Zn diffusion region 27a as the first impurity diffusion region and the second Zn diffusion region 27b as the second impurity diffusion region are spaced apart in the first semiconductor layer 10a. In the semiconductor lamination portion 20, the first Zn diffusion region 27a and the second Zn diffusion region 27b are connected between the first Zn diffusion region 27a and the second Zn diffusion region 27b. A third Zn diffusion region 27c is formed in the first semiconductor layer 20a from the surface 20b and does not reach the light emitting layer 14 as a third impurity diffusion region. Also, the p-side electrode 18 is arranged in a region overlapping with the third Zn diffusion region 27c in the stacking direction. Regarding points other than the above, the structure of the semiconductor light emitting device 2 of the second embodiment is the same as that of the first embodiment.

<<2-2>> Manufacturing Method FIGS. 9A and 9B are a plan view and a perspective view showing a mask used for forming the Zn diffusion region of the semiconductor light emitting device 2 according to the second embodiment. The method of manufacturing a semiconductor light emitting device according to the second embodiment differs from the first embodiment in that the mask 210 has a plurality of microscopic windows 210c, which are small diffusion windows, in addition to the diffusion windows 210a and 210b. It is different from the manufacturing method in

In the second embodiment, a structure having a plurality of minute windows 210c as shown in FIGS. 9A and 9B is used when Zn is diffused. As shown in FIG. 9, Zn diffusion from the small window 210c reduces the amount of Zn diffused compared to the large diffusion windows 210a and 210b. This is because the supply amount of Zn is small. Since lateral diffusion also occurs in the micro-windows 210c, adjoining Zn diffused regions formed from adjacent micro-windows 210c can be combined with each other if the design is performed appropriately. The mask 210 is removed after the Zn diffusion, and the p-side electrode 18 is formed in the region where the Zn diffusion has not reached the light emitting layer 14 as shown in FIG.

Regarding points other than the above, the manufacturing method of the semiconductor light emitting device 2 of the second embodiment is the same as that of the first embodiment.

<<2-3>> Effect In the first embodiment, there is a restriction that the p-side electrode 18 is formed above the laterally diffused portion. On the other hand, in the second embodiment, it is possible to more clearly separate the light emitting region and the electrode position. In other words, light emission occurs isotropically at 360 degrees, and light traveling in oblique directions is also generated. In the second embodiment, it is possible to reduce light shielding more than in the first embodiment, and it is possible to further improve the luminous efficiency.

<<3>> Third Embodiment FIG. 10 is a schematic plan view showing a semiconductor light emitting element array 31 of an optical print head according to a third embodiment. The semiconductor light emitting element array 31 has a plurality of semiconductor light emitting elements 1 regularly arranged on a base portion 310 . A driving circuit 310 a for driving the plurality of semiconductor light emitting elements 1 is provided in or on the base member 310 . Therefore, base material portion 310 is a printed wiring board. As the semiconductor light emitting device 1 of the semiconductor light emitting device array 31, the semiconductor light emitting device 1 or 2 according to the first or second embodiment can be used.

FIG. 11 is a cross-sectional view schematically showing the structure of the optical print head 30 according to the third embodiment. The optical print head 30 is an exposure device of an electrophotographic printer as an image forming apparatus using an electrophotographic process. As shown in FIG. 11, the optical print head 30 includes a base member 311, a substrate portion 310, a semiconductor light emitting element array 31 (shown in FIG. 10), and a plurality of erect equal-magnification imaging lenses. It has a lens array 313, a lens holder 314, and a clamper 315 which is a spring member. The base member 311 is a member for fixing the base material portion 310 . A side surface of the base member 311 is provided with an opening 312 for fixing the base member 310 and the lens holder 314 to the base member 311 using a clamper 315 . The lens array 313 is an optical lens group that forms an image of light emitted from the semiconductor light emitting element array 31, which is a light emitting element chip, on a photosensitive drum as an image carrier. A lens holder 314 holds the lens array 313 at a predetermined position. The clamper 315 clamps and holds each component through the opening 312 of the base member 311 and the opening of the lens holder 314 .

In the optical print head 30, one of the plurality of semiconductor light emitting elements 1 emits light according to print data, and the light emitted from the semiconductor light emitting elements 1 is passed through a lens array 313 to a photosensitive drum (described later) as an image carrier. 12). As a result, an electrostatic latent image is formed on the photoreceptor drum, and then an image made of developer is formed on a recording medium (for example, paper) through a developing process, a transfer process, and a fixing process.

Since the optical print head 30 according to the third embodiment includes the semiconductor light emitting device of either the first or second embodiment having high light extraction efficiency, it can be mounted on an image forming apparatus. can improve print quality.

<<4>> Fourth Embodiment FIG. 12 is a sectional view schematically showing the structure of an image forming apparatus 40 according to a fourth embodiment. The image forming apparatus 40 is an electrophotographic printer using the optical print head 30 as an exposure device. As shown in FIG. 12, the image forming apparatus 40 has the respective colors of yellow (Y), magenta (M), cyan (C), and black (K) arranged in order along the transport path of the recording medium 405 . four process units (also referred to as "image forming units" or "image drum units") 401Y, 401M, 401C, and 401K that electrophotographically form an image of the A hopping roller 407 for separating and conveying the recording medium 405 one by one; pinch rollers 408 and 409 arranged downstream of the hopping roller 407 in the conveying direction of the recording medium 405; It has a conveying roller 410 that pinches and conveys the recording medium 405, and a registration roller 411 that corrects the skew of the recording medium 405 and conveys it to the process units 401Y, 401M, 401C, and 401K. The image forming apparatus 40 is arranged to face the process units 401Y, 401M, 401C, and 401K, and is made of semiconductive rubber or the like. It has a transfer roller 412 as transfer means for transferring an image (also called an agent image) to the recording medium 405 . The image forming apparatus 40 also includes a fixing device 413 that heats and presses the toner image on the recording medium 405 to fix it, discharge rollers 414 and 415 , pinch rollers 416 and 417 in the discharge section, and a paper stacker section 418 . have

The process units 401Y, 401M, 401C, and 401K have the same configuration except for the toner color. Each of the process units 401Y, 401M, 401C, and 401K includes a photoreceptor drum 402 as an image carrier that carries an electrostatic latent image, and is arranged around the photoreceptor drum 402 to uniformly cover the surface of the photoreceptor drum 402. A charging device 403 for charging, an optical print head 30 as an exposure device for selectively irradiating light onto the surface of the charged photoreceptor drum 402 to form an electrostatic latent image, and an image formed on the surface of the photoreceptor drum 402. and a developing device 420 as developing means for supplying toner (developer) to the formed electrostatic latent image for development. Each of the process units 401Y, 401M, 401C, and 401K has a cleaning device 419 that removes toner remaining on the photosensitive drum 402 after the image developed on the photosensitive drum 402 is transferred to the recording medium 405. there is Note that the image forming apparatus 40 may have a reversing section 430 including a reversing path for reversing the printed surface of the recording medium 405 .

Since the image forming apparatus 40 according to the fourth embodiment uses the optical print head 30 as an exposure device, it is possible to improve print quality.

1, 2 semiconductor light emitting element 18 p-side electrode (electrode) 10, 20 semiconductor lamination portion 10a, 20a first semiconductor layer 10b, 20b first surface 11 n-GaAs layer (first layer), 12 n-Al _0.4 Ga _0.6 As layer (current diffusion layer), 13 n-Al _0.6 Ga _0.4 As layer (reverse current diffusion blocking layer), 14 n-Al _0.22 Ga _{0 .22} As layer (light-emitting layer) 15 n-Al _0.4 Ga _0.6 As layer (current diffusion blocking layer) 16 n-GaAs substrate 17a, 27a First Zn diffusion region (first impurity diffusion region), 17b, 27b second Zn diffusion region (second impurity diffusion region), 27c third Zn diffusion region (third impurity diffusion region), 17a1, 27a1 light emitting region (first light emitting region), 17b1, 27b1 light-emitting region (second light-emitting region) 18 p-side electrode 19 n-side electrode 30 optical print head (exposure device) 40 image forming device 110, 210 mask 110a, 110b, 210a, 210b diffusion Window, 210c Microwindow, 120 Impurity material layer.

Claims (10)

an electrode of a first conductivity type;
a semiconductor lamination portion having a first surface in contact with the electrode and having a second conductivity type different from the first conductivity type;
with
The semiconductor lamination part is
a first semiconductor layer;
a light-emitting layer in contact with the first semiconductor layer;
has
an impurity diffusion region is formed in the semiconductor lamination portion, reaching the inside of the light emitting layer from the first surface through the first semiconductor layer, and in which the impurity of the first conductivity type is diffused;
The electrode is arranged in a region that does not overlap a light emitting region formed by joining the light emitting layer and the impurity diffusion region in a stacking direction of the first semiconductor layer and the light emitting layer. Semiconductor light emitting device. The impurity diffusion region is
a first impurity diffusion region reaching into the light emitting layer from the first surface through the first semiconductor layer;
a second impurity diffusion region reaching into the light emitting layer from the first surface through the first semiconductor layer;
has
The light emitting region is
a first light emitting region formed by bonding the light emitting layer and the first impurity diffusion region;
a second light emitting region formed by bonding the light emitting layer and the second impurity diffusion region;
has
The electrode is provided between the first light-emitting region and the second light-emitting region and in a region that overlaps neither the first light-emitting region nor the second light-emitting region in the stacking direction. 2. The semiconductor light emitting device according to claim 1, wherein: 3. The semiconductor light emitting device according to claim 2, wherein said first impurity diffusion region and said second impurity diffusion region partially overlap in said first semiconductor layer. the first impurity diffusion region and the second impurity diffusion region are separated in the first semiconductor layer;
In the semiconductor lamination portion, the first impurity diffusion region and the second impurity diffusion region are connected between the first impurity diffusion region and the second impurity diffusion region, and the first impurity diffusion region is connected to the second impurity diffusion region. a third impurity diffusion region is formed in the first semiconductor layer from the surface and does not reach the light emitting layer;
3. The semiconductor light emitting device according to claim 2, wherein the electrode is arranged in a region overlapping with the third impurity diffusion region in the stacking direction. 5. The semiconductor light emitting device according to claim 1, wherein the bandgap of the light emitting layer is smaller than the bandgap of the first semiconductor layer. The first conductivity type is p-type,
6. The semiconductor light-emitting device according to any one of 1 to 5, wherein the second conductivity type is n-type. 7. The semiconductor light emitting device according to any one of 1 to 6, wherein the impurity diffused in the impurity diffusion region is Zn. An exposure apparatus comprising the semiconductor light emitting device according to claim 1 . an image carrier;
The exposure device according to claim 8, which exposes the image carrier;
An image forming apparatus comprising: forming a second conductivity type semiconductor stack having a first semiconductor layer including a first surface and a light emitting layer in contact with the first semiconductor layer;
forming a mask having a diffusion window on the first surface of the semiconductor stack;
forming a layer of impurity material in a region including within the diffusion window;
Impurities are diffused from the impurity material layer into the semiconductor lamination portion through the diffusion window, reaching the inside of the light emitting layer from the first surface, and diffusing impurities of a first conductivity type different from the second conductivity type. forming an impurity diffusion region with
forming an electrode in a region that does not overlap a light emitting region formed by bonding the light emitting layer and the impurity diffusion region in the stacking direction of the first semiconductor layer and the light emitting layer;
A method for manufacturing a semiconductor light emitting device, comprising:

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