JP2018526821A - 金属ゲートプロセスに基づく低コストのフラッシュメモリ製造フロー - Google Patents
金属ゲートプロセスに基づく低コストのフラッシュメモリ製造フロー Download PDFInfo
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- JP2018526821A JP2018526821A JP2018506188A JP2018506188A JP2018526821A JP 2018526821 A JP2018526821 A JP 2018526821A JP 2018506188 A JP2018506188 A JP 2018506188A JP 2018506188 A JP2018506188 A JP 2018506188A JP 2018526821 A JP2018526821 A JP 2018526821A
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 92
- 239000002184 metal Substances 0.000 title claims abstract description 92
- 238000000034 method Methods 0.000 title claims description 49
- 238000004519 manufacturing process Methods 0.000 title description 16
- 239000000758 substrate Substances 0.000 claims description 50
- 229910021332 silicide Inorganic materials 0.000 claims description 41
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 41
- 239000003989 dielectric material Substances 0.000 claims description 27
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- 239000002019 doping agent Substances 0.000 claims description 23
- 230000004888 barrier function Effects 0.000 claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 13
- 239000010949 copper Substances 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 12
- 235000012239 silicon dioxide Nutrition 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- 239000000203 mixture Substances 0.000 claims description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 9
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 8
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 229910044991 metal oxide Inorganic materials 0.000 claims description 4
- 150000004706 metal oxides Chemical class 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 3
- 239000000908 ammonium hydroxide Substances 0.000 claims description 3
- 239000003870 refractory metal Substances 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 230000003213 activating effect Effects 0.000 claims 2
- 239000007864 aqueous solution Substances 0.000 claims 1
- 125000006850 spacer group Chemical group 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 238000002513 implantation Methods 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 229910010271 silicon carbide Inorganic materials 0.000 description 6
- 238000000206 photolithography Methods 0.000 description 5
- 238000001020 plasma etching Methods 0.000 description 5
- 229910052785 arsenic Inorganic materials 0.000 description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- -1 silicon carbide nitride Chemical class 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 239000005368 silicate glass Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- CGRVKSPUKAFTBN-UHFFFAOYSA-N N-silylbutan-1-amine Chemical compound CCCCN[SiH3] CGRVKSPUKAFTBN-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 230000002688 persistence Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
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- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
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- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823443—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors
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- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
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- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
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Abstract
Description
Claims (20)
- フラッシュメモリを含む集積回路であって、
半導体材料を含む基板、及び
前記フラッシュメモリの感知トランジスタ、
を含み、前記感知トランジスタが、
前記基板の頂部表面において配置されるゲート誘電体層と、
前記ゲート誘電体層上に配置される少なくとも400ナノメートル幅のポリシリコンの浮遊ゲートと、
前記基板において配置される第1及び第2のソース/ドレイン領域であって、前記浮遊ゲートの下に中途まで延在し、200ナノメートル未満分離される、前記第1及び第2のソース/ドレイン領域と、
前記浮遊ゲートの上に配置される頂部ゲート誘電体層と、
前記頂部ゲート誘電体層上に配置される金属感知ゲートと、
を含む、
集積回路。 - 請求項1に記載の集積回路であって、前記金属感知ゲートが、タンタル、窒化タンタル、チタン、及びチタン窒化物から成るグループから選択される金属を含む、集積回路。
- 請求項1に記載の集積回路であって、前記頂部ゲート誘電体層が、二酸化シリコンのサブ層とシリコン窒化物のサブ層とを含む、層スタックである、集積回路。
- 請求項1に記載の集積回路であって、前記頂部ゲート誘電体層が、前記浮遊ゲートの前記幅にわたって延在する、集積回路。
- 請求項1に記載の集積回路であって、前記感知トランジスタの前記第1及び第2のソース/ドレイン領域が、前記浮遊ゲートの外方に配置されるディープソース/ドレイン部分を含む、集積回路。
- 請求項5に記載の集積回路であって、前記第1及び第2のソース/ドレイン領域の前記ディープソース/ドレイン部分の上の前記基板の前記頂部表面において金属シリサイドを含む、集積回路。
- 請求項1に記載の集積回路であって、前記金属感知ゲートが40ナノメートル〜80ナノメートルの厚みである、集積回路。
- 請求項1に記載の集積回路であって、前記金属感知ゲートと同じ金属のトレンチライナーを含む銅ダマシン構造を備える金属相互接続を含む、集積回路。
- 請求項1に記載の集積回路であって、前記感知トランジスタの前記ゲート誘電体層と同じ厚みのゲート誘電体層を有する論理nチャネル金属酸化物半導体(MOS)トランジスタを含む、集積回路。
- フラッシュメモリを含む集積回路を形成する方法であって、
半導体材料を含む基板を提供する工程、
感知ソース/ドレインマスクを前記基板の頂部表面の上に形成する工程であって、前記感知ソース/ドレインマスクが、前記フラッシュメモリの感知トランジスタの第1及び第2の感知ソース/ドレイン領域のためのエリアにおいて前記基板を露出させ、前記第1及び第2の感知ソース/ドレイン領域のための前記エリア間の前記基板を覆う、前記感知ソース/ドレインマスクを形成する工程、
前記感知ソース/ドレインマスクにより露出された前記エリアにおける前記基板にドーパントを注入する工程、
前記感知ソース/ドレインマスクを取り除く工程、
前記感知ソース/ドレインマスクを取り除いた後、前記基板の前記頂部表面上に前記感知トランジスタのゲート誘電体層を形成する工程、
前記ゲート誘電体層上に少なくとも400ナノメートル幅のポリシリコンの浮遊ゲートを形成する工程、
前記浮遊ゲートの下に中途まで延在し、200ナノメートル未満分離される、第1及び第2の感知ソース/ドレイン領域を形成するために、前記注入されたドーパントを活性化する工程、
前記浮遊ゲートの上に頂部ゲート誘電体層を形成する工程、
前記頂部ゲート誘電体層の上にゲート金属の層を形成する工程、
ゲート金属の前記層の上にマスクを形成する工程であって、前記マスクが前記浮遊ゲートの上の金属感知のゲートためのエリアを覆うように、前記マスクを形成する工程、及び
前記頂部ゲート誘電体層上に前記金属感知ゲートを形成するため、前記マスクにより露出された箇所のゲート金属の前記層を取り除く工程、
を含む、方法。 - 請求項10に記載の方法であって、前記金属感知ゲートが、タンタル、窒化タンタル、チタン、及びチタン窒化物から成るグループから選択される金属を含む、方法。
- 請求項10に記載の方法であって、前記第1及び第2の感知ソース/ドレイン領域のディープソース/ドレイン部分を形成するため、前記浮遊ゲートをマスクとして用いて、前記浮遊ゲートに近接する前記基板にドーパントを注入することを含み、前記ディープソース/ドレイン部分が、前記浮遊ゲートの外方に配置される、方法。
- 請求項12に記載の方法であって、前記第1及び第2の感知ソース/ドレイン領域の前記ディープソース/ドレイン部分上に金属シリサイドを形成することを含む、方法。
- 請求項13に記載の方法であって、
前記浮遊ゲートの上、及び前記第1及び第2の感知ソース/ドレイン領域の前記ディープソース/ドレイン部分の上に、シリサイドブロック誘電体材料の層を形成する工程、
前記金属シリサイドを形成する前に、前記浮遊ゲートの上にシリサイドブロック誘電体材料の前記層を残すようにシリサイドブロック誘電体材料の前記層をパターニングし、前記第1及び第2の感知ソース/ドレイン領域の前記ディープソース/ドレイン部分の上のシリサイドブロック誘電体材料の前記層を取り除く工程、
ゲート金属の前記層を形成する前に、前記浮遊ゲート上のシリサイドブロック誘電体材料の前記層の上に及び前記金属シリサイドの上に誘電体障壁層を形成する工程、及び
前記金属感知ゲートを形成するためゲート金属の前記層を取り除いた後、前記金属シリサイドの上から前記誘電体障壁層を取り除く工程、
を含み、
シリサイドブロック誘電体材料の前記層と前記誘電体障壁層との組合せが、前記頂部ゲート誘電体層を提供する、
方法。 - 請求項14に記載の方法であって、シリサイドブロック誘電体材料の前記層が二酸化シリコンを含み、前記誘電体障壁層が、二酸化シリコンのサブ層とシリコン窒化物のサブ層とを含む層スタックである、方法。
- 請求項10に記載の方法であって、
誘電体層において相互接続トレンチを形成する工程、
前記相互接続トレンチの側壁及び底部上にトレンチライナーを形成する工程、及び
前記トレンチライナー上に銅を形成する工程、
を含み、
前記トレンチライナーが前記金属感知ゲートと同じ組成を有する、
方法。 - 請求項10に記載の方法であって、前記金属感知ゲートを形成するため前記マスクにより露出された箇所のゲート金属の前記層を取り除く工程が、ウェットエッチングプロセスによって実施される、方法。
- 請求項17に記載の方法であって、前記ウェットエッチングプロセスが、濃縮水酸化アンモニウム及び過酸化水素の水溶液を含む、方法。
- 請求項10に記載の方法であって、前記感知トランジスタの前記ゲート誘電体層と同時に論理MOSトランジスタのゲート誘電体層を形成することを含む、方法。
- フラッシュメモリを含む集積回路を形成する方法であって、
半導体材料を含む基板を提供する工程、
前記基板の頂部表面の上に感知ソース/ドレインマスクを形成する工程であって、前記感知ソース/ドレインマスクが、前記フラッシュメモリの感知トランジスタの感知ソースドレイン領域のためのエリアにおいて前記基板を露出させ、前記感知ソースドレイン領域のための前記エリア間で前記基板を覆う、前記感知ソース/ドレインマスクを形成する工程、
前記感知ソース/ドレインマスクにより露出された前記エリアにおける前記基板にドーパントを注入する工程、
前記感知ソース/ドレインマスクを取り除く工程、
前記感知ソース/ドレインマスクを取り除いた後、前記基板の前記頂部表面上に前記感知トランジスタのゲート誘電体層を形成する工程、
前記ゲート誘電体層上に少なくとも400ナノメートル幅のポリシリコンの前記感知トランジスタの浮遊ゲートを形成する工程、
前記浮遊ゲートの下に中途まで延在し、200ナノメートル未満分離される、前記感知トランジスタの感知ソース/ドレイン領域を形成するために、前記注入されたドーパントを活性化する工程、
前記感知ソース/ドレイン領域のディープソース/ドレイン部分を形成するために、前記浮遊ゲートをマスクとして用いて前記浮遊ゲートに近接する前記基板にドーパントを注入する工程であって、前記ディープソース/ドレイン部分が前記浮遊ゲートの外方に配置されている、前記ドーパントを注入する工程、
前記浮遊ゲートの上、及び前記感知ソース/ドレイン領域の前記ディープソース/ドレイン部分の上に、シリサイドブロック誘電体材料の層を形成する工程、
前記浮遊ゲートの上のシリサイドブロック誘電体材料の層を残すために、シリサイドブロック誘電体材料の前記層をパターニングし、前記感知ソース/ドレイン領域の前記ディープソース/ドレイン部分の上のシリサイドブロック誘電体材料の前記層を取り除く工程、
前記感知ソース/ドレイン領域の前記ディープソース/ドレイン部分上に耐火性金属の層を形成し、前記ディープソース/ドレイン部分上に金属シリサイド形成するために前記基板を加熱し、前記浮遊ゲート上のシリサイドブロック誘電体材料の前記パターニングされた層が、前記浮遊ゲート上に金属シリサイドが形成しないようにし、その後、反応しなかった金属を取り除く、工程、
前記浮遊ゲート上のシリサイドブロック誘電体材料の前記パターニングされた層の上及び前記金属シリサイドの上に、誘電体障壁層を形成する工程、
前記誘電体障壁層の上にゲート金属の層を形成する工程、
ゲート金属の前記層の上にハードマスク層を形成する工程、
前記浮遊ゲートの上にハードマスクを形成するため、前記金属シリサイドの上の前記ハードマスク層を取り除く工程、
前記浮遊ゲートの上に前記感知トランジスタの金属感知ゲートを形成するため、前記ハードマスクにより露出された箇所のゲート金属の前記層を取り除く工程、及び
前記金属感知ゲートを形成した後、前記金属シリサイドの上から前記誘電体障壁層を取り除く工程、
を含み、
シリサイドブロック誘電体材料の前記層と前記誘電体障壁層との組合せが、前記感知トランジスタの頂部ゲート誘電体層を提供する、
方法。
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