JP2018190952A - Multilayer electronic component and mounting board thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer electronic component having reduced acoustic noise and reduced high frequency vibration in a region of 20 kHz or more.SOLUTION: There are provided a multilayer electronic component and a mounting board thereof. The multilayer electronic component includes: a capacitor body which includes a plurality of dielectric layers and a plurality of first and second internal electrodes alternately disposed with dielectric layers interposed therebetween, and which has first and second surfaces opposing each other, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first, second, third, and fourth surfaces, and opposing each other, one end of each of the first and second internal electrodes being exposed through the third and fourth surfaces, respectively; first and second external electrodes which include, respectively, first and second connected portions respectively disposed on the third and fourth surfaces and first and second band portions respectively extended from the first and second connected portions to portions of the first surface; a first connection terminal which is disposed on the first band portion so that a first solder accommodating portion, open toward the third surface, is provided on a first surface side; and a second connection terminal which is disposed on the second band portion so that a second solder accommodating portion, open toward the fourth surface, is provided along on a first surface side.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a multilayer electronic component and a mounting substrate thereof.

  A multilayer capacitor, which is one of the multilayer electronic components, is made of a dielectric material. Since this dielectric material has piezoelectricity, it can be deformed in synchronization with an applied voltage.

  When the period of the applied voltage is in the audible frequency band, the displacement becomes vibration and is transmitted to the substrate through the solder, and the vibration of the substrate can be heard as sound. Such a sound is called acoustic noise.

  When the operating environment of the device is quiet, the user may recognize the acoustic noise as an abnormal sound and feel that the device is malfunctioning. In addition, in a device having an audio circuit, acoustic noise may be superimposed on the audio output, and the quality of the device may be reduced.

  In addition to acoustic noise recognized by human ears, the cause of malfunction of various sensors used in IT and industrial / electrical equipment when piezoelectric vibration of multilayer capacitors occurs in a high-frequency region of 20 kHz or higher. Can be.

  On the other hand, the external electrode of the capacitor and the substrate are connected via solder. At this time, the solder is formed so as to be inclined at a certain height along the surface of the external electrode on both side surfaces or both end surfaces of the capacitor body.

  At this time, the larger the volume and height of the solder, the more the vibration of the multilayer capacitor is further transmitted to the substrate, and the generated acoustic noise increases.

Japanese Patent No. 3847265 Korean Published Patent No. 10-2010-0087622 Korean Published Patent No. 10-2015-0127965 Korean Published Patent No. 10-2015-0118386

  An object of the present invention is to provide a multilayer electronic component that can reduce acoustic noise and high-frequency vibrations of 20 kHz or higher, and a mounting substrate thereof.

  One aspect of the present invention includes a plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the dielectric layer in between, and the first and second surfaces facing each other, the first The fifth and sixth surfaces connected to the first and second surfaces and connected to the third and fourth surfaces facing each other, connected to the first and second surfaces, and connected to the third and fourth surfaces, facing each other. A capacitor body having a first surface and one ends of the first and second internal electrodes exposed on the third and fourth surfaces, respectively, and first and first surfaces disposed on the third and fourth surfaces of the capacitor body, respectively. Two connection parts, and first and second external electrodes each including first and second band parts extending from the first and second connection parts to a part of the first surface of the capacitor body, and a first of the capacitor body. To one side, toward the third side of the capacitor body A first connection terminal disposed on the first band portion and a first surface side of the capacitor body toward the fourth surface of the capacitor body so as to provide a released first solder accommodating portion. Provided is a multilayer electronic component including a second connection terminal disposed on the second band portion so that a second solder accommodating portion to be opened is provided.

  In one embodiment of the present invention, the first and second connection terminals may be bump terminals.

  In one embodiment of the present invention, the multilayer electronic component may further include first and second conductive resin layers formed on at least part of the surfaces of the first and second connection terminals.

  In one embodiment of the present invention, each of the first and second connection terminals may have a thickness of 50 μm or more.

  In one embodiment of the present invention, the first and second connection terminals are spaced apart from the first and second connection portions, respectively, and the first solder accommodating portion is a third portion of the capacitor body. A first space portion provided below the first band portion in a direction extending toward the surface, the fifth surface, and the sixth surface, and the second solder housing portion includes the fourth surface, the second surface of the capacitor body, The second space portion may be provided below the second band portion in a direction extending toward the fifth surface and the sixth surface.

  In one embodiment of the present invention, the first and second connection terminals may be formed to cover a part of the first and second band portions.

  In one embodiment of the present invention, the first and second external electrodes further include third and fourth band portions respectively extending from the first and second connection portions to a part of the second surface of the capacitor body. In addition, the third and fourth connection terminals may be disposed on the third and fourth band portions so as to face the first and second connection terminals, respectively.

  In one embodiment of the present invention, in the first or second external electrode, the width of the first or second band part is BW, the width of the first or second connection part is W, and the first or second 2 When the length of the solder accommodating portion is defined as G, BW / 4 ≦ G ≦ 3BW / 4 can be satisfied.

  In one embodiment of the present invention, when the width of the first or second connection terminal is BG and the width of the capacitor body is W, W / 2 ≦ BG ≦ W can be satisfied.

  In one embodiment of the present invention, the first connection terminal has a first cut-out portion so that the first solder accommodating portion is provided, and the second connection terminal is provided with the second solder accommodating portion. There may be a second incision.

  In one embodiment of the present invention, the first and second incisions may be formed to have a curved surface.

  In an embodiment of the present invention, the first and second incisions may include a plurality of folded surfaces.

  In one embodiment of the present invention, the first connection terminals are disposed on the first band part so as to be separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body. The connection terminals may be disposed on the second band part so that two of the connection terminals are separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body.

  The first and second external electrodes may further include third and fourth band portions extending from the first and second connection portions to a part of the second surface of the capacitor body, respectively. The third connection terminal is disposed on the third band part so that two of the third connection terminals are separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body, and the fourth connection terminal is connected to the capacitor body. The fifth and sixth surfaces may be disposed on the fourth band part so as to be separated from each other in the direction of connecting the fifth and sixth surfaces.

  In an embodiment of the present invention, the bottom surfaces of the first and second connection terminals may be formed flat.

  In one embodiment of the present invention, the first and second connection terminals may be convex toward the mounting direction.

  Another aspect of the present invention includes a plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the dielectric layer interposed therebetween, and first and second surfaces facing each other, Third and fourth surfaces connected to the first and second surfaces and facing each other, connected to the first and second surfaces, and connected to the third and fourth surfaces and facing each other. A capacitor main body having six surfaces, one end of the first and second internal electrodes being exposed on the third and fourth surfaces, respectively, and first and second capacitors disposed on the third and fourth surfaces of the capacitor main body, respectively. First and second external electrodes each including a second connection portion, and first and second band portions extending from the first and second connection portions to a part of the first surface of the capacitor body, and the first band The third surface, the fifth surface and the sixth surface of the capacitor main body A first connection terminal disposed on the first band portion so as to be spaced apart from the first connection portion so that a first space portion opened in a direction corresponding to the first band portion is provided; and the second band. The second band part is provided on the second band part so that a second space part opened in a direction corresponding to the fourth surface, the fifth surface, and the sixth surface of the capacitor body is provided below the part. And a second connection terminal disposed so as to be separated from the two connection portions, wherein the first and second space portions serve as first and second solder accommodating portions.

  Still another aspect of the present invention includes a plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the dielectric layer interposed therebetween, and first and second surfaces facing each other, Third and fourth surfaces connected to the first and second surfaces and facing each other, connected to the first and second surfaces, and connected to the third and fourth surfaces and facing each other. A capacitor main body having a sixth surface, one end of the first and second internal electrodes being exposed on the third and fourth surfaces, respectively, and a first disposed on the third and fourth surfaces of the capacitor main body, respectively. First and second external electrodes each including first and second band portions extending from the first and second connection portions to a part of the first surface of the capacitor body, and the first connection electrodes. Located on the band part, facing the third surface of the capacitor body A first connection terminal having a first incision portion that is opened and a second connection terminal disposed on the second band portion and having a second incision portion that is open toward the fourth surface of the capacitor body; , And the first and second cutouts serve as first and second solder accommodating parts.

  Still another aspect of the present invention is mounted such that a substrate having first and second electrode pads on one surface and first and second connection terminals connected to the first and second electrode pads, respectively. There is provided a mounting board for a multilayer electronic component including the multilayer electronic component.

  According to still another aspect of the present invention, a capacitor body including a plurality of dielectric layers and a plurality of first and second internal electrodes arranged alternately with the dielectric layer interposed therebetween, and opposite ends of the capacitor body. A first connection and a second connection arranged on a connection surface of the capacitor body, which are arranged on a surface to be connected to the plurality of first and second internal electrodes, respectively, and connected to opposite end faces of the capacitor body. The first and second external electrodes each including a portion and the first connection portion on the connection surface of the capacitor body are spaced apart from each other on the first connection portion so as to form a first solder accommodating portion. The first and second connection terminal portions are disposed on the second connection portion on the connection surface of the capacitor body, and are formed on the second connection portion so as to form a second solder accommodating portion. To be separated And a third and fourth connecting terminal portion location, and to provide a multilayer electronic component.

  According to one embodiment of the present invention, there is an effect that acoustic noise and high frequency vibration of 20 kHz or more of the multilayer electronic component can be reduced.

1 is a perspective view showing a multilayer electronic component according to a first embodiment of the present invention. In FIG. 1, it is the perspective view which showed that the plating layer was formed in the 1st and 2nd connection terminal. (A) And (b) is the top view which showed the 1st and 2nd internal electrode of the multilayer electronic component by 1st Embodiment of this invention, respectively. It is sectional drawing along the II 'line of FIG. FIG. 3 is a perspective view showing that third and fourth connection terminals are added to FIG. 1. It is the perspective view which showed the multilayer electronic component by 2nd Embodiment of this invention. In FIG. 6, it is the perspective view which showed that the plating layer was formed in the 1st and 2nd connection terminal. In the multilayer electronic component according to the second embodiment of the present invention, a perspective view showing that the first and second connection terminals have other forms. FIG. 7 is a perspective view showing that third and fourth connection terminals are added to FIG. 6. It is the perspective view which showed the multilayer electronic component by 3rd Embodiment of this invention. In FIG. 10, it is the perspective view which showed that the plating layer was formed in the 1st and 2nd connection terminal. In FIG. 10, it is the perspective view which showed that the plating layer was formed in the 1st and 2nd connection terminal. FIG. 11 is a perspective view showing that third and fourth connection terminals are added to FIG. 10. In the multilayer electronic component according to the third embodiment of the present invention, it is a perspective view showing that the first and second connection terminals have other forms. In FIG. 14, it is the perspective view which showed that the plating layer was formed in the 1st and 2nd connection terminal. FIG. 15 is a perspective view showing that third and fourth connection terminals are added to FIG. 14. It is the front view which showed roughly the state by which the multilayer electronic component by 1st Embodiment of this invention was mounted in the board | substrate.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for a clearer description.

  FIG. 1 is a perspective view showing a multilayer electronic component according to a first embodiment of the present invention, and FIG. 2 is a perspective view showing that plating layers are formed on the first and second connection terminals in FIG. FIGS. 3A and 3B are plan views showing first and second internal electrodes of the multilayer electronic component according to the first embodiment of the present invention. FIG. It is sectional drawing along line II '.

  1 to 4, the multilayer electronic component 100 according to the first embodiment of the present invention includes a capacitor body 110, first and second external electrodes 131 and 132, and a first on the mounting surface side of the capacitor body. And first and second connection terminals 141 and 151 disposed on the first and second external electrodes 131 and 132, respectively, so that the second solder accommodating portion is provided.

  Hereinafter, when the direction of the capacitor body 110 is defined to clearly describe the embodiment of the present invention, X, Y, and Z shown in the drawings are the length direction, the width direction, and the thickness direction of the capacitor body 110, respectively. Indicates. In the present embodiment, the thickness direction can be used in the same concept as the stacking direction in which the dielectric layers are stacked.

  The capacitor body 110 is obtained by laminating a plurality of dielectric layers 111 in the Z direction and then firing, and the plurality of dielectric layers 111 and a plurality of alternately arranged in the Z direction with the dielectric layers 111 interposed therebetween. First and second internal electrodes 121 and 122.

  In addition, covers 112 and 113 having a predetermined thickness can be formed on both sides of the capacitor body 110 in the Z direction, if necessary.

  At this time, the dielectric layers 111 adjacent to each other in the capacitor main body 110 can be integrated to such an extent that the boundary cannot be confirmed.

  The capacitor body 110 may have a substantially hexahedron shape, but the present invention is not limited thereto.

  In the present embodiment, for convenience of description, both surfaces of the capacitor body 110 facing each other in the Z direction are connected to the first and second surfaces 1 and 2 and the first and second surfaces 1 and 2 in the X direction. Both surfaces facing each other are connected to the third and fourth surfaces 3, 4, the first and second surfaces 1, 2, and both surfaces facing each other in the Y direction are connected to the third and fourth surfaces 3, 4. The fifth and sixth surfaces 5 and 6 are defined. In the present embodiment, the first surface 1 can be a mounting surface.

The dielectric layer 111 includes a ceramic material having a high dielectric constant, and may include, for example, a BaTiO ₃ based ceramic powder. However, the present invention is not limited to this.

Examples of the BaTiO ₃ ceramic powder include (Ba _1-x Ca _x ) TiO ₃ , Ba (Ti _1-y Ca _y ) O ₃ , (Ba ₁ ) in which Ca, Zr, and the like are partly dissolved in BaTiO _{3. -x Ca x) (Ti 1-} y Zr y) O 3, or _{Ba (Ti 1-y Zr y} ) but such _{O 3} and the like, and the present invention is not limited thereto.

  In addition to the ceramic powder, a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like can be further added to the dielectric layer 111. Examples of the ceramic additive include transition metal oxides or transition metal carbides, rare earth elements, magnesium (Mg), and aluminum (Al).

  The first and second internal electrodes 121 and 122 are electrodes having different polarities, and are alternately arranged so as to face each other along the Z direction with the dielectric layer 111 interposed therebetween, and one end of the capacitor main body The third and fourth surfaces 3 and 4 of 110 can be exposed.

  At this time, the first and second internal electrodes 121 and 122 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

  Thus, the end portions of the first and second internal electrodes 121 and 122 that are alternately exposed on the third and fourth surfaces 3 and 4 of the capacitor body 110 are the third and fourth surfaces 3 and 4 of the capacitor body 110, which will be described later. 4 may be connected to and electrically connected to the first and second external electrodes 131 and 132 disposed in the first and second external electrodes 131 and 132, respectively.

  At this time, the first and second internal electrodes 121 and 122 are formed of a conductive metal, and for example, a material such as nickel (Ni) or a nickel (Ni) alloy can be used. However, the present invention is not limited thereto. Is not to be done.

  With the above configuration, when a predetermined voltage is applied to the first and second external electrodes 131 and 132, electric charges are accumulated between the first and second internal electrodes 121 and 122 facing each other.

  At this time, the capacitance of the multilayer electronic component 100 is proportional to the areas of the first and second internal electrodes 121 and 122 that overlap each other along the Z direction.

  The first and second external electrodes 131 and 132 may be supplied with voltages having different polarities and may be connected to and electrically connected to exposed portions of the first and second internal electrodes 121 and 122, respectively.

  A plating layer may be formed on the surfaces of the first and second external electrodes 131 and 132 as necessary.

  For example, the first and second external electrodes 131 and 132 may include the first and second conductive layers, the first and second nickel (Ni) plating layers formed on the first and second conductive layers, First and second tin (Sn) plating layers formed on the first and second plating layers, respectively.

  The first external electrode 131 may include a first connection part 131a and a first band part 131b.

  The first connection part 131a is a part formed on the third surface 3 of the capacitor body 110 and connected to the first internal electrode 121. The first band part 131b is a mounting surface of the capacitor body 110 from the first connection part 131a. This is a portion that extends to a part of the first surface 1 and is connected to the first connection terminal 141.

  At this time, the first band portion 131b is extended to a part of the second surface 2 of the capacitor body 110 and a part of the fifth and sixth surfaces 5, 6 for the purpose of improving the fixing strength. It can extend further.

  The second external electrode 132 may include a second connection part 132a and a second band part 132b.

  The second connection part 132a is a part formed on the fourth surface 4 of the capacitor body 110 and connected to the second internal electrode 122. The second band part 132b is a mounting surface of the capacitor body 110 from the second connection part 132a. This is a portion that extends to a part of the first surface 1 and is connected to the second connection terminal 151.

  At this time, the second band portion 132b is extended to a part of the second surface 2 of the capacitor body 110 and a part of the fifth and sixth surfaces 5, 6 for the purpose of improving the fixing strength. It can extend further.

  The first connection terminal 141 is made of a conductor, and on the first surface 1 side of the capacitor body 110, a first connection surface facing the first band portion 131b of the first external electrode 131, and a surface facing the first connection surface in the Z direction. And a first outer peripheral surface connecting the first and second connection surfaces.

  The first connection terminal 141 is formed so as to cover a part of the first band portion 131b. As a result, on the first surface 1 side, which is the mounting surface of the capacitor main body 110, a portion not covered by the first connection terminal 141 on the lower side of the first band portion 131b is the first solder accommodating portion as a solder pocket. Become.

  In addition, the first connection terminal 141 may be disposed so as to be deflected toward the center of the capacitor body 110 in the X direction.

  At this time, the first connection terminal 141 only needs to have a length in the X direction smaller than the length of the first band portion 131b.

  As a result, the first solder accommodating portion is opened toward the third surface 3 of the capacitor body 110, so that a structure capable of ensuring a maximum amount of space G as a solder pocket is achieved.

  The second connection terminal 151 is made of a conductor, and on the first surface 1 side of the capacitor body 110, a third connection surface facing the second band portion 132 b of the second external electrode 132, and facing the third connection surface in the Z direction. A fourth connection surface which is a surface, and a second outer peripheral surface connecting the third and fourth connection surfaces.

  The second connection terminal 151 is formed so as to cover a part of the second band portion 132b. As a result, on the first surface 1 side, which is the mounting surface of the capacitor body 110, a portion not covered by the second connection terminal 151 on the lower side of the second band portion 132b is a second solder containing portion as a solder pocket. Become.

  In addition, the second connection terminal 151 can be disposed so as to be deflected toward the center of the capacitor body 110 in the X direction.

  At this time, it is only necessary that the second connection terminal 151 has a length in the X direction smaller than the length of the second band portion 132b.

  Accordingly, the second solder accommodating portion is opened toward the fourth surface 4 of the capacitor main body 110, so that a structure capable of ensuring a maximum space as a solder pocket is formed.

  In the present embodiment, the first connection terminal 141 is disposed on the first band portion 131b so as to be separated from the first connection portion 131a, and the second connection terminal 151 is disposed on the second band portion 132b. It arrange | positions away from 132a.

  Accordingly, a first space portion is provided below the first band portion 131b so as to open in a direction corresponding to the third surface 3, the fifth surface 5, and the sixth surface 6 of the capacitor body 110. The one space part can serve as the first solder accommodating part 161.

  A second space 162 is provided below the second band portion 132b. The second space 162 is open in a direction corresponding to the fourth surface 5, the fifth surface 5, and the sixth surface 6 of the capacitor body 110. The two space part 162 can be a second solder accommodating part. Hereinafter, in the description of the embodiment, the space portion and the solder accommodating portion can be described using the same reference numerals.

  FIG. 5 is a perspective view showing that the third and fourth connection terminals are added to FIG.

  Referring to FIG. 5, the multilayer electronic component of the present embodiment may further include third and fourth connection terminals 142 and 152. Thereby, the vertical directionality of the multilayer electronic component can be eliminated.

  Therefore, the first and second external electrodes 131 and 132 further include third and fourth band portions 131c and 132c extending from the first and second connection portions to a part of the second surface 2 of the capacitor body 110, The third connection terminal 142 is disposed on the third band portion 131c so as to face the first connection terminal 141 in the Z direction, and the fourth connection terminal 152 is disposed on the fourth band portion 132c with the second connection terminal 151. It can arrange | position so that it may oppose to a Z direction.

  At this time, the third and fourth connection terminals 142 and 152 may be formed in a similar shape at positions corresponding to the first and second connection terminals 141 and 151 in the Z direction.

  The first and second connection terminals 141 and 151 may be bump terminals formed on the first surface 1 of the capacitor body 110 along the Y direction.

  The first and second connection terminals 141 and 151 may be made of the same material as the first and second external electrodes 131 and 132, and are formed integrally with the first and second external electrodes 131 and 132. be able to.

  Further, the first and second connection terminals 141 and 151 can reduce the transmission of the piezoelectric vibration generated in the capacitor body 110 to the substrate by separating the mounted substrate and the capacitor body 110 by a predetermined distance. In order to secure such an effect, the thickness of the first and second connection terminals 141 and 151 can be 50 μm or more.

  When the thickness of the first and second connection terminals 141 and 151 is equal to or greater than a predetermined thickness, a sufficient space for storing solder is secured, and when the space is secured in this way, the solder fillet is the first. In addition, the second external electrodes 131 and 132 can be prevented from being formed in the first and second connection portions 131a and 132a. When the thickness of the first and second connection terminals 141 and 151 is less than 100 μm, solder fillets are formed on the first and second connection portions 131a and 132a of the first and second external electrodes 131 and 132, and this solder There is a possibility that the fillet plays a role as a path through which the piezoelectric vibration is transmitted to the substrate, and the noise reduction effect is lowered.

  If necessary, conductive resin layers 141a and 151a are formed on the surfaces of the first and second connection terminals 141 and 151 by applying a conductive paste such as conductive epoxy as shown in FIG. Can be done. Examples of the conductive epoxy include copper (Cu) epoxy and silver (Ag) epoxy.

  On the other hand, in the drawing, the conductive resin layer is formed on the entire surface of the connection terminal. However, the conductive resin layer is provided only on the mounting surface of the connection terminal or only on a part of the mounting surface as necessary. It may be formed.

  Such a conductive resin layer can absorb the piezoelectric vibration and further reduce the acoustic noise of the electronic component, and can absorb and reduce the external force transmitted from the set substrate to the capacitor body 110. The reliability of the multilayer electronic component 100 can be improved.

  In addition, the first and second connection terminals 141 and 151 can include a plating layer as necessary. The plating layer may include a nickel (Ni) plating layer formed on the first and second connection terminals 141 and 151 and a tin (Sn) plating layer formed on the nickel plating layer. .

  At this time, the width of the first or second band part 131b, 132b of the first or second external electrode 131, 132 is set to BW, and the first and second connection parts 131a of the first or second external electrode 131, 132, BW / 4 ≦ G ≦ 3BW / 4 can be satisfied when the width of 132a is W and the length of the first or second solder accommodating portion 161, 162 in the X direction is G.

  That is, when G which determines the size of the solder accommodating portion is secured to 1/4 or more of BW which is the width of the external electrode, a space capable of storing solder is sufficiently secured, and the solder fillets are the first and second solder fillets. It is possible to suppress the formation of the first and second connection portions 131a and 132a of the external electrodes 131 and 132.

  In addition, when G is secured to 3/4 or more of BW, the portion of the connection terminal that supports the external electrode becomes too small, so that the installed capacitor body falls down or the fixing strength is weak and the connection terminal is external electrode. Problems such as unexpected separation may occur.

  According to the present embodiment, W / 2 ≦ BG ≦ W can be satisfied. Here, BG is the length of the first or second connection terminal 141, 151 in the Y direction.

  Thereby, since the width (W) of a component is small in a small-sized multilayer electronic component, the collapse of the multilayer electronic component during mounting can be prevented by making BG smaller than W. Further, by making BG W / 2 or more and ensuring a sufficient space for storing solder, it acts to limit the height of the solder fillet, and acoustic noise can be further reduced.

  FIG. 6 is a perspective view showing a multilayer electronic component according to a second embodiment of the present invention, and FIG. 7 is a perspective view showing that plating layers are formed on the first and second connection terminals in FIG. FIG. 8 is a perspective view showing that the first and second connection terminals have other forms in the multilayer electronic component according to the second embodiment of the present invention.

  In the multilayer electronic component 100 ′ according to the second embodiment, the structure of the capacitor body 110, the first and second internal electrodes 121 and 122, and the first and second external electrodes 131 and 132 is similar to the above-described embodiment. In order to avoid duplication, a specific description thereof will be omitted, and the first and second connection terminals 143 and 153 and the first and second solder accommodating portions 163 and 164 having a structure different from that of the first embodiment will be described. This will be described in detail based on this.

  Referring to FIGS. 6 to 8, a first incision 143 a is formed on the first outer peripheral surface of the first connection terminal 143. Accordingly, the first solder accommodating portion 163 as a solder pocket can be provided on the first band portion 131 b on the first surface 1 that is the mounting surface of the capacitor body 110.

  In the present embodiment, the first incision 143 a may be formed to be opened toward the third surface 3 of the capacitor body 110. That is, the first incision 143a can be formed in a substantially inverted “U” shape in a quadrangular shape in which a portion toward the third surface 3 is opened.

  However, the present invention is not limited to this, and the first incision portion can include a plurality of folded surfaces in addition to the inverted “U” shape, for example, from two surfaces having one folded portion. Or it can be configured to include four or more faces with three or more folds.

  A second cutout 153 a is formed on the second outer peripheral surface of the second connection terminal 153. Accordingly, the second solder accommodating portion 164 as a solder pocket can be provided on the second band portion 132b on the first surface 1 side which is the mounting surface of the capacitor body 110.

  In the present embodiment, the second incision 153 a may be formed to be opened toward the fourth surface 4 of the capacitor body 110. That is, the second incision 153a can be formed in a substantially inverted “U” shape in a quadrangular shape in which a portion toward the fourth surface 4 is opened.

  However, the present invention is not limited to this, and the second incision portion may include a plurality of folded surfaces in addition to the approximately “U” shape, for example, from two surfaces having one folded portion. Or it can be configured to include four or more faces with three or more folds.

  Further, if necessary, conductive resin layers 143b and 153b can be formed on the surfaces of the first and second connection terminals 143 and 153 as shown in FIG.

  In addition, the first and second connection terminals 143 and 153 may include a plating layer as necessary. The plating layer may include a nickel (Ni) plating layer formed on the first and second connection terminals 143 and 153 and a tin (Sn) plating layer formed on the nickel plating layer. .

  Meanwhile, as shown in FIG. 8, the first and second connection terminals 143 ′ and 153 ′ may be formed such that the first and second cutouts 143a ′ and 153a ′ have curved surfaces.

  At this time, the first and second cutouts 143a ′ and 153a ′ may be formed to open toward the third and fourth surfaces of the capacitor body 110 in the X direction.

  Accordingly, on the first surface side of the capacitor body 110, the first and second solder accommodating portions having a square shape are provided on the first and second band portions of the first and second external electrodes 131 and 132. Can do.

  However, the multilayer electronic component having a rectangular cut-out portion can secure a solder pocket having a relatively larger volume than the cut-out portion shown in FIG. Therefore, in the case of the first embodiment, since a relatively large amount of solder can be taken in when the multilayer electronic component is mounted on the substrate, the formation of solder fillets can be effectively suppressed, and the acoustic noise of the multilayer electronic component 100 can be suppressed. Can be further improved.

  FIG. 9 is a perspective view showing that the third and fourth connection terminals are added to FIG.

  Referring to FIG. 9, the multilayer electronic component of the present embodiment may further include third and fourth connection terminals 144 and 154.

  Therefore, the first and second external electrodes 131 and 132 further include third and fourth band portions 131c and 132c extending from the first and second connection portions to a part of the second surface 2 of the capacitor body 110, The third connection terminal 144 is disposed on the third band portion 131c so as to face the first connection terminal 143 in the Z direction, and the fourth connection terminal 154 is disposed on the fourth band portion 132c with the second connection terminal 153. It can arrange | position so that it may oppose to a Z direction.

  FIG. 10 is a perspective view showing a multilayer electronic component according to a third embodiment of the present invention. FIGS. 11 and 12 show that a plating layer is formed on the first and second connection terminals in FIG. It is the perspective view shown respectively.

  In the multilayer electronic component 100 ″ according to the third embodiment, the structure of the capacitor body 110, the first and second internal electrodes 121 and 122, and the first and second external electrodes 131 and 132 is similar to that of the first embodiment. Therefore, a detailed description thereof will be omitted to avoid duplication, and the first connection terminals 41 and 42, the second connection terminals 51 and 52, and the first connection terminals having different structures from the first and second embodiments described above. And the 2nd solder accommodating parts 61 and 62 are shown and it demonstrates concretely based on this.

  Referring to FIGS. 10 to 12, the first connection terminals 41 and 42 may be connected to each other in the direction connecting the fifth and sixth surfaces of the capacitor body 110, that is, in the Y direction so as to be separated from each other. Arranged on one band part. Thereby, on the first surface 1 side which is the mounting surface of the capacitor body 110, the first solder accommodating portion 61 as a solder pocket is provided on the first band portion.

  The second connection terminals 51 and 52 are disposed on the first band portion so that two of the second connection terminals 51 and 52 face each other in the direction connecting the fifth and sixth surfaces of the capacitor body 110, that is, in the Y direction.

  Moreover, a conductive resin layer can be formed on the first connection terminals 41 and 42 and the second connection terminals 51 and 52 by applying a conductive paste such as a conductive epoxy as necessary.

  At this time, as shown in FIG. 11, the conductive resin layers 71, 72, 81, 82 are formed only on the bottom surfaces of the first connection terminals 41, 42 and the second connection terminals 51, 52 that are in contact with the substrate, or As shown in FIG. 12, the conductive resin layers 71 ′, 72 ′, 81 ′, and 82 ′ can be formed to cover the entire surfaces of the first connection terminals 41 and 42 and the second connection terminals 51 and 52. .

  FIG. 13 is a perspective view showing that the third and fourth connection terminals are added to FIG.

  Referring to FIG. 13, the multilayer electronic component of the present embodiment may further include third connection terminals 43 and 44 and fourth connection terminals 53 and 54. Thereby, the vertical directionality of the multilayer electronic component can be eliminated.

  Therefore, the first and second external electrodes 131 and 132 further include third and fourth band portions 131c and 132c extending from the first and second connection portions to a part of the second surface 2 of the capacitor body 110, The third connection terminals 43 and 44 are arranged on the third and fourth band portions 131c and 132c so as to face the first connection terminals 41 and 42, and the fourth connection parts are opposed to the second connection terminals 51 and 52. Connection terminals 53 and 54 are arranged.

  The third connection terminals 43 and 44 are disposed on the third band part 131c in such a manner that two of the third connection terminals 43 and 44 face each other in the direction connecting the fifth and sixth surfaces of the capacitor body 110, that is, in the Y direction. The fourth connection terminals 53 and 54 are disposed on the fourth band part 132c so that two of the fourth connection terminals 53 and 54 face each other in the direction connecting the fifth and sixth surfaces of the capacitor body 110, that is, in the Y direction. .

  Meanwhile, the first connection terminal and the second connection terminal of FIG. 10 may have a flat bottom surface. Accordingly, the first connection terminal and the second connection terminal can have a substantially hexahedral shape.

  However, the present invention is not limited to this, and as illustrated in FIG. 14, the bottom surfaces of the first connection terminals 41 ′ and 42 ′ and the second connection terminals 51 ′ and 52 ′ are the first surface that is the mounting surface. 1 can be formed in a convex shape. That is, the first connection terminals 41 ′ and 42 ′ and the second connection terminals 51 and 52 can be formed in a hemispherical shape having a curved surface.

  At this time, as shown in FIG. 15, the first connection terminals 41 ′, 42 ′ and the second connection terminals 51 ′, 52 ′ can include plating layers 73, 74, 83, 84 as necessary. The plating layers 73, 74, 83, and 84 are formed on the nickel (Ni) plating layer formed on the first connection terminals 41 ′ and 42 ′ and the second connection terminals 51 ′ and 52 ′, and on the nickel plating layer. A tin (Sn) plating layer.

  FIG. 16 is a perspective view showing that the third and fourth connection terminals are added to FIG.

  Referring to FIG. 16, the multilayer electronic component of the present embodiment is opposed to the third connection terminals 43 ′, 44 ′ facing the first connection terminals 41 ′, 42 ′ and the second connection terminals 51 ′, 52 ′. And fourth connection terminals 53 ′ and 54 ′. Thereby, the vertical directionality of the multilayer electronic component can be eliminated.

  FIG. 17 is a front view schematically showing a state in which the multilayer electronic component according to the first embodiment of the present invention is mounted on a substrate.

  When voltages having different polarities are applied to the first and second external electrodes 131 and 132 formed on the multilayer electronic component 100 in a state where the multilayer electronic component 100 is mounted on the substrate 210, the dielectric layer 111 The capacitor body 110 expands and contracts in the thickness direction due to the inverse piezoelectric effect (inverse piezoelectric effect), and both ends of the first and second external electrodes 131 and 132 are formed at the capacitor body 110 due to the Poisson effect (poisson effect). In contrast to the expansion and contraction in the thickness direction, the film contracts and expands.

  Such contraction and expansion generate vibrations. In addition, the vibration is transmitted from the first and second external electrodes 131 and 132 to the substrate 210, whereby sound is radiated from the substrate 210 and becomes acoustic noise.

  Referring to FIG. 17, the multilayer electronic component mounting substrate according to the present embodiment includes a substrate 210 having first and second electrode pads 221 and 222 on one surface, and first and second connection terminals 141 on the upper surface of the substrate 210. , 151 are mounted so as to be connected to the first and second electrode pads 221 and 222, respectively.

  At this time, in the present embodiment, the multilayer electronic component 100 is described as being mounted on the substrate 210 via the solders 231 and 232. However, if necessary, a conductive paste can be used instead of the solder. It may be used.

  According to the present embodiment, the piezoelectric vibration transmitted to the substrate via the first and second external electrodes 131 and 132 of the multilayer electronic component 100 is the first and second made of an insulator made of a soft material. Acoustic noise can be reduced by being absorbed by the elasticity of the connection terminals 141 and 151.

  At this time, the first and second solder accommodating portions 161 and 162 respectively provided by the first and second cutout portions of the first and second connection terminals 141 and 151 are soldered on the first surface of the capacitor body 110. It will play a role as a solder pocket that can take in.

  As a result, the solder 231 and 232 are more effectively taken into the first and second solder accommodating portions 161 and 162, so that a solder fillet is formed toward the second surface of the capacitor body 110. Can be suppressed.

  Accordingly, the piezoelectric noise transmission path of the multilayer electronic component 100 is blocked, and the maximum displacement point between the solder fillet and the capacitor body 110 is separated, thereby significantly improving the acoustic noise reduction effect of the multilayer electronic component 100. Can do.

  Further, according to the present embodiment, the acoustic noise reduction structure can also effectively suppress the vibration amount transmitted to the substrate of the piezoelectric vibration of the multilayer electronic component at an audible frequency within 20 kHz.

  Therefore, it reduces the high-frequency vibration of multilayer electronic components, prevents malfunction of sensors that can be a problem due to high-frequency vibration of 20 kHz or more of electronic components in the IT or industrial / electric equipment field, Accumulation of fatigue can be suppressed.

  As mentioned above, although embodiment of this invention was described in detail, the scope of the present invention is not limited to this, and various correction and deformation | transformation are within the range which does not deviate from the technical idea of this invention described in the claim. It will be apparent to those having ordinary knowledge in the art.

100, 100 ′, 100 ″ Electronic component 110 Capacitor body 111 Dielectric layer 121, 122 First and second internal electrodes 131, 132 First and second external electrodes 131a, 132a First and second connection portions 131b, 132b First and second band portions 131c, 132c Third and fourth band portions 141, 143, 41, 42 First connection terminals 143a, 153a First and second cutout portions 151, 153, 51, 52 Second connection terminals 161 163, first solder accommodating portion 162, 164 second solder accommodating portion 210 substrate 221, 222 first and second electrode pads 231, 232 solder

Claims (30)

A plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the plurality of dielectric layers sandwiched therebetween, the first and second surfaces facing each other, and the first and second surfaces And third and fourth surfaces facing each other, coupled to the first and second surfaces, and coupled to the third and fourth surfaces and having fifth and sixth surfaces facing each other, A capacitor body in which one ends of the first and second internal electrodes are exposed on the third and fourth surfaces, respectively;
First and second connection portions respectively disposed on the third and fourth surfaces of the capacitor body, and first and second portions extending from the first and second connection portions to a part of the first surface of the capacitor body. First and second external electrodes each including a band part;
A first connection terminal disposed on the first band part so that a first solder accommodating part opened toward the third surface of the capacitor body is provided on the first surface side of the capacitor body;
A second connection terminal disposed on the second band portion so that a second solder accommodating portion that is opened toward the fourth surface of the capacitor body is provided on the first surface side of the capacitor body; Including laminated electronic components.   The multilayer electronic component according to claim 1, wherein the first connection terminal and the second connection terminal are bump terminals.   3. The multilayer electronic component according to claim 1, further comprising first and second conductive resin layers formed on at least a part of surfaces of the first connection terminal and the second connection terminal.   4. The multilayer electronic component according to claim 1, wherein each of the first connection terminal and the second connection terminal has a thickness of 50 μm or more. 5.   5. The multilayer electronic component according to claim 1, wherein the first connection terminal and the second connection terminal are formed so as to cover a part of the first and second band portions. 6. The first connection terminal and the second connection terminal are disposed so as to be separated from the first and second connection portions, respectively.
The first solder accommodating portion is a first space portion provided below the first band portion in a direction extending toward the third surface, the fifth surface, and the sixth surface of the capacitor body,
The said 2nd solder accommodating part is a 2nd space part provided in the lower side of the said 2nd band part in the direction extended toward the 4th surface, the 5th surface, and the 6th surface of the said capacitor body. To the multilayer electronic component according to any one of 5 to 5. The first and second external electrodes may further include third and fourth band portions respectively extending from the first and second connection portions to a part of the second surface of the capacitor body,
7. The third and fourth connection terminals are disposed on the third and fourth band portions so as to face the first connection terminal and the second connection terminal, respectively. The multilayer electronic component according to 1.   In the first or second external electrode, the width of the first or second band part is BW, the width of the first or second connection part is W, and the length of the first or second solder accommodating part is The multilayer electronic component according to any one of claims 1 to 7, which satisfies BW / 4≤G≤3BW / 4 when defined as G.   The width | variety of the said 1st or 2nd connection terminal is set to BG, and when the width | variety of the said capacitor body is prescribed | regulated as W, W / 2 <= BG <= W is satisfy | filled as described in any one of Claim 1-8. Multilayer electronic components.   The first connection terminal has a first incision portion so that the first solder accommodating portion is provided, and the second connection terminal has a second incision portion so that the second solder accommodation portion is provided. Item 10. The multilayer electronic component according to any one of Items 1 to 9.   The multilayer electronic component according to claim 10, wherein the first incision portion and the second incision portion are formed to have curved surfaces.   The multilayer electronic component according to claim 10 or 11, wherein the first incision and the second incision include a plurality of bent surfaces. The first connection terminal is disposed on the first band part so that two of the first connection terminals are separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body.
13. The first connection terminal according to claim 1, wherein the second connection terminals are disposed on the second band portion so that two of the second connection terminals are separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body. The multilayer electronic component according to 1. The first and second external electrodes further include third and fourth band portions extending from the first and second connection portions to a part of the second surface of the capacitor body, respectively.
The third connection terminal is disposed on the third band part so that two of the third connection terminals are separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body.
14. The multilayer electronic component according to claim 13, wherein the fourth connection terminals are disposed on the fourth band portion so that two of the fourth connection terminals are separated from each other in a direction connecting the fifth and sixth surfaces of the capacitor body.   The multilayer electronic component according to claim 13 or 14, wherein bottom surfaces of the first connection terminal and the second connection terminal are formed flat.   The multilayer electronic component according to any one of claims 13 to 15, wherein the first connection terminal and the second connection terminal are formed to be convex toward the mounting direction. A plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the plurality of dielectric layers sandwiched therebetween, the first and second surfaces facing each other, and the first and second surfaces And third and fourth surfaces facing each other, coupled to the first and second surfaces, and coupled to the third and fourth surfaces and having fifth and sixth surfaces facing each other, A capacitor body in which one ends of the first and second internal electrodes are exposed on the third and fourth surfaces, respectively;
First and second connection portions respectively disposed on the third and fourth surfaces of the capacitor body, and first and second portions extending from the first and second connection portions to a part of the first surface of the capacitor body. First and second external electrodes each including a band part;
The first band part is provided below the first band part so that a first space part opened in a direction corresponding to the third surface, the fifth surface, and the sixth surface of the capacitor body is provided. A first connection terminal disposed on the first connection portion so as to be spaced apart from the first connection portion;
The second band part is provided below the second band part so that a second space part opened in a direction corresponding to the fourth surface, the fifth surface, and the sixth surface of the capacitor body is provided. And a second connection terminal disposed on the second connection portion so as to be spaced apart from the second connection portion. The first and second external electrodes further include third and fourth band portions extending from the first and second connection portions to a part of the second surface of the capacitor body, respectively.
18. The multilayer electronic component according to claim 17, wherein third and fourth connection terminals are respectively disposed on the third and fourth band portions so as to face the first connection terminal and the second connection terminal. .   In the first or second external electrode, the width of the first or second band part is BW, the width of the first or second connection part is W, and the length of the first or second space part is G. The multilayer electronic component according to claim 17 or 18, wherein BW / 4 ≦ G ≦ 3BW / 4 is satisfied.   The width | variety of the said 1st or 2nd connecting terminal is set to BG, When the width | variety of the said capacitor body is prescribed | regulated as W, W / 2 <= BG <= W is satisfy | filled. Multilayer electronic components. A plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the plurality of dielectric layers sandwiched therebetween, the first and second surfaces facing each other, and the first and second surfaces And third and fourth surfaces facing each other, coupled to the first and second surfaces, and coupled to the third and fourth surfaces and having fifth and sixth surfaces facing each other, A capacitor body in which one ends of the first and second internal electrodes are exposed on the third and fourth surfaces, respectively;
First and second connection portions respectively disposed on the third and fourth surfaces of the capacitor body, and first and second portions extending from the first and second connection portions to a part of the first surface of the capacitor body. First and second external electrodes each including a band part;
A first connection terminal disposed on the first band portion and having a first incision portion opened toward a third surface of the capacitor body;
A multilayer electronic component comprising: a second connection terminal disposed on the second band portion and having a second cut-out portion opened toward a fourth surface of the capacitor body.   The multilayer electronic component according to claim 21, wherein the first incision portion and the second incision portion are formed to have curved surfaces.   The multilayer electronic component according to claim 21 or 22, wherein the first incision and the second incision include a plurality of bent surfaces. A substrate having first and second electrode pads on one side;
The multilayer electronic component according to any one of claims 1 to 23, wherein the multilayer electronic component is mounted so that the first and second connection terminals are connected to the first and second electrode pads, respectively. Type electronic component mounting board. A capacitor body including a plurality of dielectric layers, and a plurality of first and second internal electrodes arranged alternately with the plurality of dielectric layers interposed therebetween;
The capacitor body is disposed to be connected to the opposite end faces of the capacitor body so as to be connected to the plurality of first and second internal electrodes, respectively, and is arranged on the connection face of the capacitor body to be connected to the opposite end faces of the capacitor body. First and second external electrodes including first and second connection portions, respectively,
First and second connection terminal portions disposed on the first connection portion on the connection surface of the capacitor main body and spaced apart from each other on the first connection portion so as to form a first solder accommodating portion. When,
Third and fourth connection terminal portions disposed on the second connection portion on the connection surface of the capacitor body and spaced apart from each other on the second connection portion so as to form a second solder accommodating portion. And a laminated electronic component. The first and second external electrodes are disposed on each end face of the capacitor body facing each other in the length direction;
The first and second connection terminal portions are arranged to be spaced apart from each other on the first connection portion in a direction orthogonal to the length direction,
26. The multilayer electronic component according to claim 25, wherein the third and fourth connection terminal portions are disposed on the second connection portion so as to be spaced apart from each other in a direction orthogonal to the length direction.   27. The multilayer electronic component according to claim 25, wherein each of the first to fourth connection terminal portions has a cuboid shape. The first connection terminal is disposed between the first connection terminal portion and the second connection terminal portion on the first connection portion, and is a rectangular parallelepiped connection terminal portion extending from the first connection terminal portion to the second connection terminal portion. Further including
The second connection terminal is disposed between the third and fourth connection terminal portions on the second connection portion and extends from the third connection terminal portion to the fourth connection terminal portion. The multilayer electronic component according to claim 27, further comprising:   29. The multilayer electronic component according to claim 28, wherein the rectangular parallelepiped connection terminal portions of the first and second connection terminals are separated from opposite end surfaces of the capacitor body.   30. The multilayer electronic component according to claim 25, wherein the first to fourth connection terminal portions have a hemispherical shape.