JP2018160029A - 半導体集積回路 - Google Patents

半導体集積回路 Download PDF

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Publication number
JP2018160029A
JP2018160029A JP2017056033A JP2017056033A JP2018160029A JP 2018160029 A JP2018160029 A JP 2018160029A JP 2017056033 A JP2017056033 A JP 2017056033A JP 2017056033 A JP2017056033 A JP 2017056033A JP 2018160029 A JP2018160029 A JP 2018160029A
Authority
JP
Japan
Prior art keywords
sram
flag
storage area
data
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2017056033A
Other languages
English (en)
Japanese (ja)
Other versions
JP2018160029A5 (enExample
Inventor
義則 安達
Yoshinori Adachi
義則 安達
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
Original Assignee
Toshiba Corp
Toshiba Electronic Devices and Storage Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Electronic Devices and Storage Corp filed Critical Toshiba Corp
Priority to JP2017056033A priority Critical patent/JP2018160029A/ja
Priority to US15/701,533 priority patent/US10262737B2/en
Publication of JP2018160029A publication Critical patent/JP2018160029A/ja
Publication of JP2018160029A5 publication Critical patent/JP2018160029A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069—I/O lines read out arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Static Random-Access Memory (AREA)
  • Memory System (AREA)
JP2017056033A 2017-03-22 2017-03-22 半導体集積回路 Pending JP2018160029A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2017056033A JP2018160029A (ja) 2017-03-22 2017-03-22 半導体集積回路
US15/701,533 US10262737B2 (en) 2017-03-22 2017-09-12 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017056033A JP2018160029A (ja) 2017-03-22 2017-03-22 半導体集積回路

Publications (2)

Publication Number Publication Date
JP2018160029A true JP2018160029A (ja) 2018-10-11
JP2018160029A5 JP2018160029A5 (enExample) 2019-04-18

Family

ID=63582891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017056033A Pending JP2018160029A (ja) 2017-03-22 2017-03-22 半導体集積回路

Country Status (2)

Country Link
US (1) US10262737B2 (enExample)
JP (1) JP2018160029A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113344767A (zh) * 2021-06-29 2021-09-03 深圳市商汤科技有限公司 数据处理装置、系统、板卡、方法、电子设备及存储介质
CN116312671B (zh) * 2023-05-19 2023-08-29 珠海妙存科技有限公司 一种sram重置方法、电路、芯片、装置与介质

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01213691A (ja) * 1988-02-22 1989-08-28 Hitachi Ltd 半導体記憶装置
JPH04346127A (ja) * 1991-05-23 1992-12-02 Sony Corp 電子装置
JP2007195216A (ja) * 2007-02-27 2007-08-02 Seiko Epson Corp 画像処理装置および画像処理方法並びに画像処理プログラム
JP2010140167A (ja) * 2008-12-10 2010-06-24 Toshiba Corp 半導体集積回路
JP2010211595A (ja) * 2009-03-11 2010-09-24 Renesas Electronics Corp データ処理装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61240310A (ja) 1985-04-17 1986-10-25 Sanyo Electric Co Ltd マイクロコンピユ−タのリセツト装置
JP3531225B2 (ja) 1994-09-09 2004-05-24 富士通株式会社 データ処理装置
JPH10333783A (ja) 1997-05-29 1998-12-18 Nec Miyagi Ltd 汎用ｌｓｉの制御方式および制御方法
JP2003323392A (ja) 2002-05-08 2003-11-14 Hitachi Ltd 記録装置
JP2007172333A (ja) * 2005-12-22 2007-07-05 Sanyo Electric Co Ltd バスアドレス選択回路およびバスアドレス選択方法
JP6079208B2 (ja) * 2012-12-19 2017-02-15 株式会社ソシオネクスト マイクロコンピュータ，そのミドルウエア及びマイクロコンピュータの動作方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01213691A (ja) * 1988-02-22 1989-08-28 Hitachi Ltd 半導体記憶装置
JPH04346127A (ja) * 1991-05-23 1992-12-02 Sony Corp 電子装置
JP2007195216A (ja) * 2007-02-27 2007-08-02 Seiko Epson Corp 画像処理装置および画像処理方法並びに画像処理プログラム
JP2010140167A (ja) * 2008-12-10 2010-06-24 Toshiba Corp 半導体集積回路
JP2010211595A (ja) * 2009-03-11 2010-09-24 Renesas Electronics Corp データ処理装置

Also Published As

Publication number Publication date
US20180277213A1 (en) 2018-09-27
US10262737B2 (en) 2019-04-16

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