JP2018157101A - トランジスタ、メモリ及びトランジスタの製造方法 - Google Patents
トランジスタ、メモリ及びトランジスタの製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 180
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 178
- 239000001301 oxygen Substances 0.000 claims abstract description 178
- 230000004888 barrier function Effects 0.000 claims abstract description 87
- 239000004065 semiconductor Substances 0.000 claims abstract description 80
- 239000010410 layer Substances 0.000 claims description 261
- 238000000034 method Methods 0.000 claims description 48
- 238000000059 patterning Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 9
- 239000011229 interlayer Substances 0.000 claims description 7
- 230000000149 penetrating effect Effects 0.000 claims 1
- 239000010408 film Substances 0.000 description 36
- 238000004544 sputter deposition Methods 0.000 description 16
- 230000008569 process Effects 0.000 description 14
- 239000000758 substrate Substances 0.000 description 14
- 238000005229 chemical vapour deposition Methods 0.000 description 9
- 238000001020 plasma etching Methods 0.000 description 9
- 238000001312 dry etching Methods 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 238000001039 wet etching Methods 0.000 description 8
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 239000011248 coating agent Substances 0.000 description 7
- 238000000576 coating method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 238000010304 firing Methods 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 229910000976 Electrical steel Inorganic materials 0.000 description 1
- 229910004541 SiN Inorganic materials 0.000 description 1
- 229910007541 Zn O Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 102220171488 rs760746448 Human genes 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
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- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
Description
図1は、実施形態に係る酸化物半導体を用いたTFTを示す断面構造図である。
図2を用いて、第1の実施形態であるTFTの製造方法を説明する。
図3は、第2の実施形態を説明する模式図であり、酸化物半導体を用いたTFTの断面構造図である。
図4を用いて、第2の実施形態であるTFTの製造方法を説明する。
図5は、第3の実施形態を説明する模式図であり、酸化物半導体を用いたTFTの断面構造図である。
図6を用いて、第3の実施形態であるTFTの製造方法を説明する。
図7(a)(b)は、第4の実施形態のTFTを説明する上面図(7(a))とTFTをA―A‘に沿って切断した断面図(7(b))である。
図8を用いて、第4の実施形態であるTFTの製造方法を説明する。
本実施形態のTFTをNAND型メモリに実装することができる。
Claims (10)
- ゲート電極と、
前記ゲート電極上に設けられたゲート絶縁層と、
前記ゲート絶縁層上に設けられた酸化物半導体層と、
前記酸化物半導体上に設けられた酸素供給層と、
前記酸素供給層上に設けられた第1酸素バリア層と、
前記酸素供給層及び前記第1酸素バリア層を貫通して設けられ、前記酸化物半導体層に接続されたソース電極と、
前記ソース電極と離間し、前記酸素供給層及び前記第1酸素バリア層を貫通して設けられ、前記酸化物半導体層に接続されたドレイン電極と、
を具備するトランジスタ。 - 第1酸素バリア層と、
ゲート電極と、
前記ゲート電極及び前記第1酸素バリア層の間に設けられたゲート絶縁層と、
前記ゲート絶縁層及び前記第1酸素バリア層の間に設けられる第1部分と前記ゲート電極から前記第1酸素バリア層への第1方向に対して交差する方向において前記第1部分と並ぶ第2部分とを含む酸化物半導体層と、
前記酸化物半導体層及び前記第1酸素バリア層の間に設けられた酸素供給層と、
前記第1部分と電気的に接続されたソース電極と、
前記第2部分と電気的に接続されたドレイン電極と、を具備し、
前記ソース電極及び前記ドレイン電極の少なくとも一方の前記第1方向における厚さは、前記第1方向における前記第1酸素バリア層の厚さと前記酸素供給層の厚さを加えた厚さよりも厚いトランジスタ。 - 前記第1方向に対して交差する方向において、前記ゲート絶縁層と隣接する層間絶縁層と、
前記層間絶縁層上に設けられた第2酸素バリア層と、を具備し、
前記第2酸素バリア層上にも前記酸素供給層及び前記第1酸素バリア層が設けられた請求項1または2記載のトランジスタ。 - 前記酸素供給層と前記ソース電極及び前記ドレイン電極との間にさらに前記第1酸素バリア層が設けられる請求項1乃至3のいずれか記載のトランジスタ。
- 前記第2酸素バリア層の材料は、前記酸化物半導体層の材料と同じである請求項3記載のトランジスタ。
- 前記層間絶縁層上において、前記第1酸素バリア層は、さらに前記酸素供給層の側方にも設けられている請求項3乃至5のいずれか記載のトランジスタ。
- 請求項6記載のトランジスタと
前記トランジスタに電気的に接続されたメモリセルを備えたメモリ。 - 絶縁層を形成する工程と、
前記絶縁層上に導電層を形成する工程と、
前記導電層をパターニングしてゲート電極を形成する工程と、
前記ゲート電極上にゲート絶縁層を形成する工程と、
前記ゲート絶縁層上に酸化物半導体層を形成する工程と、
前記酸化物半導体層をパターンニングする工程と、
前記酸化物半導体層上に酸素供給層を形成する工程と、
前記酸素供給層上に第1酸素バリア層を形成する工程と、
前記酸素供給層及び前記第1酸素バリア層に第1及び第2コンタクトホールを形成する工程と、
前記第1及び第2のコンタクトホールにソース電極及びドレイン電極をそれぞれ形成する工程と、
を具備するトランジスタ製造方法。 - 絶縁層を形成する工程と、
前記絶縁層上に導電層を形成する工程と、
前記導電層をパターニングしてゲート電極を形成する工程と、
前記ゲート電極上にゲート絶縁層を形成する工程と、
前記ゲート絶縁層上に酸化物半導体層を形成する工程と、
前記酸化物半導体層と第1酸素バリア層を同時にパターンニングする工程と、
前記酸化物半導体層上に酸素供給層を形成する工程と、
前記酸素供給層上に第2酸素バリア層を形成する工程と、
前記酸素供給層及び前記第2酸素バリア層に第1及び第2コンタクトホールを形成する工程と、
前記第1及び第2コンタクトホールにソース電極及びドレイン電極をそれぞれ形成する工程と、
を具備するトランジスタの製造方法。 - 前記酸素供給層に前記側部を形成する工程を
さらに具備する請求項9記載のトランジスタの製造方法。
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TW106130467A TWI671888B (zh) | 2017-03-17 | 2017-09-06 | 電晶體、記憶體及電晶體之製造方法 |
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US20180269217A1 (en) | 2018-09-20 |
TWI671888B (zh) | 2019-09-11 |
US10192876B2 (en) | 2019-01-29 |
TW201843814A (zh) | 2018-12-16 |
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