JP2018060966A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2018060966A JP2018060966A JP2016199127A JP2016199127A JP2018060966A JP 2018060966 A JP2018060966 A JP 2018060966A JP 2016199127 A JP2016199127 A JP 2016199127A JP 2016199127 A JP2016199127 A JP 2016199127A JP 2018060966 A JP2018060966 A JP 2018060966A
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- Prior art keywords
- chip
- lead
- semiconductor device
- lead frame
- current path
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 239000011347 resin Substances 0.000 claims abstract description 32
- 229920005989 resin Polymers 0.000 claims abstract description 32
- 238000007789 sealing Methods 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 description 9
- 230000002457 bidirectional effect Effects 0.000 description 5
- 230000005855 radiation Effects 0.000 description 5
- 238000001514 detection method Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 3
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 229910052744 lithium Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
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- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/20—Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
- G01R1/203—Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts
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- G—PHYSICS
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- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
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- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
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Abstract
Description
双方向に電流が流れる電流経路に接続されるとともに電流経路の一部を形成する半導体装置であって、
オフ状態にされることで電流経路において一方向に電流が流れるのを制限する第1スイッチング素子(12)を有する第1チップ(10)と、
オフ状態にされることで電流経路において一方向と反対方向に電流が流れるのを制限する第2スイッチング素子(22)を有する第2チップ(20)と、
一端が第1チップに接続されるとともに他端が第2チップに接続されて、第1チップと第2チップとを中継することで電流経路の一部を形成する配線(30)と、
第1チップが固定配置された第1リード(42)と、第2チップが固定配置された第2リード(44)と、を有し、電流経路を形成するリードフレーム(40)と、
第1チップ、第2チップ、配線、及び、リードフレームを一体的に封止するモールド樹脂(60)と、を備え、
配線は、電流経路に流れる電流を検出するための抵抗体(32)を有するシャント抵抗であり、
リードフレームは、配線のうちの抵抗体の両端に接続され、抵抗体による電圧降下を検出するためのセンス端子(100e,100f,46)をさらに有している。
先ず、図1に基づき、半導体装置100の回路構成について説明する。
以上、本発明の好ましい実施形態について説明したが、本発明は上記実施形態になんら制限されることなく、本発明の主旨を逸脱しない範囲において、種々変形して実施することが可能である。
Claims (7)
- 双方向に電流が流れる電流経路に接続されるとともに前記電流経路の一部を形成する半導体装置であって、
オフ状態にされることで前記電流経路において一方向に電流が流れるのを制限する第1スイッチング素子(12)を有する第1チップ(10)と、
オフ状態にされることで前記電流経路において前記一方向と反対方向に電流が流れるのを制限する第2スイッチング素子(22)を有する第2チップ(20)と、
一端が前記第1チップに接続されるとともに他端が前記第2チップに接続されて、前記第1チップと前記第2チップとを中継することで前記電流経路の一部を形成する配線(30)と、
前記第1チップが固定配置された第1リード(42)と、前記第2チップが固定配置された第2リード(44)と、を有し、前記電流経路を形成するリードフレーム(40)と、
前記第1チップ、前記第2チップ、前記配線、及び、前記リードフレームを一体的に封止するモールド樹脂(60)と、を備え、
前記配線は、前記電流経路に流れる電流を検出するための抵抗体(32)を有するシャント抵抗であり、
前記リードフレームは、前記配線のうちの前記抵抗体の両端に接続され、前記抵抗体による電圧降下を検出するためのセンス端子(100e,100f,46)をさらに有している半導体装置。 - 前記第1リードの前記第1チップと反対の面(42d)、及び、前記第2リードの前記第2チップと反対の面(44d)は、前記モールド樹脂から露出している請求項1に記載の半導体装置。
- 前記第1リード及び前記第2リードは、前記第1チップと前記第2チップの並び方向と直交する対称面(S)を基準に、互いに対称的な形状をなしている請求項1又は請求項2に記載の半導体装置。
- 前記リードフレームに対して前記第1チップ及び前記第2チップと反対側に配置され、前記第1チップ及び前記第2チップの熱を放熱するヒートシンク(80)と、
前記リードフレームと前記ヒートシンクとの間に介在し、前記リードフレーム及び前記ヒートシンクを電気的に絶縁する絶縁シート(70)と、をさらに備える請求項1〜3のいずれか1項に記載の半導体装置。 - 前記リードフレーム、前記絶縁シート、及び、前記ヒートシンクは、互いにねじ締結されている請求項4に記載の半導体装置。
- 前記リードフレームには、ねじ締結されるための穴(40a)が厚さ方向に形成され、
前記厚さ方向と直交する平面において、前記第1チップ及び前記第2チップは、前記穴の中心(C)に対する最短距離が互いに等しくされている請求項5に記載の半導体装置。 - 前記リードフレームには、ねじ締結されるための穴(40a)が厚さ方向に形成され、
前記第1リード及び前記第2リードは、前記穴の中心(C)を通るとともに前記厚さ方向に沿う対称面(S)を基準に、互いに対称的な形状をなしている請求項5又は請求項6に記載の半導体装置。
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