JP2017514394A5 - - Google Patents
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- Publication number
- JP2017514394A5 JP2017514394A5 JP2016563438A JP2016563438A JP2017514394A5 JP 2017514394 A5 JP2017514394 A5 JP 2017514394A5 JP 2016563438 A JP2016563438 A JP 2016563438A JP 2016563438 A JP2016563438 A JP 2016563438A JP 2017514394 A5 JP2017514394 A5 JP 2017514394A5
- Authority
- JP
- Japan
- Prior art keywords
- serial bus
- symbols
- protocol
- sequence
- code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000000034 method Methods 0.000 claims 12
- 230000011664 signaling Effects 0.000 claims 8
- 230000005540 biological transmission Effects 0.000 claims 7
- 230000007704 transition Effects 0.000 claims 4
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201461982466P | 2014-04-22 | 2014-04-22 | |
| US61/982,466 | 2014-04-22 | ||
| US14/682,846 | 2015-04-09 | ||
| US14/682,846 US9710424B2 (en) | 2014-04-22 | 2015-04-09 | Synchronization method for multi-symbol words |
| PCT/US2015/025464 WO2015164102A1 (en) | 2014-04-22 | 2015-04-10 | Synchronization method for multi-symbol words |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2017514394A JP2017514394A (ja) | 2017-06-01 |
| JP2017514394A5 true JP2017514394A5 (enExample) | 2018-05-17 |
Family
ID=54322156
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016563438A Ceased JP2017514394A (ja) | 2014-04-22 | 2015-04-10 | マルチシンボルワードのための同期方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9710424B2 (enExample) |
| EP (1) | EP3134820B1 (enExample) |
| JP (1) | JP2017514394A (enExample) |
| KR (1) | KR20160146786A (enExample) |
| CN (1) | CN106462533A (enExample) |
| BR (1) | BR112016024704A2 (enExample) |
| WO (1) | WO2015164102A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10417172B2 (en) | 2014-04-28 | 2019-09-17 | Qualcomm Incorporated | Sensors global bus |
| US9734121B2 (en) | 2014-04-28 | 2017-08-15 | Qualcomm Incorporated | Sensors global bus |
| WO2019040360A1 (en) * | 2017-08-24 | 2019-02-28 | Qualcomm Incorporated | GLOBAL SENSOR BUS |
| CN108334469A (zh) * | 2017-12-20 | 2018-07-27 | 广州晶序达电子科技有限公司 | 一种高速差分串行数据传输的方法、系统和装置 |
| US10901928B2 (en) * | 2018-02-15 | 2021-01-26 | United States Of America As Represented By The Secretary Of The Air Force | Data access control in an open system architecture |
| EP4422995A1 (en) * | 2021-10-26 | 2024-09-04 | KONE Corporation | Elevator communication system |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000030314A1 (fr) * | 1998-11-16 | 2000-05-25 | Sega Enterprises, Ltd. | Procede de transmission de donnees et systeme de jeu fonctionnant selon ledit procede |
| US7020729B2 (en) * | 2002-05-16 | 2006-03-28 | Intel Corporation | Protocol independent data transmission interface |
| US6880026B2 (en) | 2002-05-16 | 2005-04-12 | International Business Machines Corporation | Method and apparatus for implementing chip-to-chip interconnect bus initialization |
| US7689856B2 (en) * | 2006-11-08 | 2010-03-30 | Sicortex, Inc. | Mesochronous clock system and method to minimize latency and buffer requirements for data transfer in a large multi-processor computing system |
| US7673084B2 (en) * | 2007-02-20 | 2010-03-02 | Infineon Technologies Ag | Bus system and methods of operation using a combined data and synchronization line to communicate between bus master and slaves |
| US8291207B2 (en) * | 2009-05-18 | 2012-10-16 | Stmicroelectronics, Inc. | Frequency and symbol locking using signal generated clock frequency and symbol identification |
| JP5655562B2 (ja) * | 2010-12-28 | 2015-01-21 | ソニー株式会社 | 電子機器、電子機器の制御方法、送信装置および受信装置 |
| US9288032B2 (en) | 2012-04-13 | 2016-03-15 | Futurewei Technologies, Inc. | Dynamic frame structure for synchronous time-division duplexing digital subscriber lines |
| US8898358B2 (en) * | 2012-07-04 | 2014-11-25 | International Business Machines Corporation | Multi-protocol communication on an I2C bus |
-
2015
- 2015-04-09 US US14/682,846 patent/US9710424B2/en active Active
- 2015-04-10 KR KR1020167031026A patent/KR20160146786A/ko not_active Withdrawn
- 2015-04-10 WO PCT/US2015/025464 patent/WO2015164102A1/en not_active Ceased
- 2015-04-10 BR BR112016024704A patent/BR112016024704A2/pt not_active IP Right Cessation
- 2015-04-10 EP EP15721910.6A patent/EP3134820B1/en not_active Not-in-force
- 2015-04-10 CN CN201580021178.7A patent/CN106462533A/zh active Pending
- 2015-04-10 JP JP2016563438A patent/JP2017514394A/ja not_active Ceased
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