JP2016528588A5 - - Google Patents

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Publication number
JP2016528588A5
JP2016528588A5 JP2016519656A JP2016519656A JP2016528588A5 JP 2016528588 A5 JP2016528588 A5 JP 2016528588A5 JP 2016519656 A JP2016519656 A JP 2016519656A JP 2016519656 A JP2016519656 A JP 2016519656A JP 2016528588 A5 JP2016528588 A5 JP 2016528588A5
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JP
Japan
Prior art keywords
serial bus
wire serial
symbols
sequence
transition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2016519656A
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English (en)
Japanese (ja)
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JP2016528588A (ja
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Publication date
Priority claimed from US14/302,359 external-priority patent/US9639499B2/en
Application filed filed Critical
Publication of JP2016528588A publication Critical patent/JP2016528588A/ja
Publication of JP2016528588A5 publication Critical patent/JP2016528588A5/ja
Ceased legal-status Critical Current

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JP2016519656A 2013-06-12 2014-06-12 カメラ制御インターフェース拡張バス Ceased JP2016528588A (ja)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US201361834151P 2013-06-12 2013-06-12
US61/834,151 2013-06-12
US201361836777P 2013-06-19 2013-06-19
US61/836,777 2013-06-19
US201361886002P 2013-10-02 2013-10-02
US61/886,002 2013-10-02
US14/302,359 2014-06-11
US14/302,359 US9639499B2 (en) 2013-06-12 2014-06-11 Camera control interface extension bus
PCT/US2014/042182 WO2014201289A1 (en) 2013-06-12 2014-06-12 Camera control interface extension bus

Publications (2)

Publication Number Publication Date
JP2016528588A JP2016528588A (ja) 2016-09-15
JP2016528588A5 true JP2016528588A5 (enExample) 2017-07-06

Family

ID=52020259

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2016519656A Ceased JP2016528588A (ja) 2013-06-12 2014-06-12 カメラ制御インターフェース拡張バス
JP2016519659A Expired - Fee Related JP6257757B2 (ja) 2013-06-12 2014-06-12 カメラ制御インターフェース拡張バス

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2016519659A Expired - Fee Related JP6257757B2 (ja) 2013-06-12 2014-06-12 カメラ制御インターフェース拡張バス

Country Status (8)

Country Link
US (4) US9582457B2 (enExample)
EP (2) EP3008610B1 (enExample)
JP (2) JP2016528588A (enExample)
KR (2) KR20160018781A (enExample)
CN (2) CN105283862B (enExample)
CA (2) CA2911404A1 (enExample)
TW (1) TWI607318B (enExample)
WO (2) WO2014201293A1 (enExample)

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US9852104B2 (en) 2014-02-20 2017-12-26 Qualcomm Incorporated Coexistence of legacy and next generation devices over a shared multi-mode bus
US10139875B2 (en) 2014-02-20 2018-11-27 Qualcomm Incorporated Farewell reset and restart method for coexistence of legacy and next generation devices over a shared multi-mode bus
US9710423B2 (en) * 2014-04-02 2017-07-18 Qualcomm Incorporated Methods to send extra information in-band on inter-integrated circuit (I2C) bus
US9734121B2 (en) * 2014-04-28 2017-08-15 Qualcomm Incorporated Sensors global bus
US10417172B2 (en) 2014-04-28 2019-09-17 Qualcomm Incorporated Sensors global bus
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US11966348B2 (en) 2019-01-28 2024-04-23 Nvidia Corp. Reducing coupling and power noise on PAM-4 I/O interface
US10657094B2 (en) 2018-03-29 2020-05-19 Nvidia Corp. Relaxed 433 encoding to reduce coupling and power noise on PAM-4 data buses
US10768228B2 (en) * 2018-04-05 2020-09-08 Nxp B.V. Communication circuitry integrity assessment
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US12117959B2 (en) 2019-12-12 2024-10-15 Sony Semiconductor Solutions Corporation Communication apparatus and communication system
EP4198608A4 (en) 2020-09-07 2024-02-28 Samsung Electronics Co., Ltd. ELECTRONIC DEVICE WITH REDUCED CAMERA SIGNAL LINES
US12347508B2 (en) 2021-02-12 2025-07-01 Nvidia Corp. Error detection pin encoding scheme to avoid maximum transitions and further improve signal integrity on high speed graphic memory interfaces
US11366776B1 (en) * 2021-04-13 2022-06-21 Renesas Electronics America Inc. Network device configuration based on slave device type
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