JP2017509202A5 - - Google Patents

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Publication number
JP2017509202A5
JP2017509202A5 JP2016546760A JP2016546760A JP2017509202A5 JP 2017509202 A5 JP2017509202 A5 JP 2017509202A5 JP 2016546760 A JP2016546760 A JP 2016546760A JP 2016546760 A JP2016546760 A JP 2016546760A JP 2017509202 A5 JP2017509202 A5 JP 2017509202A5
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JP
Japan
Prior art keywords
capacitance
determining
circuit
section
sections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016546760A
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English (en)
Japanese (ja)
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JP6556736B2 (ja
JP2017509202A (ja
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Publication date
Priority claimed from US14/157,503 external-priority patent/US9367054B2/en
Application filed filed Critical
Publication of JP2017509202A publication Critical patent/JP2017509202A/ja
Publication of JP2017509202A5 publication Critical patent/JP2017509202A5/ja
Application granted granted Critical
Publication of JP6556736B2 publication Critical patent/JP6556736B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2016546760A 2014-01-16 2015-01-16 電圧降下を制約することによる、パワーゲーティングされた複数のセクションのサイジング Expired - Fee Related JP6556736B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/157,503 US9367054B2 (en) 2014-01-16 2014-01-16 Sizing power-gated sections by constraining voltage droop
US14/157,503 2014-01-16
PCT/US2015/011762 WO2015109188A1 (en) 2014-01-16 2015-01-16 Sizing power-gated sections by constraining voltage droop

Publications (3)

Publication Number Publication Date
JP2017509202A JP2017509202A (ja) 2017-03-30
JP2017509202A5 true JP2017509202A5 (https=) 2018-02-08
JP6556736B2 JP6556736B2 (ja) 2019-08-07

Family

ID=52446439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016546760A Expired - Fee Related JP6556736B2 (ja) 2014-01-16 2015-01-16 電圧降下を制約することによる、パワーゲーティングされた複数のセクションのサイジング

Country Status (7)

Country Link
US (1) US9367054B2 (https=)
EP (1) EP3095193A1 (https=)
JP (1) JP6556736B2 (https=)
KR (1) KR102219822B1 (https=)
CN (1) CN105917583B (https=)
BR (1) BR112016016431A2 (https=)
WO (1) WO2015109188A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102184740B1 (ko) * 2014-06-16 2020-11-30 에스케이하이닉스 주식회사 전자 장치 및 그를 포함하는 전자 시스템
US9438244B2 (en) * 2014-10-28 2016-09-06 Xilinx, Inc. Circuits for and methods of controlling power within an integrated circuit
US10152112B2 (en) * 2015-06-10 2018-12-11 Sonics, Inc. Power manager with a power switch arbitrator
US10928886B2 (en) * 2019-02-25 2021-02-23 Intel Corporation Frequency overshoot and voltage droop mitigation apparatus and method

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2797761B2 (ja) * 1991-07-11 1998-09-17 日本電気株式会社 パワーオン回路
WO1998054727A2 (en) * 1997-05-30 1998-12-03 Micron Technology, Inc. 256 Meg DYNAMIC RANDOM ACCESS MEMORY
KR100780750B1 (ko) 2006-05-11 2007-11-30 한국과학기술원 표준 셀과 파워 게이팅 셀을 이용한 파워 네트워크 및 이를가지는 반도체 장치
JP2008065732A (ja) 2006-09-11 2008-03-21 Nec Electronics Corp 半導体集積回路の設計方法及び設計システム
US20080120514A1 (en) * 2006-11-10 2008-05-22 Yehea Ismail Thermal management of on-chip caches through power density minimization
US7868479B2 (en) * 2007-06-27 2011-01-11 Qualcomm Incorporated Power gating for multimedia processing power management
US8958575B2 (en) * 2007-06-29 2015-02-17 Qualcomm Incorporated Amplifier with configurable DC-coupled or AC-coupled output
JP5326628B2 (ja) 2008-03-03 2013-10-30 富士通株式会社 電子回路装置
US8302059B2 (en) 2008-05-27 2012-10-30 Nxp B.V. Power switch design method and program
EP2369509A1 (en) 2010-03-01 2011-09-28 Nxp B.V. Method of generating an integrated circuit layout and integrated circuit
US8266569B2 (en) 2010-03-05 2012-09-11 Advanced Micro Devices, Inc. Identification of critical enables using MEA and WAA metrics
JP2011199094A (ja) * 2010-03-23 2011-10-06 Renesas Electronics Corp 半導体集積回路及び半導体集積回路の電源スイッチ制御方法
WO2011137339A2 (en) 2010-04-30 2011-11-03 Cornell University Systems and methods for zero-delay wakeup for power gated asynchronous pipelines
JP5638134B2 (ja) * 2010-07-19 2014-12-10 ナショナル セミコンダクター コーポレーションＮａｔｉｏｎａｌ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｃｏｒｐｏｒａｔｉｏｎ 区分された粗いおよび微細な制御を有するアダプティブ信号イコライザ
US9104395B2 (en) * 2012-05-02 2015-08-11 Semiconductor Energy Laboratory Co., Ltd. Processor and driving method thereof

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