JP2016527718A - チップをウェハに対し集積する方法及びその装置 - Google Patents
チップをウェハに対し集積する方法及びその装置 Download PDFInfo
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- JP2016527718A JP2016527718A JP2016527976A JP2016527976A JP2016527718A JP 2016527718 A JP2016527718 A JP 2016527718A JP 2016527976 A JP2016527976 A JP 2016527976A JP 2016527976 A JP2016527976 A JP 2016527976A JP 2016527718 A JP2016527718 A JP 2016527718A
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- H01L2224/83907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
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- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract
Description
Claims (11)
- 少なくとも一つのチップをウェハ上に配置して集積化された製造物を形成する工程と、
該集積化された製造物上に膜を形成して該集積化された製造物を実質的に流体密封にする工程と、
前記少なくとも一つのチップを前記ウェハに永久的に接合する間前記膜に所定の陽圧を加える工程と、
前記少なくとも一つのチップを前記ウェハに永久的に接合した後で、前記集積化された製造物から前記膜を取り除く工程と
を含むチップをウェハに対し集積する方法。 - 更に、前記少なくとも一つのチップを前記ウェハに永久的に接合する間前記集積化された製造物の温度を調節する工程を含む前記請求項1に記載されたチップをウェハに対し集積する方法。
- 前記少なくとも一つのチップを前記ウェハ上に配置する工程が、
前記少なくとも一つのチップを前記ウェハに対して位置合わせすることと、
前記少なくとも一つのチップを前記ウェハに仮接合して、前記集積化された製造物を形成することを含む前記請求項1に記載されたチップをウェハに対し集積する方法。 - 前記集積化された製造物上に膜を形成する工程が、
真空チャンバ内で前記集積化された製造物上に膜を皮膜することを含む前記請求項1に記載されたチップをウェハに対し集積する方法。 - 前記集積化された製造物上に膜を形成する工程が、
前記集積化された製造物上に前記膜を皮膜することと、
該膜と集積化された製造物の間に閉じこめられたガスを取り除くことを含む前記請求項1に記載されたチップをウェハに対し集積する方法。 - 前記集積化された製造物上に膜を形成する工程が、
前記集積化された製造物上に前記膜を堆積することと、
該膜と集積化された製造物の間に閉じこめられたガスを取り除くことを含む前記請求項1に記載されたチップをウェハに対し集積する方法。 - 前記膜に所定の圧力を加える工程が、
膜上のガス圧を所定の陽圧に昇圧することを含む前記請求項1に記載されたチップをウェハに対し集積する方法。 - 前記集積化された製造物から前記膜を取り除く工程が、
前記膜を有する集積化された製造物をスピニング部材に配置することと、
該膜上に化学溶剤を加えること
を含む前記請求項1に記載されたチップをウェハに対し集積する方法。 - 前記集積化された製造物の温度を調節する工程が、
前記集積化された製造物の周囲のガス温度を接合温度に昇温することを含む前記請求項2に記載されたチップをウェハに対し集積する方法。 - 集積化された製造物上に膜を形成する塗布モジュールであって、該集積化された製造物が、少なくとも一つのチップをウェハ上に配置して、前記集積化された製造物を実質的に流体密封にするように、形成される塗布モジュールと、
前記少なくとも一つのチップを前記ウェハに永久接合する間前記膜に圧力を加える接合モジュールと、
前記集積化された製造物から前記膜を取り除く洗浄モジュールを含むチップをウェハに対し集積する装置。 - 更に、前記膜を硬化する膜ベーキングモジュールと、
前記集積化された製造物を移動する転送モジュールを含む、前記請求項10に記載のチップをウェハに対し集積する装置。
Applications Claiming Priority (3)
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SG201305439-0 | 2013-07-16 | ||
SG2013054390 | 2013-07-16 | ||
PCT/SG2014/000335 WO2015009238A1 (en) | 2013-07-16 | 2014-07-16 | Method and apparatus for chip-to-wafer integration |
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JP2016527718A true JP2016527718A (ja) | 2016-09-08 |
JP2016527718A5 JP2016527718A5 (ja) | 2017-08-24 |
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WO2021188042A1 (en) * | 2020-03-18 | 2021-09-23 | Airise Pte. Ltd. | Bonding apparatus, system, and method of bonding |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01501032A (ja) * | 1986-09-26 | 1989-04-06 | ゼネラル・エレクトリック・カンパニイ | 少なくとも1つの半導体チップ装置の表面に重合体フィルムを結合する方法 |
US5352629A (en) * | 1993-01-19 | 1994-10-04 | General Electric Company | Process for self-alignment and planarization of semiconductor chips attached by solder die adhesive to multi-chip modules |
JP2010153670A (ja) * | 2008-12-26 | 2010-07-08 | Panasonic Corp | フリップチップ実装方法と半導体装置 |
JP2011124413A (ja) * | 2009-12-11 | 2011-06-23 | Murata Mfg Co Ltd | 電子部品モジュールの製造方法及び電子部品モジュール |
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Publication number | Priority date | Publication date | Assignee | Title |
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US4933042A (en) * | 1986-09-26 | 1990-06-12 | General Electric Company | Method for packaging integrated circuit chips employing a polymer film overlay layer |
US5605547A (en) * | 1995-03-27 | 1997-02-25 | Micron Technology, Inc. | Method and apparatus for mounting a component to a substrate using an anisotropic adhesive, a compressive cover film, and a conveyor |
-
2014
- 2014-07-16 WO PCT/SG2014/000335 patent/WO2015009238A1/en active Application Filing
- 2014-07-16 SG SG11201600268YA patent/SG11201600268YA/en unknown
- 2014-07-16 JP JP2016527976A patent/JP6446450B2/ja active Active
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01501032A (ja) * | 1986-09-26 | 1989-04-06 | ゼネラル・エレクトリック・カンパニイ | 少なくとも1つの半導体チップ装置の表面に重合体フィルムを結合する方法 |
US5352629A (en) * | 1993-01-19 | 1994-10-04 | General Electric Company | Process for self-alignment and planarization of semiconductor chips attached by solder die adhesive to multi-chip modules |
JP2010153670A (ja) * | 2008-12-26 | 2010-07-08 | Panasonic Corp | フリップチップ実装方法と半導体装置 |
JP2011124413A (ja) * | 2009-12-11 | 2011-06-23 | Murata Mfg Co Ltd | 電子部品モジュールの製造方法及び電子部品モジュール |
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SG11201600268YA (en) | 2016-02-26 |
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US9613928B2 (en) | 2017-04-04 |
JP6446450B2 (ja) | 2018-12-26 |
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