JP2016514332A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2016514332A5 JP2016514332A5 JP2016501029A JP2016501029A JP2016514332A5 JP 2016514332 A5 JP2016514332 A5 JP 2016514332A5 JP 2016501029 A JP2016501029 A JP 2016501029A JP 2016501029 A JP2016501029 A JP 2016501029A JP 2016514332 A5 JP2016514332 A5 JP 2016514332A5
- Authority
- JP
- Japan
- Prior art keywords
- clock
- delay line
- detecting
- monotonic
- tampering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/801,375 | 2013-03-13 | ||
| US13/801,375 US9607153B2 (en) | 2013-03-13 | 2013-03-13 | Apparatus and method for detecting clock tampering |
| PCT/US2014/022655 WO2014164512A1 (en) | 2013-03-13 | 2014-03-10 | Apparatus and method for detecting clock tampering |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016514332A JP2016514332A (ja) | 2016-05-19 |
| JP2016514332A5 true JP2016514332A5 (enExample) | 2017-06-29 |
| JP6169776B2 JP6169776B2 (ja) | 2017-07-26 |
Family
ID=50439495
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016501029A Expired - Fee Related JP6169776B2 (ja) | 2013-03-13 | 2014-03-10 | クロック改竄を検出するための装置および方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9607153B2 (enExample) |
| EP (1) | EP2973196A1 (enExample) |
| JP (1) | JP6169776B2 (enExample) |
| KR (1) | KR101811228B1 (enExample) |
| CN (1) | CN105103160B (enExample) |
| WO (1) | WO2014164512A1 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9306751B2 (en) * | 2013-04-30 | 2016-04-05 | Kathie Wilson | Secure time and crypto system |
| US9223960B1 (en) * | 2014-07-31 | 2015-12-29 | Winbond Electronics Corporation | State-machine clock tampering detection |
| US10148258B2 (en) * | 2016-09-28 | 2018-12-04 | Mellanox Technologies, Ltd. | Power supply voltage monitoring and high-resolution adaptive clock stretching circuit |
| CN108073831B (zh) * | 2016-11-15 | 2020-07-24 | 华为技术有限公司 | 一种检测安全芯片工作状态的方法及检测电路 |
| US20190050570A1 (en) * | 2017-08-14 | 2019-02-14 | Qualcomm Incorporated | Computer resource access control based on the state of a non-accessing component |
| EP3506548A1 (en) * | 2017-12-27 | 2019-07-03 | Secure-IC SAS | Quantitative digital sensor |
| WO2020213334A1 (ja) * | 2019-04-17 | 2020-10-22 | ローム株式会社 | 同期リセット信号生成回路及びデジタル処理装置 |
| CN114586034B (zh) | 2019-11-19 | 2025-10-17 | 谷歌有限责任公司 | 时钟波动下的电压变化检测 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4686677A (en) | 1985-08-02 | 1987-08-11 | Unisys Corporation | Apparatus and method for detecting time-related faults |
| JPS6379121A (ja) * | 1986-09-24 | 1988-04-09 | Nec Corp | クロツク分配システム |
| US5521499A (en) | 1992-12-23 | 1996-05-28 | Comstream Corporation | Signal controlled phase shifter |
| JPH0784667A (ja) * | 1993-09-14 | 1995-03-31 | Fujitsu Ltd | クロックドライバの異常監視方法及び装置 |
| ATE340391T1 (de) * | 2000-06-12 | 2006-10-15 | Supersensor Proprietary Ltd | Leser für unterschiedliche seitenbänder in einem elektronisches identifizierungssystem |
| GB2397709B (en) * | 2003-01-27 | 2005-12-28 | Evangelos Arkas | Period-to-digital converter |
| EP1514166B1 (en) | 2003-04-15 | 2012-01-11 | NDS Limited | Secure clock |
| US7233182B1 (en) * | 2004-12-10 | 2007-06-19 | Marvell International Ltd. | Circuitry for eliminating false lock in delay-locked loops |
| EP2002271B1 (en) | 2006-03-27 | 2010-05-26 | Freescale Semiconductor, Inc. | Apparatus for detecting clock failure and method therefor |
| TWI329995B (en) * | 2006-09-29 | 2010-09-01 | Via Tech Inc | Lock detecting circuit and method for phase lock loop systems |
| WO2010048720A1 (en) * | 2008-10-31 | 2010-05-06 | Certicom Corp. | System for detecting a reset condition in an electronic circuit |
| US7971105B2 (en) | 2009-01-16 | 2011-06-28 | Freescale Semiconductor, Inc. | Device and method for detecting and correcting timing errors |
| GB0911046D0 (en) | 2009-06-25 | 2009-08-12 | St Microelectronics Res & Dev | Detection of bad clock conditions |
| US8624647B2 (en) | 2010-01-19 | 2014-01-07 | Altera Corporation | Duty cycle correction circuit for memory interfaces in integrated circuits |
| US20110299678A1 (en) | 2010-06-07 | 2011-12-08 | Alexander Roger Deas | Secure means for generating a specific key from unrelated parameters |
| JP2013187817A (ja) * | 2012-03-09 | 2013-09-19 | Advantest Corp | 測定装置、測定方法およびプログラム |
| US9323957B2 (en) * | 2013-03-01 | 2016-04-26 | Marvell World Trade Ltd. | Anti-tamper system based on dual random bits generators for integrated circuits |
| US9819933B2 (en) * | 2013-10-18 | 2017-11-14 | Alcatel Lucent | Automated testing of media devices |
-
2013
- 2013-03-13 US US13/801,375 patent/US9607153B2/en not_active Expired - Fee Related
-
2014
- 2014-03-10 EP EP14715490.0A patent/EP2973196A1/en not_active Withdrawn
- 2014-03-10 JP JP2016501029A patent/JP6169776B2/ja not_active Expired - Fee Related
- 2014-03-10 WO PCT/US2014/022655 patent/WO2014164512A1/en not_active Ceased
- 2014-03-10 KR KR1020157027594A patent/KR101811228B1/ko not_active Expired - Fee Related
- 2014-03-10 CN CN201480010097.2A patent/CN105103160B/zh not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2016512942A5 (enExample) | ||
| JP2016538747A5 (enExample) | ||
| Bauwens et al. | Marginal likelihood for Markov-switching and change-point GARCH models | |
| Keliris et al. | A robust nonlinear observer-based approach for distributed fault detection of input–output interconnected systems | |
| Castle et al. | Robust approaches to forecasting | |
| JP2018526912A5 (enExample) | ||
| CN106662868B (zh) | 用于对飞机的机载设备的退化进行监视的包括确定计数阈值的方法 | |
| KR101811228B1 (ko) | 클록 탬퍼링을 검출하기 위한 장치 및 방법 | |
| SG11201805489YA (en) | Memory device, and data processing method based on multi-layer rram crossbar array | |
| JP2018529284A5 (enExample) | ||
| WO2013019869A3 (en) | Data fingerpringting for copy accuracy assurance | |
| WO2016069216A3 (en) | Methods and apparatus for error detection in a magnetic field sensor | |
| WO2014190339A3 (en) | Delayed actions for a decentralized system of learning devices | |
| WO2013070768A3 (en) | Embedded transient scanning system apparatus and methodology | |
| Cogranne et al. | A local adaptive model of natural images for almost optimal detection of hidden data | |
| IN2014CH00439A (enExample) | ||
| Cogranne et al. | Application of hypothesis testing theory for optimal detection of LSB matching data hiding | |
| MX2015009039A (es) | Detector de falla factible. | |
| WO2014191838A3 (en) | Systems and methods for dqs gating | |
| JP2014085341A5 (enExample) | ||
| JP2014207670A5 (enExample) | ||
| JP2015522188A5 (enExample) | ||
| GB201211425D0 (en) | Data tranfer between clock domains | |
| JP2015194405A5 (enExample) | ||
| JP2016510577A5 (enExample) |