JP2016510471A5 - - Google Patents

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Publication number
JP2016510471A5
JP2016510471A5 JP2015556089A JP2015556089A JP2016510471A5 JP 2016510471 A5 JP2016510471 A5 JP 2016510471A5 JP 2015556089 A JP2015556089 A JP 2015556089A JP 2015556089 A JP2015556089 A JP 2015556089A JP 2016510471 A5 JP2016510471 A5 JP 2016510471A5
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JP
Japan
Prior art keywords
memory
integrated circuit
type
application
processor readable
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JP2015556089A
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English (en)
Japanese (ja)
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JP2016510471A (ja
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Priority claimed from US13/758,613 external-priority patent/US9110592B2/en
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Publication of JP2016510471A publication Critical patent/JP2016510471A/ja
Publication of JP2016510471A5 publication Critical patent/JP2016510471A5/ja
Pending legal-status Critical Current

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JP2015556089A 2013-02-04 2014-01-29 異種メモリの動的管理 Pending JP2016510471A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/758,613 2013-02-04
US13/758,613 US9110592B2 (en) 2013-02-04 2013-02-04 Dynamic allocation of heterogenous memory in a computing system
PCT/US2014/013468 WO2014120698A1 (en) 2013-02-04 2014-01-29 Dynamic management of heterogeneous memory

Publications (2)

Publication Number Publication Date
JP2016510471A JP2016510471A (ja) 2016-04-07
JP2016510471A5 true JP2016510471A5 (enExample) 2017-02-23

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ID=50156901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015556089A Pending JP2016510471A (ja) 2013-02-04 2014-01-29 異種メモリの動的管理

Country Status (11)

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US (1) US9110592B2 (enExample)
EP (1) EP2951689A1 (enExample)
JP (1) JP2016510471A (enExample)
KR (1) KR102207598B1 (enExample)
CN (1) CN105144106B (enExample)
AU (1) AU2014212559A1 (enExample)
BR (1) BR112015018321A2 (enExample)
CA (1) CA2898127A1 (enExample)
MX (1) MX352450B (enExample)
RU (1) RU2015132229A (enExample)
WO (1) WO2014120698A1 (enExample)

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