JP2016510471A - 異種メモリの動的管理 - Google Patents

異種メモリの動的管理 Download PDF

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Publication number
JP2016510471A
JP2016510471A JP2015556089A JP2015556089A JP2016510471A JP 2016510471 A JP2016510471 A JP 2016510471A JP 2015556089 A JP2015556089 A JP 2015556089A JP 2015556089 A JP2015556089 A JP 2015556089A JP 2016510471 A JP2016510471 A JP 2016510471A
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JP
Japan
Prior art keywords
memory
type
integrated circuit
application
processor readable
Prior art date
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Pending
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JP2015556089A
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English (en)
Japanese (ja)
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JP2016510471A5 (enExample
Inventor
リー，ブライアン
トレンブレイ，マーク
ボンド，バリー
サドフスキー，ヴラド
ランバーグ，マーク・ジョン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsoft Corp
Microsoft Technology Licensing LLC
Original Assignee
Microsoft Corp
Microsoft Technology Licensing LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp, Microsoft Technology Licensing LLC filed Critical Microsoft Corp
Publication of JP2016510471A publication Critical patent/JP2016510471A/ja
Publication of JP2016510471A5 publication Critical patent/JP2016510471A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/501—Performance criteria
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Power Sources (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Debugging And Monitoring (AREA)
  • Dram (AREA)
JP2015556089A 2013-02-04 2014-01-29 異種メモリの動的管理 Pending JP2016510471A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/758,613 2013-02-04
US13/758,613 US9110592B2 (en) 2013-02-04 2013-02-04 Dynamic allocation of heterogenous memory in a computing system
PCT/US2014/013468 WO2014120698A1 (en) 2013-02-04 2014-01-29 Dynamic management of heterogeneous memory

Publications (2)

Publication Number Publication Date
JP2016510471A true JP2016510471A (ja) 2016-04-07
JP2016510471A5 JP2016510471A5 (enExample) 2017-02-23

Family

ID=50156901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015556089A Pending JP2016510471A (ja) 2013-02-04 2014-01-29 異種メモリの動的管理

Country Status (11)

Country Link
US (1) US9110592B2 (enExample)
EP (1) EP2951689A1 (enExample)
JP (1) JP2016510471A (enExample)
KR (1) KR102207598B1 (enExample)
CN (1) CN105144106B (enExample)
AU (1) AU2014212559A1 (enExample)
BR (1) BR112015018321A2 (enExample)
CA (1) CA2898127A1 (enExample)
MX (1) MX352450B (enExample)
RU (1) RU2015132229A (enExample)
WO (1) WO2014120698A1 (enExample)

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JP2021043654A (ja) * 2019-09-10 2021-03-18 富士通株式会社 情報処理装置及びプロセス配置決定プログラム

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Also Published As

Publication number Publication date
CA2898127A1 (en) 2014-08-07
EP2951689A1 (en) 2015-12-09
US20140223098A1 (en) 2014-08-07
KR20150114958A (ko) 2015-10-13
AU2014212559A1 (en) 2015-07-30
RU2015132229A (ru) 2017-02-08
MX2015010046A (es) 2016-03-04
KR102207598B1 (ko) 2021-01-25
MX352450B (es) 2017-11-24
WO2014120698A1 (en) 2014-08-07
CN105144106B (zh) 2020-05-05
US9110592B2 (en) 2015-08-18
CN105144106A (zh) 2015-12-09
BR112015018321A2 (pt) 2017-07-18

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