JP2016062355A5 - - Google Patents

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Publication number
JP2016062355A5
JP2016062355A5 JP2014190390A JP2014190390A JP2016062355A5 JP 2016062355 A5 JP2016062355 A5 JP 2016062355A5 JP 2014190390 A JP2014190390 A JP 2014190390A JP 2014190390 A JP2014190390 A JP 2014190390A JP 2016062355 A5 JP2016062355 A5 JP 2016062355A5
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JP
Japan
Prior art keywords
frequency
clock signal
circuit
output
clock
Prior art date
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Application number
JP2014190390A
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English (en)
Japanese (ja)
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JP6410538B2 (ja
JP2016062355A (ja
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Priority to JP2014190390A priority Critical patent/JP6410538B2/ja
Priority claimed from JP2014190390A external-priority patent/JP6410538B2/ja
Priority to US14/853,676 priority patent/US9419599B2/en
Publication of JP2016062355A publication Critical patent/JP2016062355A/ja
Publication of JP2016062355A5 publication Critical patent/JP2016062355A5/ja
Application granted granted Critical
Publication of JP6410538B2 publication Critical patent/JP6410538B2/ja
Expired - Fee Related legal-status Critical Current
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JP2014190390A 2014-09-18 2014-09-18 半導体集積回路、半導体集積回路を備えた装置、半導体集積回路におけるクロックの制御方法、並びにプログラム。 Expired - Fee Related JP6410538B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014190390A JP6410538B2 (ja) 2014-09-18 2014-09-18 半導体集積回路、半導体集積回路を備えた装置、半導体集積回路におけるクロックの制御方法、並びにプログラム。
US14/853,676 US9419599B2 (en) 2014-09-18 2015-09-14 Semiconductor integrated circuit, apparatus including semiconductor integrated circuit, and method for controlling clock signal in semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014190390A JP6410538B2 (ja) 2014-09-18 2014-09-18 半導体集積回路、半導体集積回路を備えた装置、半導体集積回路におけるクロックの制御方法、並びにプログラム。

Publications (3)

Publication Number Publication Date
JP2016062355A JP2016062355A (ja) 2016-04-25
JP2016062355A5 true JP2016062355A5 (https=) 2017-10-26
JP6410538B2 JP6410538B2 (ja) 2018-10-24

Family

ID=55526719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014190390A Expired - Fee Related JP6410538B2 (ja) 2014-09-18 2014-09-18 半導体集積回路、半導体集積回路を備えた装置、半導体集積回路におけるクロックの制御方法、並びにプログラム。

Country Status (2)

Country Link
US (1) US9419599B2 (https=)
JP (1) JP6410538B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6681244B2 (ja) * 2016-03-30 2020-04-15 キヤノン株式会社 画像処理装置、その制御方法、及びプログラム
JP7556331B2 (ja) * 2021-06-30 2024-09-26 株式会社オートネットワーク技術研究所 車載装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6194932B1 (en) * 1997-10-20 2001-02-27 Fujitsu Limited Integrated circuit device
US5939911A (en) * 1998-03-05 1999-08-17 Motorola, Inc. Frequency prescaler method and apparatus responsive to low input drive levels
JP4190662B2 (ja) * 1999-06-18 2008-12-03 エルピーダメモリ株式会社 半導体装置及びタイミング制御回路
JP2002351571A (ja) * 2001-05-25 2002-12-06 Yaskawa Electric Corp クロック供給停止回路
JP4111932B2 (ja) * 2004-05-21 2008-07-02 富士通株式会社 クロック分周器とそのトリガ信号発生回路
KR100674910B1 (ko) * 2004-07-06 2007-01-26 삼성전자주식회사 글리치를 유발하지 않는 클럭 스위칭 회로
US7088156B2 (en) * 2004-08-31 2006-08-08 Micron Technology, Inc. Delay-locked loop having a pre-shift phase detector
KR100903365B1 (ko) 2007-11-02 2009-06-23 주식회사 하이닉스반도체 반도체 메모리 장치
JP2013008133A (ja) * 2011-06-23 2013-01-10 Yokogawa Electric Corp マイコンのクロック制御回路
JP6429549B2 (ja) * 2014-09-18 2018-11-28 キヤノン株式会社 半導体集積回路、半導体集積回路を備えた装置、半導体集積回路におけるクロックの制御方法、並びにプログラム。

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