JP2015149459A5 - - Google Patents

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Publication number
JP2015149459A5
JP2015149459A5 JP2014023101A JP2014023101A JP2015149459A5 JP 2015149459 A5 JP2015149459 A5 JP 2015149459A5 JP 2014023101 A JP2014023101 A JP 2014023101A JP 2014023101 A JP2014023101 A JP 2014023101A JP 2015149459 A5 JP2015149459 A5 JP 2015149459A5
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JP
Japan
Prior art keywords
electrode
wiring board
semiconductor chip
width
semiconductor device
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JP2014023101A
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English (en)
Japanese (ja)
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JP2015149459A (ja
JP6130312B2 (ja
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Priority to JP2014023101A priority Critical patent/JP6130312B2/ja
Priority claimed from JP2014023101A external-priority patent/JP6130312B2/ja
Priority to US14/554,550 priority patent/US9530744B2/en
Publication of JP2015149459A publication Critical patent/JP2015149459A/ja
Publication of JP2015149459A5 publication Critical patent/JP2015149459A5/ja
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JP2014023101A 2014-02-10 2014-02-10 半導体装置及びその製造方法 Active JP6130312B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014023101A JP6130312B2 (ja) 2014-02-10 2014-02-10 半導体装置及びその製造方法
US14/554,550 US9530744B2 (en) 2014-02-10 2014-11-26 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014023101A JP6130312B2 (ja) 2014-02-10 2014-02-10 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2015149459A JP2015149459A (ja) 2015-08-20
JP2015149459A5 true JP2015149459A5 (https=) 2016-11-04
JP6130312B2 JP6130312B2 (ja) 2017-05-17

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JP2014023101A Active JP6130312B2 (ja) 2014-02-10 2014-02-10 半導体装置及びその製造方法

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US (1) US9530744B2 (https=)
JP (1) JP6130312B2 (https=)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101799668B1 (ko) * 2016-04-07 2017-11-20 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조 방법
JP6836121B2 (ja) 2016-08-19 2021-02-24 セイコーエプソン株式会社 実装構造体、超音波デバイス、超音波探触子、超音波装置、電子機器、及び実装構造体の製造方法
JP6691031B2 (ja) * 2016-10-05 2020-04-28 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
EP3322267B1 (en) * 2016-11-10 2025-02-19 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with adhesion promoting shape of wiring structure
US11444048B2 (en) * 2017-10-05 2022-09-13 Texas Instruments Incorporated Shaped interconnect bumps in semiconductor devices
JP7117615B2 (ja) * 2017-12-08 2022-08-15 パナソニックＩｐマネジメント株式会社 半導体装置の製造方法
JP7238271B2 (ja) * 2018-05-21 2023-03-14 住友ベークライト株式会社 電子装置、及び電子装置の製造方法
JP7322456B2 (ja) * 2019-03-28 2023-08-08 Tdk株式会社 電子部品搭載基板
US12381193B2 (en) 2020-12-01 2025-08-05 Intel Corporation Integrated circuit assemblies
US12293986B2 (en) 2020-12-04 2025-05-06 Yibu Semiconductor Co., Ltd. Method for forming chip packages and a chip package
CN112542391B (zh) * 2020-12-04 2022-11-11 上海易卜半导体有限公司 芯片互联方法、互联器件以及形成封装件的方法
TWI885204B (zh) * 2020-12-08 2025-06-01 美商英特爾股份有限公司 積體電路裝置及組件的混合製造
US11756886B2 (en) * 2020-12-08 2023-09-12 Intel Corporation Hybrid manufacturing of microeletronic assemblies with first and second integrated circuit structures
US11817442B2 (en) 2020-12-08 2023-11-14 Intel Corporation Hybrid manufacturing for integrated circuit devices and assemblies
US12412835B2 (en) 2021-04-27 2025-09-09 Intel Corporation Back-side power delivery with glass support at the front
US12400997B2 (en) 2021-06-11 2025-08-26 Intel Corporation Hybrid manufacturing with modified via-last process
KR20230058257A (ko) 2021-10-22 2023-05-03 삼성전자주식회사 반도체 소자 및 이를 포함하는 반도체 패키지
EP4548723A1 (en) 2022-06-29 2025-05-07 Intel Corporation Memory arrays with backside components and angled transistors
US20240079307A1 (en) * 2022-09-07 2024-03-07 Qualcomm Incorporated Package comprising a substrate with post interconnects having a profile cross section of a trapezoid shape

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3378334B2 (ja) 1994-01-26 2003-02-17 株式会社東芝 半導体装置実装構造体
JP2001044319A (ja) * 1999-07-27 2001-02-16 Kyocera Corp 配線基板およびその実装構造
TW200507218A (en) * 2003-03-31 2005-02-16 North Corp Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit module
TWI241702B (en) * 2003-07-28 2005-10-11 Siliconware Precision Industries Co Ltd Ground pad structure for preventing solder extrusion and semiconductor package having the ground pad structure
US7989707B2 (en) * 2005-12-14 2011-08-02 Shinko Electric Industries Co., Ltd. Chip embedded substrate and method of producing the same
JP2007305799A (ja) * 2006-05-11 2007-11-22 Fujitsu Ltd 半導体装置の製造方法
JP2006279062A (ja) * 2006-05-25 2006-10-12 Nec Corp 半導体素子および半導体装置
JP2008306128A (ja) * 2007-06-11 2008-12-18 Shinko Electric Ind Co Ltd 半導体装置およびその製造方法
JP2010153778A (ja) * 2008-11-21 2010-07-08 Panasonic Corp 半導体装置
US8415781B2 (en) * 2010-08-09 2013-04-09 Ibiden Co., Ltd. Electronic component and method for manufacturing the same
JP2013187353A (ja) 2012-03-08 2013-09-19 Renesas Electronics Corp 電子装置および電子装置の製造方法
JP5951414B2 (ja) * 2012-08-29 2016-07-13 新光電気工業株式会社 電子部品内蔵基板及び電子部品内蔵基板の製造方法
US9536850B2 (en) * 2013-03-08 2017-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Package having substrate with embedded metal trace overlapped by landing pad

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