JP2015133126A5 - - Google Patents

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Publication number
JP2015133126A5
JP2015133126A5 JP2015027891A JP2015027891A JP2015133126A5 JP 2015133126 A5 JP2015133126 A5 JP 2015133126A5 JP 2015027891 A JP2015027891 A JP 2015027891A JP 2015027891 A JP2015027891 A JP 2015027891A JP 2015133126 A5 JP2015133126 A5 JP 2015133126A5
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JP
Japan
Prior art keywords
instruction
register
identifying
return
search
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Pending
Application number
JP2015027891A
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English (en)
Japanese (ja)
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JP2015133126A (ja
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Publication date
Priority claimed from US11/934,264 external-priority patent/US8341383B2/en
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Publication of JP2015133126A publication Critical patent/JP2015133126A/ja
Publication of JP2015133126A5 publication Critical patent/JP2015133126A5/ja
Pending legal-status Critical Current

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JP2015027891A 2007-11-02 2015-02-16 プロシージャリターンシーケンスを加速するための方法およびシステム Pending JP2015133126A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/934,264 2007-11-02
US11/934,264 US8341383B2 (en) 2007-11-02 2007-11-02 Method and a system for accelerating procedure return sequences

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2013095916A Division JP5815596B2 (ja) 2007-11-02 2013-04-30 プロシージャリターンシーケンスを加速するための方法およびシステム

Publications (2)

Publication Number Publication Date
JP2015133126A JP2015133126A (ja) 2015-07-23
JP2015133126A5 true JP2015133126A5 (enExample) 2015-11-26

Family

ID=40085506

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2010533174A Expired - Fee Related JP5301554B2 (ja) 2007-11-02 2008-10-31 プロシージャリターンシーケンスを加速するための方法およびシステム
JP2013095916A Expired - Fee Related JP5815596B2 (ja) 2007-11-02 2013-04-30 プロシージャリターンシーケンスを加速するための方法およびシステム
JP2015027891A Pending JP2015133126A (ja) 2007-11-02 2015-02-16 プロシージャリターンシーケンスを加速するための方法およびシステム

Family Applications Before (2)

Application Number Title Priority Date Filing Date
JP2010533174A Expired - Fee Related JP5301554B2 (ja) 2007-11-02 2008-10-31 プロシージャリターンシーケンスを加速するための方法およびシステム
JP2013095916A Expired - Fee Related JP5815596B2 (ja) 2007-11-02 2013-04-30 プロシージャリターンシーケンスを加速するための方法およびシステム

Country Status (6)

Country Link
US (1) US8341383B2 (enExample)
EP (1) EP2220556B1 (enExample)
JP (3) JP5301554B2 (enExample)
KR (1) KR101254067B1 (enExample)
CN (1) CN101884025B (enExample)
WO (1) WO2009059100A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7587580B2 (en) * 2005-02-03 2009-09-08 Qualcomm Corporated Power efficient instruction prefetch mechanism
US8341383B2 (en) * 2007-11-02 2012-12-25 Qualcomm Incorporated Method and a system for accelerating procedure return sequences
US9411590B2 (en) * 2013-03-15 2016-08-09 Qualcomm Incorporated Method to improve speed of executing return branch instructions in a processor
US9703948B2 (en) 2014-03-28 2017-07-11 Intel Corporation Return-target restrictive return from procedure instructions, processors, methods, and systems
GB2542831B (en) * 2015-09-30 2018-05-30 Imagination Tech Ltd Fetch unit for predicting target for subroutine return instructions
GB2551548B (en) * 2016-06-22 2019-05-08 Advanced Risc Mach Ltd Register restoring branch instruction
US11055098B2 (en) * 2018-07-24 2021-07-06 Advanced Micro Devices, Inc. Branch target buffer with early return prediction
WO2021141760A1 (en) * 2020-01-06 2021-07-15 Quadric. Io, Inc Systems and methods for optimizing nested loop instructions in pipeline processing stages
US11586440B2 (en) * 2021-06-01 2023-02-21 International Business Machines Corporation Link stack based instruction prefetch augmentation

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0417916B1 (en) * 1989-09-13 1998-12-16 Digital Equipment Corporation Procedure state descriptor system for digital data processors
JPH06131250A (ja) * 1992-10-20 1994-05-13 Toshiba Corp データ処理装置
JPH07239782A (ja) * 1994-02-28 1995-09-12 Toshiba Corp 演算処理装置
JPH07281892A (ja) * 1994-04-06 1995-10-27 Hitachi Ltd 情報処理装置
JP2735523B2 (ja) * 1995-11-29 1998-04-02 日本電気アイシーマイコンシステム株式会社 プロシージャ・ステップ処理方法
US5812813A (en) * 1996-07-29 1998-09-22 Integrated Device Technology, Inc. Apparatus and method for of register changes during execution of a micro instruction tracking sequence
US6151671A (en) * 1998-02-20 2000-11-21 Intel Corporation System and method of maintaining and utilizing multiple return stack buffers
US6094716A (en) 1998-07-14 2000-07-25 Advanced Micro Devices, Inc. Register renaming in which moves are accomplished by swapping rename tags
US6363473B1 (en) * 1999-04-01 2002-03-26 Compaq Information Technologies Group, L.P. Simulated memory stack in a stackless environment
JP3723019B2 (ja) * 1999-09-29 2005-12-07 富士通株式会社 サブルーチンリターン相当の命令の分岐予測を行う装置および方法
GB2358261B (en) * 2000-01-17 2004-06-09 Advanced Risc Mach Ltd Data processing with native and interpreted program instruction words
US6848044B2 (en) * 2001-03-08 2005-01-25 International Business Machines Corporation Circuits and methods for recovering link stack data upon branch instruction mis-speculation
US6898699B2 (en) 2001-12-21 2005-05-24 Intel Corporation Return address stack including speculative return address buffer with back pointers
US7017030B2 (en) * 2002-02-20 2006-03-21 Arm Limited Prediction of instructions in a data processing apparatus
US7996659B2 (en) * 2005-06-06 2011-08-09 Atmel Corporation Microprocessor instruction that allows system routine calls and returns from all contexts
US7478228B2 (en) * 2006-08-31 2009-01-13 Qualcomm Incorporated Apparatus for generating return address predictions for implicit and explicit subroutine calls
US8341383B2 (en) * 2007-11-02 2012-12-25 Qualcomm Incorporated Method and a system for accelerating procedure return sequences

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