JP2015115514A - Wiring board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technology capable of preventing occurrence of delamination on a wiring board with a multilayer structure.SOLUTION: A wiring board 100 comprises a core substrate 10 and build-up layers 21-24 which are laminated on both faces of the core substrate 10. Each of the build-up layers 21-24 includes resin layers 31, 32, 61 and 62 and wiring layers 41, 42, 71 and 72. In the first and second build-up layers 21 and 22 formed and disposed on a front face of the core substrate 10, at an outer peripheral side of the first and second wiring layers 41 and 42, a metal film 50 is provided which extends over entire outer peripheries of the first and second resin layers 31 and 32. The metal film 50 includes: a first portion 51 in surface-contact with a front face of an outer edge of the core substrate 10, a second portion 52 extending in a thickness direction of the resin layers 31 and 32; and a third portion 53 in surface-contact with surfaces of the resin layers 31 and 32.

Description

  The present invention relates to a wiring board.

  As a wiring board, a build-up board used as an IC package board or an interposer is known (Patent Document 1 below). The build-up substrate has a multilayer structure, and a build-up layer in which insulating layers and wiring layers are alternately stacked is formed on one side or both sides of a core substrate that is a support substrate.

JP 2005-191243 A

  When a build-up board is placed in an environment where the temperature changes significantly, problems such as delamination occur due to the difference in thermal expansion between the core board and the build-up layer. There was a case. Patent Document 1 discloses a technique for suppressing the occurrence of delamination by providing a metal reinforcement on the outer edge of a core substrate. If it is the technique of patent document 1, the stress resulting from the difference of the thermal expansion amount of the core board | substrate and buildup layer in the direction along a board | substrate surface will be relieve | moderated by a metal reinforcement body. However, since the metal reinforcement body of patent document 1 is flat form extended in parallel with the board | substrate surface of a core board | substrate, peeling in the lamination direction of a core board | substrate and a buildup layer may not fully be suppressed. As described above, in a wiring board having a multilayer structure such as a build-up board, there is still room for improvement in suppressing the occurrence of delamination. In addition, the build-up substrate has been desired to be downsized, improved in durability, easy to manufacture, improved in usability, reduced in cost, and saved in resources.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms.

[1] According to one aspect of the present invention, a wiring board is provided. The wiring substrate may include a core substrate, a resin layer laminated on at least one surface of the core substrate, and a wiring layer disposed at least on the surface of the resin layer. Further, the metal film is provided on the outer peripheral side of the wiring layer, and has a portion that is in surface contact with the surface of the outer peripheral edge of the core substrate and a portion that is parallel to the thickness direction of the resin layer. And you may provide the metal film extended in the shape of a line or a strip | belt along the outer periphery of the said resin layer. According to the wiring board of this form, the occurrence of delamination in which the core substrate and the resin layer are separated by the metal film is suppressed.

[2] In the wiring board of the above aspect, the metal film may be formed over the entire circumference of the resin layer. According to this form of wiring board, the occurrence of delamination is more reliably suppressed.

[3] In the wiring board of the above aspect, each of the resin layer, the wiring layer, and the metal film may be disposed on both sides of the core substrate. According to this form of the wiring board, it is possible to suppress the occurrence of warping due to the difference in thermal expansion between both surfaces of the core board, and the generation of delamination is more reliably suppressed.

[4] In the wiring substrate of the above aspect, the core substrate may be formed of at least one of a glass material, a ceramic material, and a glass ceramic material. According to the wiring board of this form, the adhesion between the core substrate and the metal film is ensured, so that the occurrence of delamination is further suppressed. Further, the rigidity of the wiring board and the insulation between the wiring layers are improved.

[5] In the wiring board of the above aspect, the metal film may be formed of the same metal material as the wiring layer. According to the wiring board of this form, the metal film is formed of the same material as the wiring layer, so that an increase in manufacturing cost is suppressed. In addition, the metal film can be formed in the same process as the wiring layer, and an increase in manufacturing cost can be suppressed.

[6] In the wiring board of the above aspect, the wiring layer includes a power supply wiring for supplying power to an element connected to the wiring board, and a signal wiring for transmitting a signal to the element, The metal film may be electrically independent from at least the power supply wiring and the signal wiring. According to the wiring board of this form, occurrence of short circuit, electric leakage, noise in electric signals, and the like are suppressed.

[7] In the wiring board of the above aspect, the metal film may have a portion extending from a portion extending in a thickness direction of the resin layer to a surface of the resin layer. According to the wiring layer of this form, the core substrate and the resin layer can be more closely adhered to each other, and the occurrence of delamination is more reliably suppressed.

[8] According to another aspect of the present invention, a method for manufacturing a wiring board is provided. The manufacturing method includes: a step of laminating a resin layer on at least one surface of a core substrate; a groove portion forming step of forming a groove portion in which the surface of the core substrate is exposed from the resin layer in the resin layer; A wiring material is disposed in a wiring forming region to form a wiring layer, and the wiring material is disposed at least on a side wall surface and a bottom surface of the groove portion, and a metal film that integrally covers the side wall surface and the bottom surface of the groove portion is formed. A wiring forming step to be formed; and a cutting step of cutting the core substrate along the groove. According to the method for manufacturing a wiring board of this aspect, the metal film can be formed together with the wiring layer. Therefore, it is possible to efficiently manufacture a wiring board in which the occurrence of delamination is suppressed by the metal film.

[9] In the manufacturing method of the above aspect, the wiring forming step may be a step of arranging the wiring material on the wiring forming region and the side wall surface and the bottom surface of the groove portion by plating. According to the manufacturing method of this embodiment, the wiring layer and the metal film can be efficiently formed by plating.

[10] In the manufacturing method of the above aspect, the core substrate may be made of a glass material, and the groove forming step may be a step of forming the groove using a laser. According to the manufacturing process of this embodiment, the adhesion between the metal film and the core substrate is enhanced.

[11] In the manufacturing method of the above aspect, the cutting step is a step of cutting out a plurality of wiring substrates, and the groove portion forming step is such that the bottom surface of the groove portion is on the outer peripheral contour line of the wiring substrate cut out in the cutting step. A step of forming the groove so as to be positioned may be included. According to the manufacturing process of this embodiment, it is possible to efficiently manufacture a wiring board in which the occurrence of delamination is suppressed by the metal film.

  The present invention can also be realized in various forms other than the wiring board and the manufacturing method thereof. For example, it is realized in the form of a device provided with a wiring board, a wiring board manufacturing apparatus, a wiring board manufacturing apparatus control method, a computer program for realizing the control method, a non-temporary recording medium on which the computer program is recorded, etc. can do.

The schematic sectional drawing which shows the structure of a wiring board. Process drawing which shows the manufacturing process of a wiring board. Schematic which shows the structure of the glass substrate prepared at the process 1. FIG. Schematic which shows the glass substrate in which the 1st and 2nd resin layer was formed in process 2. FIG. Schematic which shows the resin laminated substrate after several through-holes were formed in the process 3. FIG. Schematic which shows the resin laminate board | substrate after performing groove processing in the process 4. FIG. Schematic for demonstrating the formation process of the wiring material layer in the process 5, and the buildup process in the process 6. FIG. Schematic for demonstrating the cutting-out process of the wiring board in the process 7. FIG. Schematic for demonstrating the cutting-out process of the wiring board in the process 7. FIG. Explanatory drawing which shows the experimental result which verified the defect incidence rate of the wiring board by the difference in a structure of a metal film. The schematic sectional drawing which shows the structure of the wiring board of 2nd Embodiment.

A. First embodiment:
FIG. 1 is a schematic cross-sectional view showing a configuration of a wiring board 100 as a first embodiment of the present invention. In FIG. 1, for the sake of convenience, arrows indicating the vertical direction when the wiring board 100 is used are illustrated. The wiring board 100 is a build-up board used as an IC package board or an interposer. A semiconductor element or the like is connected to the upper surface side, and a motherboard is connected to the lower surface side.

  The wiring substrate 100 includes a core substrate 10 and four buildup layers 21 to 24. In the wiring substrate 100, the first buildup layer 21 is disposed on the upper surface of the core substrate 10, and the second buildup layer 22 is disposed on the lower surface. A third buildup layer 23 is laminated on the first buildup layer 21, and a fourth buildup layer 24 is laminated on the second buildup layer 22. In FIG. 1, for convenience, the boundary between the first and third buildup layers 21 and 23 and the boundary between the second and fourth buildup layers 22 and 24 are illustrated by broken lines.

  The core substrate 10 is a substantially square plate-like member and constitutes a support substrate for the wiring substrate 100. In the wiring substrate 100 of the present embodiment, the core substrate 10 is made of a glass material. More specifically, the core substrate 10 is made of borosilicate glass, aluminoborosilicate glass, aluminosilicate glass, soda lime glass, quartz glass, glass ceramics, or the like. In addition, as a glass material which comprises the core board | substrate 10, not only said material but another various glass material may be used.

  The first and second buildup layers 21 and 22 include first and second resin layers 31 and 32, first and second wiring layers 41 and 42, and a metal film 50, respectively. The first resin layer 31 covers the upper surface of the core substrate 10, and the second resin layer 32 covers the lower surface of the core substrate 10. The first and second resin layers 31 and 32 are made of, for example, cycloolefin resin, epoxy resin, polyimide resin, phenol resin, urethane resin, silicone resin, polycarbonate resin, acrylic resin, polyacetal resin, polypropylene resin, or the like. The

  The first wiring layer 41 is formed on the surface of the first resin layer 31, and the second wiring layer 42 is formed on the surface of the second resin layer 32. Each of the first and second wiring layers 41 and 42 has a predetermined wiring pattern (patterned electrode). The first and second wiring layers 41 and 42 are formed by attaching a metal material such as copper to the surfaces of the resin layers 31 and 32 by plating (details will be described later).

  The metal film 50 surrounds the outer periphery of the first and second wiring layers 41, 42 at the outer peripheral end portions of the first and second resin layers 31, 32. 32 are formed over the entire circumference. The metal film 50 is made of the same metal material (wiring material) as the first and second wiring layers 41 and 42. The metal film 50 is formed by a plating process together with the first and second wiring layers 41 and 42 (details will be described later). However, the metal film 50 is not electrically connected to the first and second wiring layers 41 and 42 and is electrically independent from the first and second wiring layers 41 and 42. That is, it can be said that the metal film 50 is a dummy electrode that does not function as a power supply wiring or a signal wiring.

  The metal film 50 has a so-called crank shape in a cross section parallel to the stacking direction of the wiring substrate 100, and can be divided into three portions 51 to 53. The first portion 51 is a portion extending along the surface at the outer peripheral end of the core substrate 10 and is in surface contact with the surface. In the wiring substrate 100 of the present embodiment, the first portion 51 extends to the outer peripheral edge of the core substrate 10 and its end surface is exposed to the outside. The second part 52 is a part extending in the thickness direction of each resin layer 31, 32 from the first part 51 toward the surface layer of each resin layer 31, 32. The third portion 53 is a portion that is bent from the second portion 52 and extends along the surface of the first or second resin layer 31, 32 and has the same height as the first or second wiring layer 41, 42. Is in position. The metal film 50 has a function of suppressing the occurrence of delamination in the wiring substrate 100, and details thereof will be described later.

  The third and fourth buildup layers 23 and 24 are respectively the third and fourth resin layers 61 and 62, the third and fourth wiring layers 71 and 72, and the first and second solder resist layers. 81 and 82 and solder bumps 85. The third resin layer 61 covers the surfaces of the first wiring layer 41 and the first resin layer 31, and the fourth resin layer 62 covers the surfaces of the second wiring layer 42 and the second resin layer 32. doing. The third and fourth resin layers 61 and 62 may be formed of the same resin material as the first and second resin layers 31 and 32, or may be formed of different resin materials.

  The third wiring layer 71 is disposed on the surface of the third resin layer 61, and the fourth wiring layer 72 is disposed on the surface of the fourth resin layer 62. The third and fourth wiring layers 71 and 72 have a predetermined wiring pattern. Each of the third and fourth wiring layers 71 and 72 has an electrode pad 73 for arranging the solder bump 85. Similar to the first and second wiring layers 41 and 42, the third and fourth wiring layers 71 and 72 are formed by a plating process in which a metal material such as copper is attached to the surface of each resin layer 61 and 62. ing.

  The first solder resist layer 81 is disposed so as to cover the third wiring layer 71 and the third resin layer 61, and the second solder resist layer 82 is composed of the fourth wiring layer 72 and the fourth resin layer. 62 is arranged so as to cover. The first and second solder resist layers 81 and 82 are provided with through holes 83 at positions corresponding to the positions of the electrode pads 73 of the third or fourth wiring layers 71 and 72 disposed below. Yes. The solder bumps 85 are disposed on the electrode pads 73 of the wiring layers 71 and 72 exposed from the through holes 83 of the solder resist layers 81 and 82.

  In the wiring board 100, the wiring layers 41, 42, 71, 72 are electrically connected by via electrodes 91, 92 formed on the core substrate 10 and the resin layers 31, 32, 61, 62. The first and second wiring layers 41 and 42 are via electrodes 91 formed on the inner wall surface of a through hole (via) that penetrates the core substrate 10 and the first and second resin layers 31 and 32 in the stacking direction. Are connected to each other. The resin material used in forming the third and fourth resin layers 61 and 62 flows into the center of the via electrode 91. The third and fourth wiring layers 71 and 72 are respectively formed in the first and second wiring layers 41 by via electrodes 92 formed in vias penetrating the third and fourth resin layers 61 and 62 in the thickness direction. , 42.

  Here, in the wiring substrate 100 of the present embodiment, the thermal expansion amount between the core substrate 10 and the resin layers 31 and 32 by the metal film 50 provided on the first and second buildup layers 21 and 22. Occurrence of delamination due to the difference is suppressed as follows. In the wiring substrate 100 of the present embodiment, the adhesion between the first portion 51 of the metal film 50 and the core substrate 10 and the resin layers 31 and 32 is caused between the core substrate 10 and the resin layers 31 and 32. It is possible to suppress the occurrence of displacement in the direction along the substrate surface. Further, the resin layers 31 and 32 are prevented from separating from the core substrate 10.

  In the wiring substrate 100 of the present embodiment, the direction along the substrate surface between the core substrate 10 and the resin layers 31 and 32 is also affected by the adhesion and locking of the second portion 52 of the metal film 50. Occurrence of deviation and separation of the resin layers 31 and 32 from the core substrate 10 are suppressed. In addition, in the wiring substrate 100 of this embodiment, the resin layers 31 and 32 are prevented from being separated from the core substrate 10 due to the locking of the third portion 53 of the metal film 50.

  Thus, in the wiring board 100 of this embodiment, even if there is a difference in the amount of thermal expansion between the core substrate 10 and each of the resin layers 31 and 32, the portions 51 to 53 of the metal film 50 are used. The core substrate 10 and the resin layers 31 and 32 are prevented from separating. Therefore, the occurrence of delamination due to the difference in thermal expansion between the core substrate 10 and the resin layers 31 and 32 is suppressed.

  In particular, in the wiring substrate 100 of the present embodiment, the core substrate 10 is made of a glass material. Therefore, a high adhesion between the core substrate 10 and the first portion 51 of the metal film 50 is ensured, and a high delamination suppressing effect is obtained. In the wiring substrate 100 of the present embodiment, the metal film 50 is formed on both surfaces of the core substrate 10, and the core substrate 10 and the first or second resin layers 31 and 32 are disposed on both surfaces of the core substrate 10. Thus, the occurrence of a difference in the amount of thermal expansion in the direction along the substrate surface is suppressed. Therefore, the warpage of the core substrate 10 due to the difference in thermal expansion between each surface of the core substrate 10 is suppressed, and delamination occurs due to the warpage of the core substrate 10. It is suppressed.

  In addition, in the wiring substrate 100 of the present embodiment, since the metal film 50 is formed over the entire periphery of the outer peripheral end of the core substrate 10, the strength of the outer peripheral end is increased. In addition, since the metal film 50 is electrically independent from the first and second wiring layers 31 and 32, a short circuit, leakage, and noise in the electric signal through the metal layer 50 may occur. Is suppressed.

  FIG. 2 is a process diagram showing an example of a manufacturing process of the wiring board 100 of the present embodiment. In this manufacturing process, a multi-piece wiring board is manufactured in Steps 1 to 6, and a plurality of wiring boards 100 are cut out from the multi-piece wiring board in Step 7. Below, the content of each process 1-7 shown by FIG. 2 is demonstrated using FIGS. 3-9 as a reference figure. 3 to 9 show an example in which four wiring boards 100 are arranged in two rows in the vertical and horizontal directions in a multi-piece substrate. 3 to 9, the outer peripheral contour line of the wiring board 100 to be cut out is shown by broken lines for convenience.

  FIG. 3 is a schematic view showing the configuration of the glass substrate 10a prepared in step 1. The schematic front view of the glass substrate 10a is shown in the upper part of FIG. 3, and the schematic cross section of the cut surface parallel to the thickness direction of the glass substrate 10a is shown corresponding to the schematic front view of the upper part in the lower part. The glass substrate 10a is a base material that constitutes the core substrate 10 of the wiring substrate 100, and has a sufficient area such that the number of wiring substrates 100 cut out in Step 7 can be arranged. First and second buildup layers 21 and 22 are formed on both surfaces of the glass substrate 10a in steps 2 to 5.

  FIG. 4 is a schematic view showing the glass substrate 10a on which the first and second resin layers 31 and 32 are formed in the step 2. FIG. 4 is substantially the same as FIG. 3 except that the first and second resin layers 31 and 32 are added. In step 2, the first and second resin layers 31 and 32 are formed by a resin laminating process after a silane coupling process for applying and drying a silane coupling agent on both surfaces of the glass substrate 10a. . Hereinafter, the glass substrate 10a on which the first and second resin layers 31 and 32 are formed is referred to as a “resin laminate substrate 10b”.

  FIG. 5 is a schematic view showing the resin laminate substrate 10b after the plurality of through holes 91h are formed in the step 3. FIG. 5 is substantially the same as FIG. 4 except that the illustration of the plurality of through holes 91h is added. In step 3, a plurality of via electrodes 91 for forming the via electrodes 91 in the formation regions of the wiring layers 41 and 42 of the respective wiring substrates 100 (FIG. 1) are formed by laser after the thermosetting treatment is performed on the resin laminate substrate 10b. A through hole 91h is formed. Each through hole 91h is formed by performing shot processing a plurality of times from both surfaces of the resin laminate substrate 10b. As the laser, a carbon dioxide laser, a UV-YAG laser, an excimer laser, or the like is used. Each through hole 91h may not be formed by laser processing, and may be formed by a tool such as a drill, for example.

  FIG. 6 is a schematic view showing the resin laminate substrate 10b after the grooving is performed in the step 4. FIG. 6 is substantially the same as FIG. 5 except that the illustration of the groove 55 is added. In step 4, a groove 55 for forming the metal film 50 (FIG. 1) is formed. As described above, in the wiring substrate 100 of the present embodiment, the metal film 50 is formed over the entire circumference of the wiring substrate 100, so the groove 55 is formed along the outer peripheral contour line of each wiring substrate 100 to be cut out. That is, the groove 55 is formed so that the bottom surface thereof is positioned on a cutting line (described later) in the cutting process of step 7.

  The groove 55 may be formed with a depth at which the glass substrate 10a is exposed from the resin layers 31 and 32. The groove 55 may be formed by laser processing, for example, or may be formed by photolithography. However, if the groove 55 is formed by laser processing, the surface properties of the bottom surface of the groove 55 can be roughened, so the bottom surface of the groove 55 and the wiring material layer 45 (FIG. 7) formed in the subsequent step 5 Adhesion can be increased. Accordingly, the adhesion between the core substrate 10 and the metal film 50 in the wiring substrate 100 is improved. As the laser used for forming the groove 55, the same type of laser as that used in step 3 may be used.

  FIG. 7 is a schematic diagram for explaining the wiring material layer forming step in step 5 and the build-up step in step 6. 7 shows a schematic cross section of the resin laminate substrate 10b after the seed layer 45s is formed in step 6. In the middle part of FIG. 7, a schematic cross section of the resin laminate substrate 10 b after the electrolytic plating process is performed and the wiring material layer 45 is formed in Step 6 is illustrated. In the lower part of FIG. 7, a schematic cross section of the multi-chip substrate 10 c formed through the build-up process of process 6 is illustrated.

  In step 5, a wiring material layer 45, which is a wiring material layer constituting the first and second wiring layers 41 and 42, is formed on the surfaces of the first and second resin layers 31 and 32. In the wiring material layer 45, wiring patterns of the first and second wiring layers 41 and 42 (FIG. 1) are formed by a semi-additive method. Specifically, the wiring material layer 45 is formed as follows.

  First, a seed layer 45s for an electrolytic plating process to be performed later is formed on the surface of the resin laminate substrate 10b (upper stage in FIG. 7). The seed layer 45s may be formed by an electroless plating process or may be formed by a sputtering method. The seed layer 45s is formed so as to cover the entire surface layer of the resin laminate substrate 10b including the inner wall surface of the through hole 91h and the bottom surface and side wall surface of the groove 55.

  After the seed layer 45s is formed, a dry film resist is applied to the surfaces of the first and second resin layers 31 and 32 (not shown), and a known exposure / development process is performed. As a result, a plating resist for forming the wiring patterns of the first and second wiring layers 41 and 42 is formed on the surfaces of the first and second resin layers 31 and 32.

  Next, a wiring material layer 45 is formed by electrolytic plating treatment in a portion other than the portion where the dry film resist of the resin laminate substrate 10b is attached (middle stage in FIG. 7). After the wiring material layer 45 is formed, the dry film resist is peeled off and the electroless plating layer covered with the dry film resist is removed by etching. As a result, the wiring patterns of the first and second wiring layers 41 and 42 are formed on the surface layers of the first and second resin layers 31 and 32, respectively.

  Here, a portion of the wiring material layer 45 covering the inner wall surface of the through hole 91h is a conductive portion in the via electrode 91 of the wiring substrate 100 (FIG. 1). Further, a portion of the wiring material layer 45 covering the inner wall surface of the groove 55 and the peripheral region adjacent to the groove 55 is the metal film 50 of the wiring substrate 100. The wiring pattern formed in this step is separated so that the portion constituting the metal film 50 and the portion constituting the first and second wiring layers 41 and 42 are not electrically connected. Is formed.

  In step 6, a build-up step for forming third and fourth build-up layers 23 and 24 on the first and second build-up layers 21 and 22 is further performed (lower stage in FIG. 7). In step 6, first, the surface layer of the wiring material layer 45 is roughened, and then the third and fourth resin layers 61 and 62 are formed by the same resin laminating process as in step 2. At this stage, a part of the resin material constituting the third and fourth resin layers 61 and 62 enters into the through hole 91 h constituting the via electrode 91 and the groove 55. As a result, the surface of the portion that becomes the metal film 50 is covered with a part of the resin material constituting the third and fourth resin layers 61 and 62.

  Next, after the third and fourth resin layers 61 and 62 are thermally cured, the third and fourth resin layers 61 and 62 are penetrated as vias for forming the via electrode 92 by laser processing. A plurality of through holes are formed. Then, a wiring material layer 75 for forming the third and fourth wiring layers 71 and 72 is formed by the same plating treatment as described in Step 5. In the wiring material layer 75, the wiring patterns of the third and fourth wiring layers 71 and 72 are formed by the same semi-additive method as in step 5 described above. In addition, the via electrode 92 is formed when the wiring material enters the via in the plating process of step 6.

  After the plating process, the first and second solder resist layers 81 and 82 are disposed on the third or fourth wiring layers 71 and 72, and penetrate the first and second solder resist layers 81 and 82. Solder bumps 85 are formed in the holes 83. As a result, a multi-chip substrate 10c in which a plurality of wiring boards 100 are connected is completed.

  FIG. 8 and FIG. 9 are schematic diagrams for explaining the step of cutting out the wiring board 100 in step 7. FIG. FIGS. 8 and 9 respectively show a multi-cavity substrate 10c and a plurality of wiring boards 100 cut out from the multi-cavity substrate 10c by a schematic front view and a schematic cross-sectional view. Further, in FIGS. 8 and 9, the cutting line CL at the time of cutting is shown by a one-dot chain line. In step 7, by cutting along the cutting line CL on the bottom surface of the groove 55, a plurality of wiring boards 100 are cut out from the multi-piece substrate 10c. This cutting process is performed by, for example, a dicing apparatus (dicer).

  In step 7, the wiring material layer 75 enhances the adhesion of each layer and cuts the reinforced portion, so that the occurrence of damage to the wiring board 100 due to the cutting is suppressed. As can be understood from the above description, the first portion 51 of the metal film 50 in each wiring substrate 100 is a portion of the wiring material layer 75 that covers the bottom surface of the groove 55. The second portion 52 of the metal film 50 is a portion of the wiring material layer 75 that covers the side wall surface of the groove 55, and the third portion 53 of the wiring material layer 75 is the groove 55. It is the site | part which covered the peripheral area | region adjacent to.

  As described above, according to the manufacturing process of this embodiment, the metal film 50 is simultaneously formed in the plating process for forming the first and second wiring layers 41 and 42. Further, in the step of cutting out the wiring substrate 100, the metal film 50 suppresses the occurrence of damage to the wiring substrate 100 at the time of cutting. Therefore, the wiring board 100 having the metal film 50 for suppressing delamination can be efficiently manufactured.

[Example]
FIG. 10 is an explanatory diagram showing an experimental result of verifying the defect occurrence rate of the wiring board 100 due to the difference in the configuration of the metal film 50. FIG. 10 is a table summarizing a schematic diagram showing the configuration of the metal film 50 and the defect rate for samples A to E of the wiring board 100 having different configurations of the metal film 50. Samples A to E all have substantially the same configuration except that the configuration of the metal film 50 is different, and were manufactured under the following manufacturing conditions in accordance with the manufacturing process of FIG. 2 described above.

1. Manufacturing conditions:
(1) Step 1: Preparation of glass substrate / Glass substrate used: Borosilicate glass; OA-10G manufactured by Nippon Electric Glass Co., Ltd. (length and width: 150 mm, thickness: 0.1 mm)
(2) Step 2: Formation of resin layer / Silane coupling agent used: KBM-903 manufactured by Shin-Etsu Chemical Co., Ltd.
-Used laminate resin:
Other than sample B: ZS-100 (thickness 20 μm) manufactured by Nippon Zeon Co., Ltd.
Sample B: Hot press conditions in photosensitive resin / laminate processing: Maximum 0.7 MPa, 110 ° C.
(3) Step 3: Via formation and thermosetting treatment conditions: 180 ° C., 30 minutes ・ Laser used: carbon dioxide laser ・ Via opening diameter: 100 μm
(4) Step 4: Groove formation / groove size: width of about 300 μm, depth of about 20 μm
・ Groove formation method:
Samples A and C: Carbon dioxide laser Sample B: Photolithography For samples D and E, step 4 is omitted.
(5) Step 5: Formation of wiring layer and seed layer:
Samples A and C: Electroless copper plating treatment Sample B: Copper film formation treatment / wiring material layer formation method: electrolytic copper plating treatment (6) Step 6: Build-up step Same as Step 2 and Step 5 above Form resin layer and wiring layer under conditions (7) Step 7: Cutting out / cutting out wiring board: Cutting out with dicer

2. Metal film for each sample:
(1) Sample A:
The metal film 50a of the sample A has a first part 51, a second part 52, and a third part 53, as described with reference to FIG. In the manufacturing process of the sample A, the groove 55 for forming the metal film 50a was formed by laser processing, so that the surface of the core substrate 10 was slightly scraped at the bottom surface of the groove 55. Therefore, the metal film 50 a of Sample A was formed so that the first portion 51 was slightly recessed from the surface of the core substrate 10.
(2) Sample B:
Similar to the sample A, the metal film 50 b of the sample B has a first part 51, a second part 52, and a third part 53. However, since the groove 55 for forming the metal film 50b was formed by photolithography in the manufacturing process of the sample B, the surface of the core substrate 10 at the bottom surface of the groove 55 remained almost flat. Therefore, in the metal film 50 b of the sample B, the first portion 51 is formed almost flat on the surface of the core substrate 10.
(3) Sample C:
The metal film 50c of the sample C is substantially the same as the metal film 50a of the sample A except that it is formed only on one surface side of the core substrate 10. In the manufacturing process of sample C, cutting with a dicer was performed from the surface side where the metal film 50c was not formed at the time of cutting in step 7.
(4) Sample D:
Before the first and second resin layers 31 and 32 are formed, the metal film 50d of the sample D is formed on the cutting line on the surface of the glass substrate 10a where the wiring substrate 100 is cut out by plating. Therefore, the metal film 50d of the sample D does not have a portion corresponding to the second and third portions 52 and 53, and is formed almost flat on the surface of the core substrate 10.
(5) Sample E:
The metal film 50e of the sample E is plated on the surfaces of the first and second resin layers 31 and 32 without forming the groove 55 after the first and second resin layers 31 and 32 are formed. Formed by. The metal film 50e of the sample E did not have a portion corresponding to the second and third portions 52 and 53, and was formed almost flat on the surface layers of the first and second resin layers 31 and 32. Further, the metal film 50e of the sample E was formed on the inner peripheral side from the cutting line from which the wiring substrate 100 was cut out.

3. Test method:
A thermal shock test (environmental test standard MIL-STD-883D) was performed on a plurality of specimens of Samples A to D, and the probability of occurrence of delamination (failure rate) was determined. In this thermal shock test, a cycle in which the environmental temperature at which each specimen is arranged is periodically increased or decreased between a low temperature (−65 ° C.) and a high temperature (+ 150 ° C.) was repeated 1000 times. For sample E, delamination had occurred in most specimens during the cutting process, so no thermal shock test was performed.

4). Test results:
(1) About Samples A, B, and D The defect rate of sample A was 0%, and the failure rate of sample B was 10%. On the other hand, the defect rate of sample D was 35%. From this result, it can be seen that the metal film 50 can suppress the occurrence of delamination when the three portions 51 to 53 have only a portion corresponding to the first portion 51. Moreover, it can be seen from the results of Samples A and B that the generation of delamination can be suppressed when the groove processing is performed by laser, compared to the case where the groove processing is performed by photolithography. This is presumably because, when laser processing is performed, the surface of the core substrate 10 that is the base of the metal film 50 becomes rough, and the adhesion of the metal film 50 to the core substrate 10 is enhanced.
(2) Sample C In sample C, delamination occurred at a probability of approximately 65% in the cutting process. When a thermal shock test was performed on a sample in which delamination did not occur in the cutting process, generation of delamination was not observed in most specimens. From this result, it can be seen that even if the metal film 50 is formed only on one side of the core substrate 10, the occurrence of delamination due to the environmental temperature is suppressed.
(3) About sample E As described above, with respect to sample E, delamination occurred in most of the test specimens when the process 7 was cut out.

  As described above, in the wiring substrate 100 (FIG. 1) of the present embodiment, the metal film 50 provided on the outer peripheral end of the core substrate 10 can suppress the occurrence of delamination at the outer peripheral end. . Moreover, if it is a manufacturing process (FIG. 2) of the wiring board 100 of this embodiment, formation of the metal film 50 is easy and the wiring board 100 can be manufactured efficiently.

B. Second embodiment:
FIG. 11 is a schematic cross-sectional view showing the configuration of a wiring board 100A as the second embodiment of the present invention. The wiring board 100A of the second embodiment has substantially the same configuration as the wiring board 100 (FIG. 1) of the first embodiment except that the configuration of the metal film 50A is different.

  The metal film 50 </ b> A of the second embodiment includes a first part 51 that is in surface contact with the surface of the outer peripheral end of the core substrate 10, and a second part that extends from the first part 51 in the thickness direction of the resin layers 31 and 32. And a portion 52. However, the metal film 50 </ b> A of the second embodiment corresponds to the third portion 53 disposed on the surface layer of the first or second resin layer 31, 32 that the metal film 50 of the first embodiment has. Has no site.

  The wiring board 100A of the second embodiment can be manufactured by the manufacturing process (FIG. 2) described in the first embodiment. However, since the metal film 50A of the second embodiment does not have the third portion 53 as described above, in the manufacturing process of the wiring substrate 100A of the second embodiment, the periphery adjacent to the groove portion 55 in the process 5 The wiring material layer 45 is not formed in the region.

  Also in the metal film 50A of the second embodiment, since the metal film 50 has the first and second portions 51 and 52, the core substrate 10 and the first and second resin layers 31 and 32 are heated. Deviations from each other due to the difference in expansion amount are suppressed. Therefore, the occurrence of delamination due to the difference in thermal expansion between the core substrate 10 and the resin layers 31 and 32 is suppressed.

C. Variation:
C1. Modification 1:
The metal films 50 and 50A of the above embodiments are formed over the entire outer periphery of the wiring board 100 and 100A. On the other hand, the metal films 50 and 50A may be formed only on a part of the outer periphery of the wiring boards 100 and 100A. The metal films 50 and 50A may be formed in a distributed manner at a plurality of locations on the outer periphery of the wiring boards 100 and 100A. The metal films 50 and 50A may be formed, for example, only on two sides facing each other of the wiring board, or may be formed only on the central part of each side. The metal films 50, 50 </ b> A may be formed so as to extend in a strip shape or a line shape in the circumferential direction at the outer peripheral end portion of the wiring substrate 100, 100 </ b> A. Here, “linear or belt-like” means a shape in which at least the length in the stretching direction is larger than the width in the direction perpendicular to the stretching direction. The width of the metal films 50 and 50A may not be the same as the thickness of the first or second resin layers 31 and 32. The widths of the metal films 50 and 50A may not be constant in the extending direction, and may change in the extending direction. In this case, “linear or belt-like” means a shape in which the length in the stretching direction is larger than the average value of the width in the entire stretching direction.

C2. Modification 2:
The metal films 50 and 50 </ b> A of the above embodiments are provided on both surfaces of the core substrate 10. On the other hand, the metal films 50 and 50A may be provided only on one surface of the upper surface or the lower surface of the core substrate 10 as in the sample C (FIG. 10) described in the example of the first embodiment.

C3. Modification 3:
The core substrate 10 of each of the above embodiments is made of a glass material. On the other hand, the core substrate 10 may be made of a material other than the glass material. The core substrate 10 may be formed of at least one of a glass material, a ceramic material, and a glass ceramic material. Since these materials have high adhesion to metal, it is possible to ensure high adhesion between the core substrate 10 and the metal films 50 and 50A. Further, the core substrate 10 may not be a single-layer plate member. The core substrate 10 may be a ceramic substrate having a multilayer structure such as a low-temperature fired ceramic multilayer substrate.

C4. Modification 4:
The metal films 50 and 50A of each of the above embodiments are formed by plating treatment together with the first and second wiring layers 41 and. On the other hand, the metal films 50 and 50A may be formed in a process different from the process of forming the first and second wiring layers 41 and. In this case, the metal films 50 and 50A may be formed of a metal material different from the wiring material constituting the first and second wiring layers 41 and 42, or may not be formed by plating. . The metal films 50, 50 </ b> A may be formed by disposing metal drawn film members prepared in advance on the outer peripheral ends of the first and second resin layers 31, 32.

C5. Modification 5:
The metal films 50 and 50A in each of the above embodiments are formed as dummy electrodes that are electrically independent from the power supply wiring and the signal wiring. On the other hand, the metal films 50 and 50A may be configured to be electrically connected to the first and second wiring layers 41 and 42 and function as power supply wiring and signal wiring. Further, the metal films 50 and 50A may be configured to function as a ground wiring.

C6. Modification 6:
The wiring boards 100 and 100A according to the above embodiments include four build-up layers 21 to 24. In contrast, in the wiring boards 100 and 100A, the third and fourth buildup layers 23 and 24 are omitted, and the solder resist layers 81 and 82 and the surface layers of the first and second buildup layers 21 and 22 are omitted. Solder bumps 85 may be formed. In the wiring boards 100 and 100A, the build-up layer on one side of the core board 10 may be omitted. In the wiring boards 100 and 100 </ b> A, three or more buildup layers may be stacked on the core substrate 10.

C7. Modification 7:
The wiring layers 41, 42, 71, 72 of the wiring boards 100, 100A of the above embodiments are formed by plating. On the other hand, each wiring layer 41, 42, 71, 72 may be formed by a method other than plating. Each wiring layer 41, 42, 71, 72 may be formed by printing a conductive paste such as screen printing. Further, the wiring boards 100 and 100A of each of the above embodiments are cut out from the multi-chip board 10c by a cutting line on the bottom surface of the groove 55. On the other hand, the wiring boards 100 and 100A of each embodiment may be cut out from the multi-piece substrate 10c by a cutting line on the outer periphery of the groove 55. The wiring boards 100 and 100A of each of the above embodiments are cut out from the multi-piece substrate 10c. On the other hand, the wiring boards 100 and 100A may be separately manufactured.

  The present invention is not limited to the above-described embodiments, examples, and modifications, and can be realized with various configurations without departing from the spirit thereof. For example, the technical features in the embodiments, examples, and modifications corresponding to the technical features in each embodiment described in the summary section of the invention are to solve some or all of the above-described problems, or In order to achieve part or all of the above effects, replacement or combination can be performed as appropriate. Further, if the technical feature is not described as essential in the present specification, it can be deleted as appropriate.

DESCRIPTION OF SYMBOLS 10 ... Core board | substrate 10a ... Glass board | substrate 10b ... Resin laminate board | substrate 10c ... Multi-cavity board | substrates 21-24 ... 1st-4th buildup layer 31, 32 ... 1st and 2nd resin layer 41, 42 ... 1st And second wiring layer 45 ... wiring material layer 45s ... seed layers 50, 50a-50c, 50A ... metal films 51-53 ... first to third portions 55 ... grooves 61, 62 ... third and fourth resins Layers 71, 72 ... third and fourth wiring layers 73 ... electrode pads 81, 82 ... solder resist layer 83 ... through holes 85 ... solder bumps 91, 92 ... via electrodes 91h ... through holes

Claims (11)

A core substrate;
A resin layer laminated on at least one surface of the core substrate;
A wiring layer disposed at least on the surface of the resin layer;
In a wiring board comprising:
A metal film provided on the outer peripheral side of the wiring layer, having a portion in surface contact with the surface of the outer peripheral edge of the core substrate, and a portion extending in the thickness direction of the resin layer, A wiring board comprising a metal film extending in a line shape or a band shape along the outer periphery of a resin layer. The wiring board according to claim 1,
The wiring board, wherein the metal film is formed over the entire circumference of the resin layer. The wiring board according to claim 1 or 2,
The wiring board, wherein the resin layer, the wiring layer, and the metal film are respectively disposed on both sides of the core substrate. The wiring board according to any one of claims 1 to 3,
The core substrate is a wiring substrate formed of at least one of a glass material, a ceramic material, and a glass ceramic material. The wiring board according to any one of claims 1 to 4,
The wiring board is formed of the same metal material as the wiring layer. The wiring board according to any one of claims 1 to 5,
The wiring layer includes power wiring for power supply to an element connected to the wiring board, and signal wiring for signal transmission to the element,
The wiring board, wherein the metal film is electrically independent from at least the power supply wiring and the signal wiring. The wiring board according to any one of claims 1 to 6,
The said metal film is a wiring board which has the site | part extended on the surface of the said resin layer from the site | part extended in the thickness direction of the said resin layer. A method for manufacturing a wiring board, comprising:
Laminating a resin layer on at least one surface of the core substrate;
A groove part forming step of forming a groove part in which the surface of the core substrate is exposed from the resin layer in the resin layer;
A wiring material is formed in a wiring formation region of the resin layer to form a wiring layer, and the wiring material is disposed at least on the side wall surface and the bottom surface of the groove portion so as to integrally cover the side wall surface and the bottom surface of the groove portion. A wiring forming process for forming a metal film to be performed;
A cutting step of cutting the core substrate along the groove,
A manufacturing method comprising: A manufacturing method according to claim 8, wherein
The wiring formation step is a manufacturing method in which the wiring material is disposed in the wiring formation region and the side wall surface and the bottom surface of the groove by plating. The manufacturing method according to claim 8 or 9, wherein
The core substrate is made of a glass material,
The groove part forming step is a process for forming the groove part with a laser. It is a manufacturing method as described in any one of Claims 8-10, Comprising:
The cutting step is a step of cutting out a plurality of wiring boards,
The said groove part formation process is a manufacturing method including the process of forming the said groove part so that the bottom face of the said groove part may be located on the outer periphery outline of the said wiring board cut out in the said cutting process.

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