JP6324669B2 - Multilayer wiring board and manufacturing method thereof - Google Patents

Multilayer wiring board and manufacturing method thereof Download PDF

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JP6324669B2
JP6324669B2 JP2013125266A JP2013125266A JP6324669B2 JP 6324669 B2 JP6324669 B2 JP 6324669B2 JP 2013125266 A JP2013125266 A JP 2013125266A JP 2013125266 A JP2013125266 A JP 2013125266A JP 6324669 B2 JP6324669 B2 JP 6324669B2
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substrate
main surface
wiring
wiring board
layer
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宗之 岩田
宗之 岩田
卓 宮本
卓 宮本
善明 長屋
善明 長屋
豊 今西
豊 今西
平野 聡
平野  聡
奈緒子 森
奈緒子 森
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NGK Spark Plug Co Ltd
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Description

本発明は、基板主面及び基板裏面を有するセラミック配線基板と、セラミック配線基板の基板主面上に積層され、樹脂絶縁層、配線層及びビア導体を有する配線構造体とを備えた多層配線基板及びその製造方法に関するものである。   The present invention relates to a multilayer wiring board comprising a ceramic wiring board having a substrate main surface and a substrate back surface, and a wiring structure laminated on the substrate main surface of the ceramic wiring substrate and having a resin insulating layer, a wiring layer, and a via conductor. And a manufacturing method thereof.

コンピュータのマイクロプロセッサ等として使用される半導体集積回路素子(ICチップ)は、近年ますます高速化、高機能化しており、これに付随して端子数が増え、端子間ピッチも狭くなる傾向にある。一般的にICチップの底面には多数の端子が密集してアレイ状に配置されている。このICチップなどの電子部品を検査するために、電子部品検査用の多層配線基板が使用されている。   In recent years, semiconductor integrated circuit elements (IC chips) used as computer microprocessors and the like have become increasingly faster and more functional, with an accompanying increase in the number of terminals and a tendency to narrow the pitch between terminals. . In general, a large number of terminals are densely arranged in an array on the bottom surface of an IC chip. In order to inspect electronic components such as the IC chip, a multilayer wiring board for inspecting electronic components is used.

電子部品検査用の多層配線基板として、複数のセラミック絶縁層を積層してなるセラミック配線基板の上層側に、複数の樹脂絶縁層及び複数の配線層からなる配線構造体を積層した多層配線基板が実用化されている。この多層配線基板において、各樹脂絶縁層及び各セラミック絶縁層には、それら絶縁層を貫通するビア導体が設けられ、ビア導体によって層間の電気的接続が図られている。   As a multilayer wiring board for electronic component inspection, there is a multilayer wiring board in which a wiring structure composed of a plurality of resin insulating layers and a plurality of wiring layers is laminated on the upper side of a ceramic wiring board formed by laminating a plurality of ceramic insulating layers. It has been put into practical use. In this multilayer wiring board, each resin insulation layer and each ceramic insulation layer are provided with via conductors penetrating the insulation layers, and electrical connection between the layers is achieved by the via conductors.

上記多層配線基板を製造する際には、セラミック配線基板上に複数の樹脂絶縁層を配置した状態で加熱加圧することにより、セラミック配線基板に各樹脂絶縁層からなる配線構造体を圧着している。この圧着時において、樹脂絶縁層は、加熱による粘度低下に伴って移動し、配線層の変形や位置ズレが生じ易くなる。この問題を回避する目的で、樹脂絶縁層に非貫通ビア導体(ダミービア導体)を形成した多層配線基板が提案されている(例えば、特許文献1参照)。この多層配線基板では、複数の非貫通ビア導体によって樹脂絶縁層の平面方向の移動が抑制されることで配線層の変形や位置ズレが防止されるため、断線等の問題が回避される。   When the multilayer wiring board is manufactured, a wiring structure composed of each resin insulating layer is pressure-bonded to the ceramic wiring board by heating and pressing with a plurality of resin insulating layers arranged on the ceramic wiring board. . At the time of this pressure bonding, the resin insulating layer moves as the viscosity decreases due to heating, and the wiring layer is likely to be deformed or misaligned. In order to avoid this problem, a multilayer wiring board in which a non-through via conductor (dummy via conductor) is formed in a resin insulating layer has been proposed (for example, see Patent Document 1). In this multilayer wiring board, since the movement of the resin insulating layer in the planar direction is suppressed by the plurality of non-through via conductors, deformation and misalignment of the wiring layer are prevented, so that problems such as disconnection are avoided.

特開2012−93103号公報JP2012-93103A

ところで、特許文献1に開示されている従来の多層配線基板では、各樹脂絶縁層の位置ズレを防止するために複数の非貫通ビア導体を樹脂絶縁層に形成する必要がある。この多層配線基板において、各非貫通ビア導体の配置スペースを確保すると、配線層を高密度で配置することができなくなる。さらに、非貫通ビア導体を設けると、電気ノイズを拾い易くなる場合があり、多層配線基板の電気特性が低下してしまうといった問題が懸念される。   By the way, in the conventional multilayer wiring board disclosed in Patent Document 1, it is necessary to form a plurality of non-penetrating via conductors in the resin insulating layer in order to prevent misalignment of the resin insulating layers. In this multilayer wiring board, if the arrangement space for each non-through via conductor is secured, the wiring layers cannot be arranged at high density. Furthermore, when a non-through via conductor is provided, it may be easy to pick up electrical noise, and there is a concern that the electrical characteristics of the multilayer wiring board will deteriorate.

本発明は上記の課題に鑑みてなされたものであり、その目的は、セラミック配線基板上に配線構造体を位置精度よく積層し、信頼性の高い多層配線基板を提供することにある。また別の目的は、上記多層配線基板を製造するのに好適な多層配線基板の製造方法を提供することにある。   The present invention has been made in view of the above problems, and an object of the present invention is to provide a highly reliable multilayer wiring board by laminating a wiring structure on a ceramic wiring board with high positional accuracy. Another object is to provide a method for manufacturing a multilayer wiring board suitable for manufacturing the multilayer wiring board.

そして上記課題を解決するための手段(手段1)としては、一対の主面を有しかつ前記主面間を貫通するビア孔が形成された樹脂絶縁層、前記樹脂絶縁層の少なくとも一方の前記主面上に配置された配線層、及び前記ビア孔内に設けられ前記配線層と電気的に接続するビア導体を有する配線構造体と、基板主面及び基板裏面を有し、前記基板主面及び前記基板裏面間を導通させる貫通導体部が設けられ、前記基板主面上に前記配線構造体が積層されるセラミック配線基板とを備えた多層配線基板であって、前記樹脂絶縁層は、熱硬化性樹脂からなる第1樹脂層と、前記第1樹脂層に積層されて少なくとも一方の前記主面をなす熱可塑性樹脂からなる第2樹脂層とにより構成され、前記基板主面には、基板中央部を高所としかつ基板外周部を低所とする高低差が設けられていることを特徴とする多層配線基板がある。   And as means (means 1) for solving the above-mentioned problems, a resin insulating layer having a pair of main surfaces and having a via hole penetrating between the main surfaces, at least one of the resin insulating layers A wiring layer disposed on the main surface; a wiring structure having a via conductor provided in the via hole and electrically connected to the wiring layer; a substrate main surface and a substrate back surface; And a through-hole conductor portion that conducts between the back surfaces of the substrate and a ceramic wiring substrate on which the wiring structure is laminated on the main surface of the substrate, wherein the resin insulating layer A first resin layer made of a curable resin and a second resin layer made of a thermoplastic resin that is laminated on the first resin layer and forms at least one of the main surfaces. The center is high and the outer periphery of the board is low There are multi-layer wiring board, wherein a difference in height which is provided with.

従って、手段1に記載の発明によると、基板主面には、基板中央部を高所としかつ基板外周部を低所とする高低差が設けられているので、セラミック配線基板の基板主面上に配線構造体を加熱加圧して積層する際には、樹脂絶縁層にテンション(配線構造体の平面方向に遠心的な張力)が加わった状態となる。このため、加熱による樹脂絶縁層の粘度低下に伴う平面方向の移動を防止することができる。従って、セラミック配線基板上に配線構造体を位置精度よく積層することができ、配線が断線するといった問題を回避することができる。また、本発明の多層配線基板では、従来技術のように非貫通ビア導体(ダミービア導体)を設ける必要がないため、電気特性を良好な状態に維持しつつ、配線の高密度化を図ることができる。   Therefore, according to the invention described in Means 1, since the substrate main surface is provided with a height difference in which the central portion of the substrate is a high place and the peripheral portion of the substrate is a low place, the substrate main surface of the ceramic wiring board is provided. When the wiring structure is laminated by heating and pressing, tension (centrifugal tension in the plane direction of the wiring structure) is applied to the resin insulating layer. For this reason, the movement of the plane direction accompanying the viscosity fall of the resin insulating layer by heating can be prevented. Therefore, the wiring structure can be laminated with high positional accuracy on the ceramic wiring substrate, and the problem that the wiring is disconnected can be avoided. Further, in the multilayer wiring board of the present invention, it is not necessary to provide a non-penetrating via conductor (dummy via conductor) as in the prior art, so that it is possible to increase the density of wiring while maintaining good electrical characteristics. it can.

基板主面における高所と低所との境界には段差部が存在していてもよい。この場合、段差部のエッジによって樹脂絶縁層の平面方向のズレを確実に防止することができる。また、セラミック配線基板と樹脂絶縁層との接触面積が段差部の高低差の分だけ増加するため、セラミック配線基板と配線構造体との接続強度を高めることができる。   There may be a stepped portion at the boundary between the high place and the low place on the main surface of the substrate. In this case, the shift in the planar direction of the resin insulating layer can be reliably prevented by the edge of the stepped portion. In addition, since the contact area between the ceramic wiring board and the resin insulating layer increases by the height difference of the stepped portion, the connection strength between the ceramic wiring board and the wiring structure can be increased.

基板主面における段差部は、配線層及びビア導体が形成されている領域よりも外周部側に配置されていてもよい。このようにすると、多層配線基板の電気特性に影響を与えることなく、段差部を確実に形成することができ、多層配線基板の信頼性を確保することができる。   The stepped portion on the main surface of the substrate may be disposed on the outer peripheral side of the region where the wiring layer and the via conductor are formed. In this way, the step portion can be reliably formed without affecting the electrical characteristics of the multilayer wiring board, and the reliability of the multilayer wiring board can be ensured.

基板主面における高低差は、第2樹脂層の厚さよりも大きくかつ樹脂絶縁層の厚さよりも小さくなるように設定されていてもよい。ここで、高低差が第2樹脂層よりも小さいと、加熱時に軟化する第2樹脂層によって高低差が吸収されてしまうため、高低差による積層ズレの効果が十分に得られなくなる。また、高低差が樹脂絶縁層よりも大きいと、多層配線基板の表面において要求される平坦度を確保できなくなる場合がある。従って、基板主面において、第2樹脂層の厚さよりも大きくかつ樹脂絶縁層の厚さよりも小さくなるように高低差を設定すると、積層時における樹脂絶縁層のズレを確実に防止することができ、信頼性の高い多層配線基板を得ることができる。   The height difference on the substrate main surface may be set to be larger than the thickness of the second resin layer and smaller than the thickness of the resin insulating layer. Here, if the height difference is smaller than that of the second resin layer, the height difference is absorbed by the second resin layer softened during heating, so that the effect of stacking misalignment due to the height difference cannot be sufficiently obtained. Further, if the height difference is larger than that of the resin insulating layer, the flatness required on the surface of the multilayer wiring board may not be ensured. Therefore, if the height difference is set on the main surface of the substrate so as to be larger than the thickness of the second resin layer and smaller than the thickness of the resin insulating layer, it is possible to reliably prevent the resin insulating layer from being displaced during lamination. A highly reliable multilayer wiring board can be obtained.

基板主面における高所は、セラミック配線基板の厚み方向に垂直な平坦面であり、かつその上には貫通導体部に接続する基板側配線層が形成されている。この場合、均一な厚さの基板側配線層を位置精度よく形成することができ、セラミック配線基板と配線構造体との間における断線を確実に防止することができる。   A height on the main surface of the substrate is a flat surface perpendicular to the thickness direction of the ceramic wiring substrate, and a substrate-side wiring layer connected to the through conductor is formed thereon. In this case, a substrate-side wiring layer having a uniform thickness can be formed with high positional accuracy, and disconnection between the ceramic wiring substrate and the wiring structure can be reliably prevented.

多層配線基板は、IC検査装置用基板であってもよい。この場合、IC検査装置用基板における配線層を精度良く形成できるため、多数の端子が密集してアレイ状に配置されているICチップを確実に検査することができる。   The multilayer wiring board may be an IC inspection apparatus substrate. In this case, since the wiring layer in the IC inspection apparatus substrate can be formed with high accuracy, it is possible to reliably inspect IC chips in which a large number of terminals are densely arranged.

樹脂絶縁層(第1樹脂層及び第2樹脂層)としては、通常ポリイミド系の樹脂材料が用いられるが、ポリイミド系の樹脂以外の樹脂を用いて形成されるものでもよく、絶縁性、耐熱性、耐湿性等を考慮して適宜選択することができる。また、樹脂絶縁層の第1樹脂層として、樹脂とガラス繊維(ガラス織布やガラス不織布)やポリアミド繊維等の有機繊維との複合材料、あるいは、連続多孔質PTFE等の三次元網目状フッ素系樹脂基材に熱硬化性樹脂を含浸させた樹脂−樹脂複合材料等を使用してもよい。   As the resin insulation layer (the first resin layer and the second resin layer), a polyimide-based resin material is usually used, but it may be formed using a resin other than the polyimide-based resin, and has an insulating property and heat resistance. Further, it can be appropriately selected in consideration of moisture resistance and the like. In addition, as the first resin layer of the resin insulation layer, a composite material of resin and organic fibers such as glass fibers (glass woven fabric or glass nonwoven fabric) or polyamide fibers, or a three-dimensional network fluorine-based such as continuous porous PTFE A resin-resin composite material in which a resin base material is impregnated with a thermosetting resin may be used.

配線層は、主として銅からなり、サブトラクティブ法、セミアディティブ法、フルアディティブ法などといった公知の手法によって形成される。具体的に言うと、例えば、銅箔のエッチング、無電解銅めっきあるいは電解銅めっきなどの手法が適用される。なお、スパッタやCVD等の手法により薄膜を形成した後にエッチングを行うことで配線層を形成したり、導電性ペースト等の印刷により配線層を形成したりすることも可能である。   The wiring layer is mainly made of copper, and is formed by a known method such as a subtractive method, a semi-additive method, or a full additive method. Specifically, for example, techniques such as etching of copper foil, electroless copper plating, or electrolytic copper plating are applied. It is also possible to form a wiring layer by etching after forming a thin film by a technique such as sputtering or CVD, or to form a wiring layer by printing a conductive paste or the like.

また、上記課題を解決するための別の手段(手段2)としては、手段1に記載の多層配線基板を製造する方法であって、前記配線層及び前記ビア導体が形成された樹脂絶縁層を有する配線構造体を準備する配線構造体準備工程と、前記貫通導体部が設けられたセラミック配線基板を準備するセラミック配線基板準備工程と、前記セラミック配線基板の前記基板主面に前記高低差を設ける高低差付与工程と、前記高低差の存在する前記基板主面上に前記配線構造体を配置した状態で加熱加圧を行うことにより、前記基板主面に前記配線構造体を圧着させる積層工程とを含むことを特徴とする多層配線基板の製造方法がある。   Further, as another means (means 2) for solving the above-mentioned problem, there is provided a method of manufacturing the multilayer wiring board according to means 1, wherein a resin insulating layer on which the wiring layer and the via conductor are formed is provided. A wiring structure preparing step for preparing a wiring structure having a ceramic wiring substrate preparing step for preparing a ceramic wiring substrate provided with the through conductors, and providing the height difference on the main surface of the ceramic wiring substrate. A step of applying a difference in height, and a step of laminating the wiring structure to the main surface of the substrate by applying heat and pressure in a state where the wiring structure is disposed on the main surface of the substrate where the height difference exists. There is a manufacturing method of a multilayer wiring board characterized by including:

従って、手段2に記載の発明によると、高低差付与工程においてセラミック配線基板の基板主面に高低差が設けられた後、積層工程が実施される。この積層工程では、高低差の存在する基板主面上に配線構造体を配置した状態で加熱加圧が行われ、配線構造体が基板主面に圧着される。このとき、配線構造体の樹脂絶縁層にテンションが加わった状態となるため、樹脂絶縁層の粘度低下に伴う平面方向の移動が防止され、セラミック配線基板上に配線構造体を精度よく積層することができる。   Therefore, according to the invention described in the means 2, after the height difference is provided on the main surface of the ceramic wiring substrate in the height difference applying step, the stacking step is performed. In this laminating process, heating and pressurization are performed in a state where the wiring structure is disposed on the substrate main surface where there is a height difference, and the wiring structure is pressure-bonded to the substrate main surface. At this time, since tension is applied to the resin insulation layer of the wiring structure, movement in the plane direction due to a decrease in the viscosity of the resin insulation layer is prevented, and the wiring structure is accurately laminated on the ceramic wiring substrate. Can do.

積層工程では、高低差の存在する基板主面上に配線構造体を複数重ねて配置した状態で加熱加圧を行うことにより、基板主面に配線構造体を一括して圧着させてもよい。このようにすると、複数の配線構造体を1つずつ圧着させる場合と比較して、製造工程を簡素化することができ、多層配線基板を短時間で製造することができる。なお、高低差の存在する基板主面上に複数の配線構造体を1つずつ圧着させるようにしてもよい。この場合、多層配線基板の工期は長くなるが、積層時における樹脂絶縁層のズレを確実に防止することができる。   In the stacking step, the wiring structures may be collectively bonded to the main surface of the substrate by performing heat and pressure in a state where a plurality of wiring structures are arranged on the main surface of the substrate having a height difference. If it does in this way, compared with the case where a plurality of wiring structures are crimped one by one, a manufacturing process can be simplified and a multilayer wiring board can be manufactured in a short time. A plurality of wiring structures may be pressure-bonded one by one on the main surface of the substrate where there is a height difference. In this case, the work period of the multilayer wiring board is lengthened, but it is possible to reliably prevent the resin insulating layer from being displaced during lamination.

高低差付与工程では、焼成工程を経たセラミック配線基板の基板主面において、基板外周部のセラミック材料を除去することにより、高低差を設けてもよい。このようにすると、セラミック配線基板の基板主面において、所定寸法の高低差を正確にかつ容易に形成することができる。具体的には、基板外周部のセラミック材料を除去して段差部を形成する場合、エッジのある段差部を正確に形成することができるため、積層時における樹脂絶縁層の位置ズレを確実に防止することができる。   In the elevation difference providing step, the elevation difference may be provided by removing the ceramic material on the outer periphery of the substrate on the substrate main surface of the ceramic wiring substrate that has undergone the firing step. In this way, a height difference of a predetermined dimension can be accurately and easily formed on the main surface of the ceramic wiring board. Specifically, when the stepped portion is formed by removing the ceramic material on the outer periphery of the substrate, the stepped portion with an edge can be accurately formed, thus reliably preventing the displacement of the resin insulating layer during lamination. can do.

高低差付与工程では、焼成工程を経たセラミック配線基板の基板主面をあらかじめ表面研磨した後、その表面研磨された基板主面において、基板外周部のセラミック材料を除去することにより、高低差を設けてもよい。このようにすると、基板主面における高低差を正確に設けることができる。また、表面研磨された基板主面が平坦面となるので、その基板主面上に貫通導体部に接続する基板側配線層を均一な厚さで位置精度よく形成することができる。さらに、基板主面における低所は高所よりも表面粗さが大きくなるため、低所となる基板外周部によって積層時における樹脂絶縁層のズレを確実に防止することができる。   In the elevation difference providing step, the substrate main surface of the ceramic wiring substrate that has undergone the firing step is surface-polished in advance, and then the ceramic material on the outer peripheral portion of the substrate is removed from the surface-polished substrate main surface to provide a height difference May be. In this way, the height difference on the main surface of the substrate can be accurately provided. In addition, since the substrate main surface subjected to surface polishing becomes a flat surface, the substrate-side wiring layer connected to the through conductor portion can be formed on the substrate main surface with a uniform thickness with high positional accuracy. In addition, since the lower portion of the main surface of the substrate has a larger surface roughness than the higher portion, the lower portion of the outer periphery of the substrate can surely prevent the resin insulating layer from being displaced during lamination.

高低差付与工程では、レーザトリミング、エッチングまたは研磨により基板外周部のセラミック材料を除去する。つまり、本発明では、セラミック材料の種類やセラミック配線基板の形状、サイズ等に応じて、レーザトリミング、エッチング及び研磨の中から最適な手法を選択し、その手法によって基板外周部のセラミック材料を除去する。このように、最適な手法で基板外周部のセラミック材料を除去することにより、基板主面における高低差を確実に設けることが可能となる。   In the elevation difference applying step, the ceramic material on the outer periphery of the substrate is removed by laser trimming, etching, or polishing. In other words, according to the present invention, an optimum method is selected from laser trimming, etching and polishing according to the type of ceramic material and the shape and size of the ceramic wiring substrate, and the ceramic material on the outer periphery of the substrate is removed by this method. To do. In this way, by removing the ceramic material on the outer peripheral portion of the substrate by an optimal method, it is possible to reliably provide a height difference on the main surface of the substrate.

本実施の形態における多層配線基板の概略構成を示す断面図。Sectional drawing which shows schematic structure of the multilayer wiring board in this Embodiment. 多層配線基板の製造方法における配線構造体準備工程を示す説明図。Explanatory drawing which shows the wiring structure preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法における配線構造体準備工程を示す説明図。Explanatory drawing which shows the wiring structure preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法における配線構造体準備工程を示す説明図。Explanatory drawing which shows the wiring structure preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法におけるセラミック配線基板準備工程を示す説明図。Explanatory drawing which shows the ceramic wiring board preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法におけるセラミック配線基板準備工程を示す説明図。Explanatory drawing which shows the ceramic wiring board preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法におけるセラミック配線基板準備工程を示す説明図。Explanatory drawing which shows the ceramic wiring board preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法におけるセラミック配線基板準備工程を示す説明図。Explanatory drawing which shows the ceramic wiring board preparation process in the manufacturing method of a multilayer wiring board. 多層配線基板の製造方法における高低差付与工程を示す説明図。Explanatory drawing which shows the height difference provision process in the manufacturing method of a multilayer wiring board. 基板主面に段差部を設けない別の実施の形態のセラミック配線基板を示す説明図。Explanatory drawing which shows the ceramic wiring board of another embodiment which does not provide a level | step-difference part in a board | substrate main surface.

以下、本発明を多層配線基板に具体化した一実施の形態を図面に基づき詳細に説明する。図1は、本実施の形態の多層配線基板の概略構成を示す断面図である。   Hereinafter, an embodiment in which the present invention is embodied in a multilayer wiring board will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing a schematic configuration of a multilayer wiring board according to the present embodiment.

図1に示される多層配線基板10は、ICチップの電気検査を行うためのIC検査装置用基板である。多層配線基板10は、厚さ方向に積層される複数(本実施の形態では2つ)の配線構造体20,21と、配線構造体21の下層側に設けられるセラミック配線基板40とを備える。多層配線基板10は、縦横の長さが10cm程度、厚さが4mm程度の基板であり、使用時において多層配線基板10の主面11(図1では上面)が検査対象であるICチップに向けて配置される。   A multilayer wiring substrate 10 shown in FIG. 1 is a substrate for an IC inspection apparatus for performing an electrical inspection of an IC chip. The multilayer wiring board 10 includes a plurality (two in this embodiment) of wiring structures 20 and 21 stacked in the thickness direction, and a ceramic wiring board 40 provided on the lower layer side of the wiring structure 21. The multilayer wiring board 10 is a board having a vertical and horizontal length of about 10 cm and a thickness of about 4 mm. When used, the main surface 11 (upper surface in FIG. 1) of the multilayer wiring board 10 is directed toward an IC chip to be inspected. Arranged.

上側の配線構造体20は、樹脂絶縁層22、配線層24及びビア導体26を有し、下側の配線構造体21は、樹脂絶縁層23、配線層25及びビア導体26を有する。各樹脂絶縁層22,23は、一対の主面27,28を有し、それら主面27,28間を貫通するビア孔29が形成されている。配線層24は、樹脂絶縁層22の主面27(本実施の形態では上面)上に配置されている。配線層25は、樹脂絶縁層23の主面27上に配置されている。ビア導体26は、ビア孔29内に設けられ、配線層24,25と電気的に接続されている。   The upper wiring structure 20 includes a resin insulating layer 22, a wiring layer 24 and a via conductor 26, and the lower wiring structure 21 includes a resin insulating layer 23, a wiring layer 25 and a via conductor 26. Each resin insulating layer 22, 23 has a pair of main surfaces 27, 28, and a via hole 29 penetrating between the main surfaces 27, 28 is formed. The wiring layer 24 is disposed on the main surface 27 (the upper surface in the present embodiment) of the resin insulating layer 22. The wiring layer 25 is disposed on the main surface 27 of the resin insulating layer 23. The via conductor 26 is provided in the via hole 29 and is electrically connected to the wiring layers 24 and 25.

樹脂絶縁層22,23は、例えばポリイミド系樹脂からなる絶縁層である。具体的には、樹脂絶縁層22,23は、第1樹脂層31と、第1樹脂層31の両面に積層され、樹脂絶縁層22,23の主面27,28をなす第2樹脂層32とにより構成されている。本実施の形態において、樹脂絶縁層22,23を構成する第1樹脂層31は、ポリイミド系の熱硬化性樹脂からなり、厚みは20μm程度である。第2樹脂層32は、ポリイミド系の熱可塑性樹脂からなり、厚みは2.5μm程度である。つまり、樹脂絶縁層22,23は25μm程度である。また、配線層24,25は、例えば銅からなる導体層であり、その厚みは5μm程度である。配線構造体20,21のビア孔29及びビア導体26は断面円形状をなし、ビア孔29の内径及びビア導体26の外径は、50μm程度である。   The resin insulating layers 22 and 23 are insulating layers made of polyimide resin, for example. Specifically, the resin insulating layers 22 and 23 are laminated on both surfaces of the first resin layer 31 and the first resin layer 31, and the second resin layer 32 forming the main surfaces 27 and 28 of the resin insulating layers 22 and 23. It is comprised by. In the present embodiment, the first resin layer 31 constituting the resin insulating layers 22 and 23 is made of a polyimide-based thermosetting resin and has a thickness of about 20 μm. The second resin layer 32 is made of a polyimide-based thermoplastic resin and has a thickness of about 2.5 μm. That is, the resin insulating layers 22 and 23 are about 25 μm. The wiring layers 24 and 25 are conductor layers made of, for example, copper, and the thickness thereof is about 5 μm. The via holes 29 and the via conductors 26 of the wiring structures 20 and 21 have a circular cross section, and the inner diameter of the via holes 29 and the outer diameter of the via conductors 26 are about 50 μm.

また、多層配線基板10の主面11(配線構造体20の上面)における中央部分には、配線層24を構成する複数の主面側端子35がアレイ状に形成されている。主面側端子35は、断面円形状をなし、その直径は例えば60μm程度に設定されている。   A plurality of main surface side terminals 35 constituting the wiring layer 24 are formed in an array at the central portion of the main surface 11 of the multilayer wiring board 10 (the upper surface of the wiring structure 20). The main surface side terminal 35 has a circular cross section, and its diameter is set to about 60 μm, for example.

セラミック配線基板40は、基板主面41及び基板裏面42を有し、基板主面41上に各配線構造体20,21が積層されている。セラミック配線基板40には、複数のセラミック絶縁層43,44,45と複数の導体層46とが積層されている。セラミック絶縁層43〜45は、例えばアルミナの焼結体であり、導体層46は、例えばタングステン、モリブデン、又はこれらの合金のメタライズ層である。セラミック配線基板40において、各セラミック絶縁層43〜45には厚さ方向に貫通する貫通孔48が形成されており、その貫通孔48内には導体層46に接続されるビア導体49が形成されている。各貫通孔48は断面円形状をなしており、それらの内径は60μm程度である。各ビア導体49も断面円形状をなしており、それらの外径は60μm程度である。ビア導体49は、導体層46と同様にタングステン、モリブデン、又はこれらの合金のメタライズ層からなる。各導体層46及び各ビア導体49は、基板主面41及び基板裏面42間を導通させる貫通導体部として機能する。   The ceramic wiring substrate 40 has a substrate main surface 41 and a substrate back surface 42, and the wiring structures 20 and 21 are laminated on the substrate main surface 41. A plurality of ceramic insulating layers 43, 44, 45 and a plurality of conductor layers 46 are laminated on the ceramic wiring substrate 40. The ceramic insulating layers 43 to 45 are, for example, alumina sintered bodies, and the conductor layer 46 is, for example, a metallized layer of tungsten, molybdenum, or an alloy thereof. In the ceramic wiring substrate 40, each ceramic insulating layer 43 to 45 has a through hole 48 penetrating in the thickness direction, and a via conductor 49 connected to the conductor layer 46 is formed in the through hole 48. ing. Each through-hole 48 has a circular cross section, and the inner diameter thereof is about 60 μm. Each via conductor 49 also has a circular cross section, and the outer diameter thereof is about 60 μm. The via conductor 49 is made of a metallized layer of tungsten, molybdenum, or an alloy thereof, like the conductor layer 46. Each conductor layer 46 and each via conductor 49 function as a through conductor portion that conducts between the substrate main surface 41 and the substrate back surface 42.

セラミック配線基板40の基板裏面42(多層配線基板10の裏面12)には、複数の裏面側端子50がほぼ全域にわたってアレイ状に形成されている。各裏面側端子50は断面円形状をなし、裏面側端子50の直径は、1.0mm程度に設定されている。また、基板主面41の中央部分には、薄膜状の導体層51が形成されている。導体層51は、チタン及び/又は銅等からなる基板側配線層である。   On the substrate back surface 42 of the ceramic wiring substrate 40 (the back surface 12 of the multilayer wiring substrate 10), a plurality of back surface side terminals 50 are formed in an array over almost the entire area. Each back terminal 50 has a circular cross section, and the diameter of the back terminal 50 is set to about 1.0 mm. In addition, a thin-film conductor layer 51 is formed in the central portion of the substrate main surface 41. The conductor layer 51 is a substrate-side wiring layer made of titanium and / or copper.

セラミック配線基板40の各裏面側端子50は、ビア導体49や導体層46,51を介して配線構造体21のビア導体26に接続され、さらに配線構造体21の配線層25及び配線構造体20のビア導体26を介して主面側端子35に接続される。   Each back-side terminal 50 of the ceramic wiring board 40 is connected to the via conductor 26 of the wiring structure 21 via the via conductor 49 and the conductor layers 46 and 51, and further the wiring layer 25 and the wiring structure 20 of the wiring structure 21. The main surface side terminal 35 is connected through the via conductor 26.

また、セラミック配線基板40において、基板主面41には、基板中央部54を高所としかつ基板外周部55を低所とする高低差が設けられている。より詳しくは、セラミック配線基板40の基板主面41において、高所となる基板中央部54と低所となる基板外周部55との境界に段差部56が形成されている。段差部56は、配線構造体21の配線層25及びビア導体26が形成されている領域よりも外周部側に配置されている。また、段差部56の高低差は、10μm程度であり、樹脂絶縁層22,23の第2樹脂層32の厚さよりも大きくかつ樹脂絶縁層22,23の厚さよりも小さくなるよう設定されている。さらに、基板主面41における高所は、セラミック配線基板40の厚み方向に垂直な平坦面であり、かつその上にはビア導体26に接続される導体層51(基板側配線層)が形成されている。   Further, in the ceramic wiring substrate 40, the substrate main surface 41 is provided with a height difference with the substrate central portion 54 as a high place and the substrate outer peripheral portion 55 as a low place. More specifically, on the substrate main surface 41 of the ceramic wiring substrate 40, a stepped portion 56 is formed at the boundary between the substrate central portion 54 that is a high place and the substrate outer peripheral portion 55 that is a low place. The step portion 56 is disposed on the outer peripheral side of the region where the wiring layer 25 and the via conductor 26 of the wiring structure 21 are formed. The height difference of the stepped portion 56 is about 10 μm, and is set to be larger than the thickness of the second resin layer 32 of the resin insulating layers 22 and 23 and smaller than the thickness of the resin insulating layers 22 and 23. . Further, the height of the substrate main surface 41 is a flat surface perpendicular to the thickness direction of the ceramic wiring substrate 40, and a conductor layer 51 (substrate-side wiring layer) connected to the via conductor 26 is formed thereon. ing.

多層配線基板10において、セラミック配線基板40の基板主面41における高低差は、配線構造体20,21の樹脂絶縁層22,23で吸収され、主面11上における中央部と外周部との高低差は、基板主面41における高低差よりも小さくなっている。つまり、各配線構造体20,21の上面における高低差は、上層側に行くに従って小さくなっている。   In the multilayer wiring board 10, the height difference in the substrate main surface 41 of the ceramic wiring substrate 40 is absorbed by the resin insulating layers 22 and 23 of the wiring structures 20 and 21, and the height difference between the central portion and the outer peripheral portion on the main surface 11. The difference is smaller than the height difference on the substrate main surface 41. That is, the height difference on the upper surface of each wiring structure 20, 21 becomes smaller toward the upper layer side.

次に、本実施の形態における多層配線基板10の製造方法を説明する。   Next, a method for manufacturing the multilayer wiring board 10 in the present embodiment will be described.

先ず、配線構造体準備工程を行う。具体的には、図2に示されるように、樹脂絶縁層22,23となる樹脂絶縁材61の片側の主面27(図2では上面)に、配線層24,25となる銅箔63が形成された銅箔付き樹脂フィルム64を準備し、所定寸法に切断する。なお、樹脂絶縁材61は、ポリイミド系の熱硬化性樹脂からなる第1樹脂層31と、第1樹脂層31の両面に配設されポリイミド系の熱可塑性樹脂からなる第2樹脂層32とから構成される。そして、樹脂絶縁材61の上面27側に、厚さが5μmである銅箔63が貼り付けられている。   First, a wiring structure preparation process is performed. Specifically, as shown in FIG. 2, a copper foil 63 that becomes the wiring layers 24 and 25 is formed on one main surface 27 (upper surface in FIG. 2) of the resin insulating material 61 that becomes the resin insulating layers 22 and 23. The formed resin film 64 with copper foil is prepared and cut into predetermined dimensions. The resin insulating material 61 includes a first resin layer 31 made of a polyimide-based thermosetting resin, and a second resin layer 32 made of a polyimide-based thermoplastic resin disposed on both surfaces of the first resin layer 31. Composed. A copper foil 63 having a thickness of 5 μm is attached to the upper surface 27 side of the resin insulating material 61.

次に、レーザ加工により、銅箔付き樹脂フィルム64の樹脂絶縁材61及び銅箔63を貫通するビア孔29を形成する。そして、ペースト印刷充填装置(図示略)を用い、図3に示されるように、樹脂フィルム64のビア孔29内に銅粉末を主成分とする導電性ペースト(銅ペースト)を充填し、ビア導体26を形成する。その後150℃で1時間加熱する。   Next, the via hole 29 which penetrates the resin insulating material 61 of the resin film 64 with copper foil and the copper foil 63 is formed by laser processing. Then, using a paste printing filling device (not shown), as shown in FIG. 3, the via hole 29 of the resin film 64 is filled with a conductive paste (copper paste) mainly composed of copper powder, and a via conductor is formed. 26 is formed. Thereafter, it is heated at 150 ° C. for 1 hour.

そして、樹脂フィルム64の上面27に形成された銅箔63の上に感光性のドライフィルムを貼り付ける。さらに、そのドライフィルムの上に、配線層24(主面側端子35)の配線パターンが予め形成された露光用マスクを配置する。次いで、露光用マスクを介してドライフィルムの露光を行った後に現像を行い、銅箔63をエッチングするためのエッチングレジストをパターン形成する。また、樹脂フィルム64の主面28(図3では下面)側にも、感光性のドライフィルムを貼り付け、上記の露光及び現像によって下面28全体を覆うようにエッチングレジストを形成する。   Then, a photosensitive dry film is attached on the copper foil 63 formed on the upper surface 27 of the resin film 64. Further, an exposure mask in which a wiring pattern of the wiring layer 24 (main surface side terminal 35) is previously formed is disposed on the dry film. Next, after the dry film is exposed through an exposure mask, development is performed, and an etching resist for etching the copper foil 63 is patterned. Further, a photosensitive dry film is also attached to the main surface 28 (lower surface in FIG. 3) side of the resin film 64, and an etching resist is formed so as to cover the entire lower surface 28 by the exposure and development described above.

その後、銅箔63においてエッチングレジストのレジストパターンから露出する部分をエッチングにより除去し、配線層24としての主面側端子35を形成する。その後、剥離液に接触させることにより、主面側端子35上に残存するエッチングレジストを除去するとともに、下面28側のエッチングレジストを除去する。   Thereafter, a portion of the copper foil 63 exposed from the resist pattern of the etching resist is removed by etching to form the main surface side terminal 35 as the wiring layer 24. Thereafter, by contacting with the stripping solution, the etching resist remaining on the main surface side terminal 35 is removed, and the etching resist on the lower surface 28 side is removed.

この結果、図4に示されるように、樹脂絶縁層22、配線層24(主面側端子35)、及びビア導体26を有する配線構造体20が形成される。また、上述した工程を同様に行うことで、樹脂絶縁層23、配線層25及びビア導体26を有する配線構造体21が形成される。   As a result, as shown in FIG. 4, the wiring structure 20 having the resin insulating layer 22, the wiring layer 24 (main surface side terminal 35), and the via conductor 26 is formed. Moreover, the wiring structure 21 having the resin insulating layer 23, the wiring layer 25, and the via conductor 26 is formed by performing the above-described steps in the same manner.

次に、セラミック配線基板準備工程を行う。具体的には、アルミナ粉末を主成分とするセラミック材料を用いてグリーンシートを複数枚形成する。そして、図5に示されるように、複数枚のグリーンシート71に対し、レーザ加工を行って、所定の位置に複数の貫通孔48を形成する。なお、貫通孔48の形成は、パンチング加工、ドリル加工等によって行ってもよい。   Next, a ceramic wiring board preparation step is performed. Specifically, a plurality of green sheets are formed using a ceramic material mainly composed of alumina powder. Then, as shown in FIG. 5, laser processing is performed on the plurality of green sheets 71 to form a plurality of through holes 48 at predetermined positions. The through hole 48 may be formed by punching, drilling, or the like.

その後、従来周知のペースト印刷装置(図示略)を用い、各グリーンシート71の貫通孔48に導電性ペースト(例えばタングステンペースト)を充填し、未焼成のビア導体49を形成する。さらに、従来周知のペースト印刷装置を用いて、導電性ペーストを印刷して未焼成の導体層46や裏面側端子50を形成する(図6参照)。なお、導電性ペーストの充填及び印刷の順序は逆にしてもよい。   Thereafter, using a conventionally known paste printing apparatus (not shown), the through holes 48 of each green sheet 71 are filled with a conductive paste (for example, tungsten paste) to form an unfired via conductor 49. Further, the conductive paste 46 is printed by using a conventionally known paste printing apparatus to form the unfired conductor layer 46 and the back-side terminal 50 (see FIG. 6). The order of filling and printing of the conductive paste may be reversed.

そして、導電性ペーストの乾燥後、それら複数枚のグリーンシート71を積み重ねて配置し、シート積層方向に押圧力を付与することにより、各グリーンシート71を圧着、一体化してセラミック積層体73を形成する(図7参照)。次に、セラミック積層体73を脱脂し、さらに所定温度で所定時間焼成を行う(焼成工程)。その結果、グリーンシート71のアルミナ及びペースト中のタングステンが同時焼結し、セラミック配線基板40が形成される。   Then, after the conductive paste is dried, the plurality of green sheets 71 are stacked and arranged, and a pressing force is applied in the sheet stacking direction, whereby the green sheets 71 are pressed and integrated to form a ceramic laminate 73. (See FIG. 7). Next, the ceramic laminate 73 is degreased and fired at a predetermined temperature for a predetermined time (firing step). As a result, the alumina of the green sheet 71 and the tungsten in the paste are simultaneously sintered, and the ceramic wiring substrate 40 is formed.

そして、焼結工程を経たセラミック配線基板40の基板主面41を表面研磨する。次に、チタン及び銅のスパッタリングを行い、基板主面41に薄膜を形成した後、露光及び現像を行うことで、基板主面41の基板中央部54においてビア導体49に接続される薄膜状の導体層51(基板側配線層)を形成する(図8参照)。   And the board | substrate main surface 41 of the ceramic wiring board 40 which passed through the sintering process is surface-polished. Next, after sputtering titanium and copper to form a thin film on the substrate main surface 41, exposure and development are performed to form a thin film connected to the via conductor 49 at the substrate central portion 54 of the substrate main surface 41. A conductor layer 51 (substrate-side wiring layer) is formed (see FIG. 8).

さらに、図9に示されるように、基板主面41において、レーザトリミングにより基板外周部55のセラミック材料を除去することで段差部56を形成し、高低差を設ける(高低差付与工程)。この結果、セラミック配線基板40の基板主面41において、基板外周部55に沿って枠状(四角枠状)に低所が形成される。以上の工程を行うことで、セラミック配線基板40を準備する。なお、基板主面41において低所となる基板外周部55の表面はレーザトリミングによって微細な凹凸が形成されるため、基板主面41の低所(基板外周部55)は高所(基板中央部54)よりも表面粗さが大きくなっている。   Further, as shown in FIG. 9, the stepped portion 56 is formed on the substrate main surface 41 by removing the ceramic material of the substrate outer peripheral portion 55 by laser trimming to provide a height difference (a height difference providing step). As a result, a low portion is formed in a frame shape (square frame shape) along the substrate outer peripheral portion 55 on the substrate main surface 41 of the ceramic wiring substrate 40. The ceramic wiring board 40 is prepared by performing the above steps. Since the surface of the substrate outer peripheral portion 55 which is a low place on the substrate main surface 41 is formed with fine irregularities by laser trimming, the low portion (substrate outer peripheral portion 55) of the substrate main surface 41 is a high place (the central portion of the substrate). The surface roughness is larger than 54).

その後、高低差の存在するセラミック配線基板40の基板主面41の上に、図4に示す配線構造体20,21を複数重ねて配置した状態で、350℃程度の温度に加熱しつつ75kgf/cm程度の圧力で加圧する(積層工程)。なおここでは、基板主面41上の基板外周部55に段差部56が設けられているため、配線構造体20,21の平面方向に遠心的な張力(テンション)が作用し、その状態で各配線構造体20,21が加熱加圧される。この加熱加圧を行うことで、樹脂絶縁層22,23の第2樹脂層32が軟化することで接着層として機能し、セラミック配線基板40上に各配線構造体20,21が一括して圧着される。この結果、各配線構造体20,21とセラミック配線基板40とが一体化した多層配線基板10が製造される。 Thereafter, 75 kgf / w while heating to a temperature of about 350 ° C. in a state where a plurality of wiring structures 20 and 21 shown in FIG. Pressurization is performed at a pressure of about cm 2 (lamination step). Here, since the step portion 56 is provided in the substrate outer peripheral portion 55 on the substrate main surface 41, centrifugal tension (tension) acts in the planar direction of the wiring structures 20 and 21, and in this state, The wiring structures 20 and 21 are heated and pressurized. By performing this heating and pressurization, the second resin layer 32 of the resin insulating layers 22 and 23 softens and functions as an adhesive layer, and the wiring structures 20 and 21 are collectively pressure-bonded onto the ceramic wiring substrate 40. Is done. As a result, the multilayer wiring board 10 in which the wiring structures 20 and 21 and the ceramic wiring board 40 are integrated is manufactured.

従って、本実施の形態によれば以下の効果を得ることができる。   Therefore, according to the present embodiment, the following effects can be obtained.

(1)本実施の形態の多層配線基板10において、セラミック配線基板40の基板主面41には、基板中央部54を高所としかつ基板外周部55を低所とする高低差が設けられている。この場合、基板主面41上に配線構造体20,21を加熱加圧して積層する際には、配線構造体20,21(樹脂絶縁層22,23)の平面方向に遠心的な張力(テンション)が加わった状態となる。このため、加熱による樹脂絶縁層22,23の粘度低下に伴う平面方向の移動を防止することができる。従って、セラミック配線基板40上に配線構造体20,21を位置精度よく積層することができ、配線が断線するといった問題を回避することができる。また、本発明の多層配線基板10では、従来技術のように非貫通ビア導体(ダミービア導体)を設ける必要がないため、電気特性を良好な状態に維持しつつ、配線の高密度化を実現することができる。   (1) In the multilayer wiring substrate 10 of the present embodiment, the substrate main surface 41 of the ceramic wiring substrate 40 is provided with a height difference with the substrate central portion 54 as a high place and the substrate outer peripheral portion 55 as a low place. Yes. In this case, when the wiring structures 20 and 21 are laminated by heating and pressing on the substrate main surface 41, centrifugal tension (tension) is applied in the plane direction of the wiring structures 20 and 21 (resin insulating layers 22 and 23). ) Is added. For this reason, the movement of the plane direction accompanying the viscosity fall of the resin insulating layers 22 and 23 by heating can be prevented. Therefore, the wiring structures 20 and 21 can be laminated with high positional accuracy on the ceramic wiring substrate 40, and the problem of the wiring being disconnected can be avoided. Further, in the multilayer wiring board 10 of the present invention, it is not necessary to provide a non-penetrating via conductor (dummy via conductor) as in the prior art, so that the wiring density can be increased while maintaining good electrical characteristics. be able to.

(2)本実施の形態の多層配線基板10において、セラミック配線基板40の基板主面41には、基板中央部54と基板外周部55との境界に段差部56が存在している。この場合、段差部56のエッジによって樹脂絶縁層23の平面方向のズレを確実に防止することができる。また、セラミック配線基板40と樹脂絶縁層23との接触面積が段差部56の高低差の分だけ増加するため、セラミック配線基板40と配線構造体21との接続強度を高めることができる。   (2) In the multilayer wiring board 10 of the present embodiment, a stepped portion 56 exists on the substrate main surface 41 of the ceramic wiring substrate 40 at the boundary between the substrate central portion 54 and the substrate outer peripheral portion 55. In this case, the deviation in the planar direction of the resin insulating layer 23 can be reliably prevented by the edge of the stepped portion 56. Further, since the contact area between the ceramic wiring substrate 40 and the resin insulating layer 23 increases by the height difference of the step portion 56, the connection strength between the ceramic wiring substrate 40 and the wiring structure 21 can be increased.

(3)本実施の形態の多層配線基板10において、基板主面41の段差部56は、配線層24,25及びビア導体26が形成されている領域よりも外周部側に配置されている。このようにすると、多層配線基板10の電気特性に影響を与えることなく、段差部56を確実に形成することができ、多層配線基板10の信頼性を確保することができる。   (3) In the multilayer wiring substrate 10 of the present embodiment, the stepped portion 56 of the substrate main surface 41 is disposed on the outer peripheral side of the region where the wiring layers 24 and 25 and the via conductor 26 are formed. In this way, the step portion 56 can be reliably formed without affecting the electrical characteristics of the multilayer wiring board 10, and the reliability of the multilayer wiring board 10 can be ensured.

(4)本実施の形態の多層配線基板10において、基板主面41の高低差は、第2樹脂層32の厚さよりも大きくかつ樹脂絶縁層22,23の厚さよりも小さくなるように設定されている。ここで、高低差が第2樹脂層31よりも小さいと、加熱時に軟化する第2樹脂層31によって高低差が吸収されてしまうため、高低差による積層ズレの効果が十分に得られなくなる。また、高低差が樹脂絶縁層22,23よりも大きいと、多層配線基板10の主面11において要求される平坦度を確保できなくなる場合がある。従って、上記のような高低差を設定すると、積層時における樹脂絶縁層22,23のズレを確実に防止することができ、信頼性の高い多層配線基板10を得ることができる。   (4) In the multilayer wiring substrate 10 of the present embodiment, the height difference of the substrate main surface 41 is set to be larger than the thickness of the second resin layer 32 and smaller than the thickness of the resin insulating layers 22 and 23. ing. Here, if the height difference is smaller than that of the second resin layer 31, the height difference is absorbed by the second resin layer 31 that is softened during heating, so that the effect of stacking misalignment due to the height difference cannot be sufficiently obtained. Further, if the height difference is larger than that of the resin insulating layers 22 and 23, the flatness required for the main surface 11 of the multilayer wiring board 10 may not be ensured. Accordingly, when the above-described height difference is set, it is possible to reliably prevent the resin insulating layers 22 and 23 from being displaced during lamination, and to obtain a highly reliable multilayer wiring board 10.

(5)本実施の形態の多層配線基板10では、基板主面41における高所は、セラミック配線基板40の厚み方向に垂直な平坦面であり、かつその上にはビア導体49に接続する導体層51が形成されている。この場合、均一な厚さの導体層51を位置精度よく形成することができるので、セラミック配線基板40と配線構造体21との間における断線を確実に防止することができる。   (5) In the multilayer wiring substrate 10 of the present embodiment, the height of the substrate main surface 41 is a flat surface perpendicular to the thickness direction of the ceramic wiring substrate 40, and a conductor connected to the via conductor 49 thereon. Layer 51 is formed. In this case, since the conductor layer 51 having a uniform thickness can be formed with high positional accuracy, disconnection between the ceramic wiring substrate 40 and the wiring structure 21 can be reliably prevented.

(6)本実施の形態の多層配線基板10では、主面側端子35が位置精度良く形成されているため、多数の端子が密集してアレイ状に配置されているICチップを確実に検査することができる。   (6) In the multilayer wiring board 10 of the present embodiment, since the main surface side terminals 35 are formed with high positional accuracy, the IC chips in which a large number of terminals are densely arranged in an array are reliably inspected. be able to.

(7)本実施の形態の場合、積層工程において、高低差の存在するセラミック配線基板40の基板主面41上に配線構造体20,21を複数重ねて配置した状態で加熱加圧を行うことにより、基板主面41に配線構造体20,21を一括して圧着させている。このようにすると、複数の配線構造体20,21を1つずつ基板主面41に圧着させる場合と比較して、製造工程を簡素化することができ、多層配線基板10を短時間で製造することができる。   (7) In the case of the present embodiment, in the laminating step, heating and pressing are performed in a state in which a plurality of wiring structures 20 and 21 are arranged on the substrate main surface 41 of the ceramic wiring substrate 40 having a height difference. Thus, the wiring structures 20 and 21 are collectively bonded to the substrate main surface 41. In this way, the manufacturing process can be simplified and the multilayer wiring board 10 can be manufactured in a short time as compared with the case where the plurality of wiring structures 20 and 21 are bonded to the substrate main surface 41 one by one. be able to.

(8)本実施の形態の場合、焼成工程を経たセラミック配線基板40の基板主面41において、基板外周部55のセラミック材料を除去することにより、高低差を設けている。このようにすると、セラミック配線基板40の基板主面41において、所定寸法の高低差を正確にかつ容易に形成することができる。具体的には、エッジのある段差部56を正確に形成することができるため、積層時における樹脂絶縁層23の位置ズレを確実に防止することができる。   (8) In the case of the present embodiment, the height difference is provided on the substrate main surface 41 of the ceramic wiring substrate 40 that has undergone the firing process by removing the ceramic material of the substrate outer peripheral portion 55. In this way, a height difference of a predetermined dimension can be accurately and easily formed on the substrate main surface 41 of the ceramic wiring substrate 40. Specifically, since the stepped portion 56 with an edge can be accurately formed, it is possible to reliably prevent the positional displacement of the resin insulating layer 23 during lamination.

(9)本実施の形態の場合、セラミック配線基板40の基板主面41を表面研磨した後に高低差付与工程が行われ、基板主面41に高低差が設けられている。このようにすると、基板主面41における高低差を正確に設けることができる。また、表面研磨された基板主面41が平坦面となるので、その基板主面41上にビア導体49に接続する導体層51を均一な厚さで位置精度よく形成することができる。さらに、基板主面41における低所は高所よりも表面粗さが大きくなるため、低所となる基板外周部55によって樹脂絶縁層23の位置ズレを確実に防止することができる。   (9) In the case of the present embodiment, an elevation difference applying step is performed after the surface of the substrate main surface 41 of the ceramic wiring substrate 40 is polished, and the substrate main surface 41 is provided with an elevation difference. In this way, the height difference in the substrate main surface 41 can be accurately provided. Further, since the substrate main surface 41 subjected to the surface polishing becomes a flat surface, the conductor layer 51 connected to the via conductor 49 can be formed on the substrate main surface 41 with a uniform thickness with high positional accuracy. Further, since the surface roughness of the low part of the substrate main surface 41 is larger than that of the high part, the positional deviation of the resin insulating layer 23 can be reliably prevented by the substrate peripheral part 55 which is the low part.

なお、本発明の各実施の形態は以下のように変更してもよい。   In addition, you may change each embodiment of this invention as follows.

・上記実施の形態の多層配線基板10では、セラミック配線基板40の基板主面41における基板中央部54と基板外周部55との境界に段差部56を形成することで高低差が設けられていたが、これに限定されるものではない。例えば、図10に示されるように、セラミック配線基板40Aの基板主面41において、基板中央部54から基板外周部55に向けて徐々に低くなるようにセラミック材料を除去することで高低差を設けてもよい。このように基板主面41に高低差を設けた場合でも、積層工程において、配線構造体20,21(樹脂絶縁層22,23)の平面方向にテンションが加わるため、樹脂絶縁層22,23の積層ズレを防止することができる。   In the multilayer wiring board 10 of the above embodiment, a difference in level is provided by forming the stepped portion 56 at the boundary between the substrate central portion 54 and the substrate outer peripheral portion 55 in the substrate main surface 41 of the ceramic wiring substrate 40. However, the present invention is not limited to this. For example, as shown in FIG. 10, a difference in height is provided by removing the ceramic material from the substrate central portion 54 toward the substrate outer peripheral portion 55 on the substrate main surface 41 of the ceramic wiring substrate 40A. May be. Even when the main surface 41 is thus provided with a height difference, tension is applied in the planar direction of the wiring structures 20 and 21 (resin insulating layers 22 and 23) in the stacking process. Lamination displacement can be prevented.

・上記実施の形態の多層配線基板10では、セラミック配線基板40の基板主面41を表面研磨した後に高低差付与工程を行うものであったが、高低差付与工程後に、基板主面41の高所について表面研磨を行うようにしてもよい。   In the multilayer wiring board 10 of the above-described embodiment, the height difference applying step is performed after surface polishing of the substrate main surface 41 of the ceramic wiring substrate 40. However, after the height difference applying step, the height of the substrate main surface 41 is increased. Surface polishing may be performed on the spot.

・上記実施の形態では、段差部56のある基板外周部55を残したまま多層配線基板10を製造していたが、上記積層工程の後に切断工程を行って、段差部56のある基板外周部55を切断除去して多層配線基板を製造してもよい。   In the above embodiment, the multilayer wiring board 10 is manufactured while leaving the substrate outer peripheral portion 55 with the stepped portion 56, but the substrate outer peripheral portion with the stepped portion 56 is obtained by performing a cutting step after the above-described lamination step. 55 may be cut and removed to manufacture a multilayer wiring board.

・上記実施の形態の多層配線基板10は、セラミック配線基板40上に2つの配線構造体20,21を積層するものであったが、これ以外に1つの配線構造体を積層したものでもよいし、3つ以上の配線構造体を積層したものでもよい。   The multi-layer wiring board 10 of the above embodiment is one in which two wiring structures 20 and 21 are laminated on the ceramic wiring board 40, but in addition to this, one wiring structure may be laminated. Three or more wiring structures may be stacked.

・上記実施の形態の多層配線基板10では、基板主面41において高低差を付ける段差部56は、矩形状に形成されていたが、円形状、楕円形状、多角形状などの他の形状となるよう段差部を形成してもよい。また、基板主面41において高低差を形成するために、段差部を複数を設けてもよいし、高さが異なる凹凸を設けてもよい。   In the multilayer wiring board 10 of the above embodiment, the stepped portion 56 that gives a height difference on the substrate main surface 41 is formed in a rectangular shape, but has other shapes such as a circular shape, an elliptical shape, and a polygonal shape. A stepped portion may be formed. Further, in order to form a height difference in the substrate main surface 41, a plurality of step portions may be provided, or irregularities having different heights may be provided.

・上記実施の形態の多層配線基板10では、セラミック絶縁層43〜45としてアルミナの焼結体を用いたが、これに限定されるものではない。アルミナ以外の、例えばガラス−セラミックでもよい。ガラス−セラミックを用いた場合、導体層46及びビア導体49は銀、銅、又はこれらの合金を用いる。   In the multilayer wiring board 10 of the above-described embodiment, an alumina sintered body is used as the ceramic insulating layers 43 to 45, but is not limited thereto. For example, glass-ceramic other than alumina may be used. When glass-ceramic is used, the conductor layer 46 and the via conductor 49 are made of silver, copper, or an alloy thereof.

・上記実施の形態では、IC検査装置用の多層配線基板10に具体化したが、他の用途で使用される多層配線基板に本発明を具体化してもよい。   In the above embodiment, the present invention is embodied in the multilayer wiring board 10 for the IC inspection apparatus. However, the present invention may be embodied in a multilayer wiring board used for other purposes.

次に、特許請求の範囲に記載された技術的思想のほかに、前述した実施の形態によって把握される技術的思想を以下に列挙する。   Next, in addition to the technical ideas described in the claims, the technical ideas grasped by the embodiments described above are listed below.

(1)手段1において、前記低所は前記高所よりも表面粗さが大きいことを特徴とする多層配線基板。   (1) The multilayer wiring board according to means 1, wherein the low portion has a surface roughness larger than that of the high portion.

(2)手段2において、前記多層配線基板はIC検査装置用基板であることを特徴とする多層配線基板の製造方法。   (2) A method for manufacturing a multilayer wiring board according to means 2, wherein the multilayer wiring board is a substrate for an IC inspection apparatus.

(3)手段2において、前記高低差付与工程では、レーザトリミング、エッチングまたは研磨により前記基板外周部のセラミック材料を除去することを特徴とする多層配線基板の製造方法。   (3) The method for manufacturing a multilayer wiring board according to means 2, wherein, in the height difference applying step, the ceramic material on the outer periphery of the substrate is removed by laser trimming, etching, or polishing.

(4)手段2において、前記積層工程では、前記配線構造体の平面方向に遠心的な張力を付与した状態で加熱加圧を行うことを特徴とする多層配線基板の製造方法。   (4) The method for manufacturing a multilayer wiring board according to (2), wherein in the laminating step, heating and pressing are performed in a state where centrifugal tension is applied in a planar direction of the wiring structure.

10…多層配線基板
20,21…配線構造体
22,23…樹脂絶縁層
24,25…配線層
26,49…ビア導体
27,28…主面
29…ビア孔
31…第1樹脂層
32…第2樹脂層
40,40A…セラミック配線基板
41…基板主面
42…基板裏面
46…貫通導体部としての導体層
51…基板側配線層としての導体層
54…基板中央部
55…基板外周部
56…段差部
DESCRIPTION OF SYMBOLS 10 ... Multilayer wiring board 20, 21 ... Wiring structure 22, 23 ... Resin insulation layer 24, 25 ... Wiring layer 26, 49 ... Via conductor 27, 28 ... Main surface 29 ... Via hole 31 ... 1st resin layer 32 ... 1st 2 resin layers 40, 40A ... ceramic wiring substrate 41 ... substrate main surface 42 ... substrate back surface 46 ... conductor layer as through conductor portion 51 ... conductor layer as substrate side wiring layer 54 ... substrate center portion 55 ... substrate outer peripheral portion 56 ... Step

Claims (8)

一対の主面を有しかつ前記主面間を貫通するビア孔が形成された樹脂絶縁層、前記樹脂絶縁層の少なくとも一方の前記主面上に配置された配線層、及び前記ビア孔内に設けられ前記配線層と電気的に接続するビア導体を有する配線構造体と、
基板主面及び基板裏面を有し、前記基板主面及び前記基板裏面間を導通させる貫通導体部が設けられ、前記基板主面上に前記配線構造体が積層されるセラミック配線基板と
を備えた多層配線基板であって、
前記樹脂絶縁層は、熱硬化性樹脂からなる第1樹脂層と、前記第1樹脂層に積層されて少なくとも一方の前記主面をなす熱可塑性樹脂からなる第2樹脂層とにより構成され、
前記基板主面には、基板中央部を高所としかつ基板外周部を低所とする高低差が設けられており、
前記高所と前記低所との境界には段差部が存在している
ことを特徴とする多層配線基板。
A resin insulating layer having a pair of main surfaces and having via holes formed between the main surfaces, a wiring layer disposed on at least one of the main surfaces of the resin insulating layer, and the via holes A wiring structure having a via conductor provided and electrically connected to the wiring layer;
A ceramic wiring substrate having a substrate main surface and a substrate back surface, provided with a through conductor portion for conducting between the substrate main surface and the substrate back surface, and wherein the wiring structure is laminated on the substrate main surface. A multilayer wiring board,
The resin insulation layer is composed of a first resin layer made of a thermosetting resin and a second resin layer made of a thermoplastic resin laminated on the first resin layer and forming at least one of the main surfaces,
The substrate main surface is provided with a height difference in which the central portion of the substrate is a high place and the peripheral portion of the substrate is a low place ,
A multilayer wiring board , wherein a step portion exists at a boundary between the high place and the low place .
前記段差部は、前記配線層及び前記ビア導体が形成されている領域よりも外周部側に配置されていることを特徴とする請求項に記載の多層配線基板。 2. The multilayer wiring board according to claim 1 , wherein the stepped portion is disposed closer to an outer peripheral portion than a region where the wiring layer and the via conductor are formed. 前記高低差は、前記第2樹脂層の厚さよりも大きくかつ前記樹脂絶縁層の厚さよりも小さくなるように設定されていることを特徴とする請求項1または2に記載の多層配線基板。 The height difference, the multilayer wiring board according to claim 1 or 2, characterized in that it is set to be smaller than the thickness of the large and the resin insulating layer than a thickness of the second resin layer. 前記基板主面における前記高所は、前記セラミック配線基板の厚み方向に垂直な平坦面であり、かつその上には前記貫通導体部に接続する基板側配線層が形成されていることを特徴とする請求項1乃至のいずれか1項に記載の多層配線基板。 The height of the main surface of the substrate is a flat surface perpendicular to the thickness direction of the ceramic wiring substrate, and a substrate-side wiring layer connected to the through conductor is formed thereon. The multilayer wiring board according to any one of claims 1 to 3 . 請求項1乃至のいずれか1項に記載の多層配線基板を製造する方法であって、
前記配線層及び前記ビア導体が形成された樹脂絶縁層を有する配線構造体を準備する配線構造体準備工程と、
前記貫通導体部が設けられたセラミック配線基板を準備するセラミック配線基板準備工程と、
前記セラミック配線基板の前記基板主面に前記高低差を設ける高低差付与工程と、
前記高低差の存在する前記基板主面上に前記配線構造体を配置した状態で加熱加圧を行うことにより、前記基板主面に前記配線構造体を圧着させる積層工程と
を含むことを特徴とする多層配線基板の製造方法。
A method for producing the multilayer wiring board according to any one of claims 1 to 4 ,
A wiring structure preparation step of preparing a wiring structure having a resin insulating layer in which the wiring layer and the via conductor are formed;
A ceramic wiring board preparation step of preparing a ceramic wiring board provided with the through conductor portion;
An elevation difference providing step of providing the elevation difference on the main surface of the ceramic wiring board;
And a laminating step in which the wiring structure is pressure-bonded to the substrate main surface by performing heat and pressure in a state where the wiring structure is disposed on the substrate main surface having the height difference. A method for manufacturing a multilayer wiring board.
前記積層工程では、前記高低差の存在する前記基板主面上に前記配線構造体を複数重ねて配置した状態で加熱加圧を行うことにより、前記基板主面に前記配線構造体を一括して圧着させることを特徴とする請求項に記載の多層配線基板の製造方法。 In the laminating step, the wiring structures are collectively applied to the substrate main surface by performing heat and pressure in a state where a plurality of the wiring structures are arranged on the substrate main surface where the height difference exists. The method for manufacturing a multilayer wiring board according to claim 5 , wherein the bonding is performed. 前記高低差付与工程では、焼成工程を経た前記セラミック配線基板の前記基板主面において、前記基板外周部のセラミック材料を除去することにより、前記高低差を設けることを特徴とする請求項またはに記載の多層配線基板の製造方法。 In the height difference application step, in the substrate main surface of the ceramic wiring substrate after the firing step, by removing the ceramic material of the substrate peripheral portion, claim 5 or 6, characterized in that providing the height difference The manufacturing method of the multilayer wiring board as described in any one of. 前記高低差付与工程では、焼成工程を経た前記セラミック配線基板の前記基板主面をあらかじめ表面研磨した後、その表面研磨された前記基板主面において、前記基板外周部のセラミック材料を除去することにより、前記高低差を設けることを特徴とする請求項またはに記載の多層配線基板の製造方法。 In the height difference providing step, the substrate main surface of the ceramic wiring substrate that has undergone the firing step is surface-polished in advance, and then the ceramic material on the outer peripheral portion of the substrate is removed on the surface-polished substrate main surface. the method of manufacturing a multilayer wiring board according to claim 5 or 6, characterized in that providing the height difference.
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