JP2014207620A - Drive circuit for switching element to be driven - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a drive circuit for a switching element to be driven that suitably avoids a reduction in the reliability of a switching element S¥#.SOLUTION: A drive unit DU includes a bypass path Lβ connecting a gate of a switching element S¥# and an output side of an insulated power supply. A diode 56, which has an anode connected to the gate side and a cathode connected to the output side of the insulated power supply, is provided on the bypass path Lβ. Further, the drive unit DU includes first and second capacitors 54a and 54b each having one end connected to the bypass path Lβ and the other end connected to an emitter of the switching element S¥#.

Description

  The present invention relates to a drive circuit for a drive target switching element.

  This type of drive circuit is applied to a power conversion circuit (for example, a three-phase inverter) including a series connection body of a high potential side switching element and a low potential side switching element (for example, IGBT) connected in parallel to a DC power source. It has been known. Here, when one of the high-potential side switching element and the low-potential side switching element is short-circuited and the upper and lower arms are short-circuited so that the other is switched on, an overcurrent (short-circuit current) flows through these switching elements. It becomes.

  Here, in order to suppress the overcurrent flowing through the switching element, for example, a drive circuit including an overcurrent protection circuit for the switching element is known as seen in Patent Document 1 below. Specifically, this drive circuit includes a serial connection body of a bipolar transistor and a Zener diode connected between the gate and emitter of the switching element. According to such a configuration, the bipolar transistor is switched to the on state when an overcurrent flows through the switching element. As a result, the gate voltage is reduced to suppress overcurrent flowing through the switching element.

JP-A-5-218836

  By the way, in the situation where one of the high-potential side switching element and the low-potential side switching element is in a full-on state, the present inventors have found that when the other arm is short-circuited, an upper and lower arm short circuit occurs, We faced a situation where the current could not be suppressed and the reliability of these switching elements decreased. Specifically, for example, when the high potential side switching element is short-circuited under the condition that the low potential side switching element is turned on, the collector-emitter voltage of the low potential side switching element increases due to the flow of the short circuit current. As a result, a current flows from the collector of the low potential side switching element to the gate via the feedback capacitance of the low potential side switching element, and a phenomenon occurs in which the gate voltage rises. When this phenomenon occurs, the overcurrent further increases, and the reliability of the high potential side switching element and the low potential side switching element decreases.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a drive circuit for a drive target switching element that can suitably avoid a decrease in reliability of the drive target switching element. is there.

  In order to solve the above-mentioned problem, the invention according to claim 1 connects the open / close control terminal of the drive target switching element (S ¥ #) and the drive power supply (TW, 20, 22, 24, 25) to control the open / close control. A charging path (Lα) for charging the terminal with a charge; a bypass path (Lβ; Lγ) connecting the open / close control terminal and the driving power supply; one end connected to the bypass path and the other end It is characterized by comprising storage means (54a, 54b) connected to a part having a reference potential different from the output potential of the driving power supply and capable of storing charges.

  The said invention is provided with the bypass path and the electrical storage means. For this reason, when the driving target switching element is in a full-on state and an overcurrent flows through the driving target switching element, the input terminal of the driving target switching element is switched from the input terminal of the driving target switching element to the switching control terminal. Even when a current flows, the flowing current can be guided to the power storage means via the bypass path. As a result, it is possible to suppress an increase in the voltage of the switching control terminal under a situation where an overcurrent flows. Therefore, according to the said invention, the overcurrent which flows into a drive object switching element can be suppressed, and the fall of the reliability of a drive object switching element can be avoided suitably by extension.

The lineblock diagram of the motor control system concerning a 1st embodiment. The block diagram of the drive unit etc. concerning the embodiment. The time chart which shows transition of collector current etc. at the time of an upper and lower arm short circuit. The figure which shows the feedback capacity | capacitance of IGBT. 4 is a time chart showing the effect of installing a diode in the bypass path according to the first embodiment. The block diagram of the drive unit etc. concerning 2nd Embodiment. 6 is a flowchart showing a procedure of gate bypass processing according to the embodiment; The block diagram of the drive unit etc. concerning 3rd Embodiment. The block diagram of the drive unit etc. concerning 4th Embodiment. The flowchart which shows the procedure of the soft interruption | blocking process concerning 5th Embodiment. The time chart which shows the soft interruption | blocking process concerning the embodiment. The time chart which shows the soft interruption | blocking process concerning the embodiment.

(First embodiment)
Hereinafter, a first embodiment in which a drive circuit of a drive target switching element according to the present invention is applied to a hybrid vehicle including a rotating machine and an internal combustion engine as an in-vehicle main machine will be described with reference to the drawings.

  As shown in FIG. 1, the motor generator 10 is an in-vehicle main machine and is connected to drive wheels (not shown). The motor generator 10 is connected to a high voltage battery 12 as a “DC power supply” via an inverter IV. The output voltage of the high voltage battery 12 is, for example, 100 V or more. Note that a boost converter (not shown) that boosts the output voltage of the high voltage battery 12 and applies it to the inverter IV is provided between the high voltage battery 12 and the inverter IV.

  The inverter IV includes a series connection body of a switching element S ¥ p (¥ = u, v, w) on the high potential side (upper arm side) and a switching element S ¥ n on the low potential side (lower arm side). . Specifically, inverter IV includes a series connection body of three sets of switching elements S ¥ p, S ¥ n, and the connection point of switching elements S ¥ p, S ¥ n is connected to the ¥ phase of motor generator 10. Yes. Incidentally, in the present embodiment, a voltage control type semiconductor switching element is used as the switching element S ¥ # (# = p, n), and more specifically, an IGBT is used. A free wheel diode D ¥ # is connected in reverse parallel to the switching element S ¥ #. In the present embodiment, the switching element S ¥ # corresponds to a “drive target switching element”.

  The control device 14 is configured mainly by a microcomputer that powers the low-voltage battery 16. Control device 14 operates inverter IV to control the control amount (for example, torque) of motor generator 10 to the command value. Specifically, the control device 14 generates an operation signal g ¥ # and outputs it to the drive unit DU so as to operate the switching element S ¥ # constituting the inverter IV. Here, the high-potential side operation signal g ¥ p and the corresponding low-potential side operation signal g ¥ n are complementary to each other. That is, the switching element S ¥ p on the high potential side and the corresponding switching element S ¥ n on the low potential side are alternately turned on.

  The interface 18 electrically isolates the high voltage system including the high voltage battery 12, the inverter IV and the motor generator 10 from the low voltage system including the low voltage battery 16 and the control device 14, and It has a function of transmitting signals. In the present embodiment, the interface 18 includes an optical insulating element (photocoupler).

  Power is supplied from the low-voltage battery 16 to the drive unit DU corresponding to each switching element S ¥ # via a transformer (not shown) that constitutes an insulated power supply. In the present embodiment, a transformer is provided corresponding to each of the upper arm drive units DU of the U, V, and W phases, and power is supplied from the low voltage battery 16 to each of these drive units DU via the corresponding transformer. Is done. On the other hand, for the lower arm, a transformer is provided for only one phase, and power is supplied from the low voltage battery 16 to each of the drive units DU of the U, V, and W phases of the lower arm via this transformer. Hereinafter, the configuration of the insulated power supply and the drive unit DU will be described in detail with reference to FIG.

  As shown in FIG. 2, the insulated power source includes a transformer TW having a primary side coil 19a and a secondary side coil 19b, an N-channel MOSFET (hereinafter, voltage control switching element 20), a power source diode 22, and a power source capacitor 24. And a flyback type switching power supply including a power supply IC 25. Specifically, both ends of the low voltage battery 16 are connected to each other via a primary coil 19a and a voltage control switching element 20. On the other hand, both ends of the secondary coil 19b are connected via a series connection body of a power supply diode 22 and a power supply capacitor 24. The connection point between the secondary coil 19b and the power supply capacitor 24 is connected to the output terminal (emitter) of the switching element S ¥ #, and the connection point between the power supply diode 22 and the power supply capacitor 24 is provided in the drive unit DU. The drive IC 26 is connected to the first terminal T1. In the present embodiment, an electrolytic capacitor is used as the power supply capacitor 24.

  The voltage control switching element 20 is turned on and off by the power supply IC 25. Specifically, the power supply IC 25 turns on and off the voltage control switching element 20 in order to control the output voltage of the insulated power supply to a target voltage (for example, 15 V). In the present embodiment, the insulated power supply including the voltage control switching element 20, the transformer TW, the power supply diode 22, the power supply capacitor 24, and the power supply IC 25 corresponds to the “drive power supply”.

  The drive IC 26 is a single semiconductor integrated circuit made into one chip. The voltage of the first terminal T1 of the drive IC 26 is maintained at a predetermined voltage Vom (for example, 15V) by applying the output voltage of the insulated power supply. The first terminal T1 is connected to the second terminal T2 of the drive IC 26 via a P-channel MOSFET (hereinafter, charging switching element 28). The second terminal T2 is connected to the open / close control terminal (gate) of the switching element S ¥ # via the charging resistor 30. The gate of the switching element S ¥ # is connected to the third terminal T3 of the drive IC 26 via the discharging resistor 32, and the third terminal T3 is an N-channel MOSFET (hereinafter, the discharging switching element 34). To the emitter of the switching element S ¥ #. In the present embodiment, the first terminal T1, the charging switching element 28, the second terminal T2, and the charging resistor are provided from the output side of the insulated power supply (the connection point of the power supply diode 22 and the power supply capacitor 24). The electrical path leading to the gate via 30 corresponds to “charging path Lα”. In the present embodiment, the emitter of the switching element S ¥ # corresponds to “a part having a reference potential different from the output potential of the driving power supply”.

  The gate of the switching element S ¥ # is also connected to the emitter via a fifth terminal T5 of the drive IC 26 and an N-channel MOSFET (hereinafter referred to as a clamping switching element 36). The connection point between the clamp switching element 36 and the fifth terminal T5 is connected to the non-inverting input terminal of the clamp operational amplifier 38, and the inverting input terminal of the clamp operational amplifier 38 is connected to the positive side of the first power supply 40. ing.

  Here, the output voltage of the first power supply 40 (hereinafter referred to as clamp voltage Vclamp) is, for example, a voltage that does not flow a current that causes the reliability of the switching element S ¥ # to decrease excessively in a short time (for example, 12 .5V) is set to a value that limits the applied voltage (gate voltage) of the switching control terminal of the switching element S ¥ #. In the present embodiment, specifically, the clamp voltage Vclamp is a voltage equal to or higher than the threshold voltage Vth at which the switching element S ¥ # switches to the on state, and the output voltage of the insulated power supply (the voltage Vom of the first terminal T1). The voltage is set to less than

  The gate of the switching element S ¥ # is further connected to the emitter via the sixth terminal T6 of the drive IC 26, the soft cutoff resistor 42, and an N-channel MOSFET (hereinafter, soft cutoff switching element 44).

  Switching element S ¥ # is a sense terminal that outputs a minute current (for example, “1/10000” of collector current Ic) having a correlation with a current (hereinafter referred to as collector current Ic) flowing between its input terminal (collector) and emitter. St is provided. The sense terminal St is connected to the emitter via a resistor (sense resistor 46). As a result, a voltage drop occurs in the sense resistor 46 due to a small current output from the sense terminal St. Therefore, the potential on the sense terminal St side of the sense resistor 46 (hereinafter referred to as the sense voltage Vse) has a correlation with the collector current Ic. It can be an electrical state quantity. In the present embodiment, the sense voltage Vse when the potential on the sense terminal St side of both ends of the sense resistor 46 is higher than the potential of the emitter is defined as positive. The emitter potential is set to “0”. In the present embodiment, the sense terminal St and the sense resistor 46 constitute “current detection means”.

  The sense terminal St side of both ends of the sense resistor 46 is connected to the non-inverting input terminal of the comparator 48 via the seventh terminal T7 of the drive IC 26. The inverting input terminal of the comparator 48 is the positive electrode of the second power supply 50. Connected to the side. In the present embodiment, the output voltage of the second power supply 50 (hereinafter, short-circuit threshold SC) is set to the sense voltage Vse corresponding to the collector current Ic when the upper and lower arms are short-circuited. The output signal Sig of the comparator 48 is input to the drive control unit 52 in the drive IC 26. In the present embodiment, the soft cutoff resistor 42, the soft cutoff switching element 44, the comparator 48, the second power source 50, and the drive control unit 52 constitute a “forced off unit”.

  Here, in the present embodiment, the upper and lower arm short circuit when the short circuit threshold SC is set is a situation in which one of the high potential side switching element S ¥ p and the low potential side switching element S ¥ n is short-circuited. , When the other is switched from the off state to the on state, both the switching element S ¥ p and the switching element S ¥ n are turned on, and the flow path of the overcurrent (short circuit current) of the switching element S ¥ # is established. It is formed. Hereinafter, this upper and lower arm short circuit is referred to as “Type 1” upper and lower arm short circuit.

  The output side and gate of the insulated power supply are connected by a bypass path Lβ. Further, the bypass path Lβ and the emitter of the switching element S ¥ # are short-circuited by the first capacitor 54a and the second capacitor 54b, respectively. Here, in the present embodiment, multilayer ceramic capacitors are used as the first capacitor 54a and the second capacitor 54b. In the present embodiment, the first capacitor 54a and the second capacitor 54b correspond to “power storage means”. In the present embodiment, a part of the charging path Lα and the bypass path Lβ is shared.

  A diode 56 as a “connecting means” and a “rectifying element” is provided between the connection point between the first and second capacitors 54 a and 54 b and the gate in the bypass path Lβ. Specifically, in the bypass path Lβ, the anode of the diode 56 is connected to the gate side, and the cathode is connected to the first and second capacitors 54a and 54b.

  Incidentally, in this embodiment, as described above, the charging resistor 30 is provided in the charging path Lα. For this reason, the impedance RLβ of the bypass path Lβ is set lower than the impedance RLα of the charging path Lα.

  Based on the operation signal g ¥ # input via the eighth terminal T8 of the drive IC 26, the drive control unit 52 alternately performs the charging process and the discharging process by operating the charging switching element 28 and the discharging switching element 34. To drive the switching element S ¥ #. Specifically, the charging process is a process of turning off the discharging switching element 34 and turning on the charging switching element 28 when it is determined that the operation signal g ¥ # is an on operation command. On the other hand, the discharging process is a process of switching the discharging switching element 34 to the on operation and switching the charging switching element 28 to the off operation when it is determined that the operation signal g ¥ # is an off operation command. In the present embodiment, the drive control unit 52 constitutes “charging operation means”.

  The drive controller 52 further performs overcurrent protection processing based on the gate voltage Vge, the output signal Sig of the comparator 48, and the like. This process is a process including a clamp process and a soft shut-off process.

  First, the clamp process will be described. This process is performed when the charge process is performed. The clamp filter time Tclamp (for example, fixed) is determined from the timing at which the gate voltage Vge reaches a predetermined voltage Vα (for example, a voltage lower than the mirror voltage). This is a process for operating the clamp switching element 36 by outputting an enable signal to the clamp operational amplifier 38 over time. That is, the clamp process is a process of limiting the gate voltage Vge with the clamp voltage Vclamp before the gate voltage Vge reaches the voltage Vom of the first terminal T1. According to this process, for example, when the upper and lower arms of Type 1 are short-circuited, the collector current Ic flowing through the switching element S ¥ # is limited until the switching element S ¥ # is switched to the OFF state by a soft cutoff process described later. be able to. Incidentally, the clamp filter time Tclamp is, for example, the maximum value of the time from when the gate voltage Vge reaches the predetermined voltage Vα until the sense voltage Vse exceeds the short-circuit threshold value SC when the upper and lower arms of Type 1 are short-circuited. What is necessary is just to set a time a little longer than the addition value with the short circuit filter time Tsc used by the soft interruption | blocking process to perform.

  Subsequently, the soft cutoff process will be described. In this process, it is determined that the logic of the output signal Sig of the comparator 48 is continuously “H” for the short-circuit filter time Tsc (corresponding to “specified time”). In this process, the charging switching element 28 and the discharging switching element 34 are turned off and the soft cutoff switching element 44 is turned on. By executing the soft shut-off process, the switching element S ¥ # is forcibly switched to the off state.

  Note that the short-circuit filter time Tsc is set in order to prevent the soft shut-off process from being erroneously performed due to noise mixed into the output signal Sig of the comparator 48. The soft blocking resistor 42 is provided to increase the resistance value of the discharge path of the gate charge. More specifically, the resistance value Ra of the soft blocking resistor 42 is set higher than the resistance value Rb of the discharging resistor 32. This is a setting in view of the possibility that the surge voltage may become excessive if the speed at which the switching element S ¥ # is switched from the on state to the off state is increased under a situation where the collector current Ic is excessive. It is.

  Incidentally, when the soft shut-off process is performed, the drive control unit 52 performs a process of outputting the fail signal FL and a process of prohibiting the driving of the charging switching element 28 and the discharging switching element 34. The fail signal FL is output to the low voltage system (control device 14) via the ninth terminal T9 of the drive IC 26. The inverter IV is shut down by the fail signal FL.

  By the way, unlike the above-described mechanism, the upper and lower arm short circuit is also caused by the mechanism described below. Specifically, in a situation where one of the high-potential side switching element S ¥ p and the low-potential side switching element S ¥ n is in a full-on state, a short-circuit failure occurs in the other, and the upper and lower arms are short-circuited. Hereinafter, this upper and lower arm short circuit is referred to as “Type 2” upper and lower arm short circuit.

  Note that the full-on state of the switching element S ¥ # is a state where the gate voltage Vge is sufficiently higher than the threshold voltage Vth, and more specifically, a voltage where the gate voltage Vge is higher than the clamp voltage Vclamp. It is a state that becomes. In particular, in the present embodiment, the full-on state is a state where the gate voltage Vge is in the vicinity of the output voltage of the insulated power supply (the voltage Vom of the first terminal T1), or a state where the gate voltage Vge is equal to or higher than the voltage Vom.

  Next, the upper and lower arm short circuit of Type 2 will be described with reference to FIGS. 3 and 4.

  First, FIG. 3 shows changes in the gate voltage Vge, the collector current Ic, the collector-emitter voltage Vce, and the sense voltage Vse. FIG. 3 illustrates a case where the upper and lower arms of Type 2 are short-circuited due to a short-circuit failure in the high-potential side switching element S ¥ p in a state where the low-potential side switching element S ¥ n is in a full-on state. ing.

  As shown in the figure, when the switching element S ¥ p on the high potential side short-circuits at time t1, a short circuit current starts to flow through the switching elements S ¥ p and S ¥ n on the high potential side and the low potential side. Due to the flow of the short-circuit current, the collector-emitter voltage Vce of the switching element S ¥ n on the low potential side increases. As a result, a current flows from the collector of the low potential side switching element S ¥ n to the gate via the feedback capacitance Cres (see FIG. 4) of the low potential side switching element S ¥ n, and the low potential side switching element S The phenomenon that the gate voltage Vge of ¥ n rises occurs. When this phenomenon occurs, the collector current Ic further increases, and the reliability of the switching element S ¥ p on the high potential side and the switching element S ¥ n on the low potential side decreases. FIG. 3 shows that the switching element S ¥ n on the low potential side also short-circuits at time t2 due to further increase in the collector current Ic.

  In order to cope with such a problem, in the present embodiment, as shown in FIG. 2, the bypass path Lβ and the diode 56 are provided in the drive unit DU. According to such a configuration, as shown in FIG. 5, the gate voltage Vge is equal to the voltage Vom of the first terminal T1 and the forward voltage drop amount of the diode 56 even when Type 2 upper and lower arm short circuit occurs at time t1. When the sum is equal to or greater than the added value of Vf, a current can flow from the gate to the first and second capacitors 54a and 54b via the bypass path Lβ. For this reason, an increase in the gate voltage Vge of the switching element S ¥ n on the low potential side can be suppressed. Then, while suppressing an increase in the gate voltage Vge, the switching elements S ¥ p and S ¥ n on the high potential side and the low potential side can be forcibly switched to the off state by the soft cutoff process. FIG. 5 corresponds to FIG.

  According to the embodiment described in detail above, the following effects can be obtained.

  (1) The output side of the insulated power supply and the gate of the switching element S ¥ # are connected by a bypass path Lβ, and a diode 56 is provided in the bypass path Lβ. One end of each of the first and second capacitors 54a and 54b is connected to the output side of the insulated power supply from the diode 56 in the bypass path Lβ, and the other ends of the capacitors 54a and 54b are connected to the emitter. According to such a configuration, even when the upper and lower arms of Type 2 are short-circuited, an increase in the gate voltage Vge of the switching element in the full-on state can be suitably suppressed. Thereby, a decrease in the reliability of the switching element S ¥ # can be avoided.

  In particular, in the present embodiment, current flow in the direction from the output side of the insulated power supply to the gate can be blocked by the diode 56 in the bypass path Lβ. For this reason, when the gate charging process is performed, a situation where the gate is charged by the bypass path Lβ can be avoided. Thereby, it is possible to avoid an increase in the charge rate of the gate charge, and it is also possible to avoid an increase in surge voltage caused by switching of the switching element S ¥ # to the ON state.

  Furthermore, in the present embodiment, by using the diode 56, it is possible to suppress an increase in the gate voltage Vge when the upper and lower arms of Type 2 are short-circuited without the energization operation by the drive control unit 52.

  (2) The impedance RLβ of the bypass path Lβ is set lower than the impedance RLα of the charging path Lα. According to such a configuration, when the current flowing into the gate through the feedback capacitor flows through the bypass path Lβ, the voltage drop amount in the bypass path Lβ can be reduced. For this reason, when the upper and lower arms of Type 2 are short-circuited, the amount of increase in the gate voltage Vge can be more suitably suppressed.

  (3) In the drive unit DU, a bypass path Lβ is provided outside the drive IC 26. According to such a configuration, it is possible to avoid a decrease in the reliability of the drive IC 26 due to heat generation due to current flowing through the bypass path Lβ.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  As shown in FIG. 6, in the present embodiment, a P-channel MOSFET (hereinafter referred to as connection switching element 58) is provided in the bypass path Lβ instead of the diode. The connection switching element 58 is turned on and off by the drive control unit 52. Here, FIG. 6 is a configuration diagram of the drive unit DU and the like according to the present embodiment. In FIG. 6, the same members as those shown in FIG. 2 are given the same reference numerals for the sake of convenience.

  Next, the gate bypass process according to the present embodiment will be described. This process is a process for connecting the gate and the first and second capacitors 54a and 54b by the bypass path Lβ only when the switching element S ¥ # is in the full-on state.

  FIG. 7 shows the procedure of the gate bypass process. This process is repeatedly executed by the drive control unit 52 at a predetermined cycle, for example. Since the drive control unit 52 according to the present embodiment is hardware, the processing shown in FIG. 7 is actually executed by a logic circuit.

  In this series of processing, first, in step S10, it is determined whether or not the operation signal g ¥ # is an ON operation command.

  If an affirmative determination is made in step S10, the process proceeds to step S12 to determine whether or not the gate voltage Vge is equal to or higher than the specified voltage Vβ. Here, in the present embodiment, the specified voltage Vβ is set to a voltage (for example, 13 to 14 V) that is slightly lower than the voltage Vom of the first terminal T1. This process is a process for determining whether or not the switching element S ¥ # is in a full-on state.

  If it is determined in step S12 that the full-on state has not been established, or if it is determined in step S10 that the operation signal g ¥ # is an off-operation command, the process proceeds to step S14, and the connection switching element 58 is turned on. Turn off. Thereby, in the bypass path Lβ, the space between the first and second capacitors 54a, 54b and the gate is turned off (opened).

  On the other hand, if an affirmative determination is made in step S12, the process proceeds to step S16 to turn on the connection switching element 58. As a result, between the first and second capacitors 54a and 54b and the gate is turned on (closed) in the bypass path Lβ.

  In addition, when the process of step S14, S16 is completed, this series of processes is once complete | finished.

  Incidentally, in this embodiment, the drive control unit 52 that turns on and off the connection switching element 58 constitutes a “connection operation unit”.

  In the present embodiment described above, the on-resistance of the connection switching element 58 is lower than the forward voltage drop amount of the diode. For this reason, compared with the structure of the said 1st Embodiment, the amount of voltage drops in bypass path L (beta) can be made smaller. Thereby, when the upper and lower arms of Type 2 are short-circuited, the increase amount of the gate voltage Vge can be further suppressed.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the second embodiment.

  In the present embodiment, a configuration in which a part of the bypass path is provided in the drive IC 26 is employed.

  FIG. 8 shows the configuration of the drive unit DU and the like according to this embodiment. In FIG. 8, the same members as those shown in FIG. 6 are given the same reference numerals for the sake of convenience.

  As shown in the figure, the output side of the insulated power supply is connected to the first terminal T <b> 1 via the charging resistor 60. The first terminal T1 is connected to the gate of the switching element S ¥ # via a P-channel MOSFET (hereinafter, charging switching element 62) and the second terminal T2. The connection point between the output side of the insulated power supply and the charging resistor 60 is connected to one end of the resistor 64 through the tenth terminal T10 of the drive IC 26. The other end of the resistor 64 is connected to the emitter of the switching element S ¥ # via a constant current power supply 66. In the present embodiment, the electric path from the output side of the insulated power supply to the gate via the charging resistor 60, the first terminal T1, the charging switching element 62, and the second terminal T2 is “charging path Lα. Is equivalent to.

  The connection point between the constant current power supply 66 and the resistor 64 is connected to the non-inverting input terminal of the constant current operational amplifier 68, and the inverting input terminal of the constant current operational amplifier 68 is connected to the first terminal T1. The output terminal of the constant current operational amplifier 68 is connected to the gate of the charging switching element 62. According to such a configuration, the potential of the first terminal T1 can be maintained at the potential of the connection point between the constant current power supply 66 and the resistor 64, and the gate charging current can be set to a constant value. That is, the gate of the switching element S ¥ # can be charged by constant current control.

  In the present embodiment, in the drive IC 26, the second terminal T2 and the eleventh terminal T11 are connected by a connection switching element 70 as “connecting means”. The eleventh terminal T11 is connected to the output side of the insulated power supply from the charging resistor 60 in the charging path Lα. Here, in the present embodiment, the electrical path from the gate to the output side of the insulated power supply via the second terminal T2, the connection switching element 70, and the eleventh terminal T11 constitutes a “bypass path Lγ”. In the present embodiment, a part of the charging path Lα and the bypass path Lγ is shared.

  Incidentally, in this embodiment, as described above, the charging resistor 60 is provided in the charging path Lα. For this reason, the impedance RLγ of the bypass path Lγ is set lower than the impedance RLα of the charging path Lα.

  In the charging process of the drive control unit 52, when it is determined that the operation signal g ¥ # is an on operation command, the discharge switching element 34 is turned off, and an enable signal is output to the constant current operational amplifier 68. Thus, the charging switching element 62 is operated. On the other hand, in the discharging process, when it is determined that the operation signal g ¥ # is an off operation command, the discharging switching element 34 is turned on, and the output of the enable signal is stopped to stop the charging switching element 34 This is a process of switching 62 to the off operation.

  The gate bypass process according to the present embodiment can be performed by turning on / off the connection switching element 70 by the same process as the process shown in FIG. 7 of the second embodiment.

  According to this embodiment described above, in addition to the effects (1) and (2) described in the first embodiment, the following effects can be obtained.

  (4) A part of the bypass path Lγ is provided in the drive IC 26. For this reason, it is not necessary to provide an element outside the drive IC 26. As a result, space saving of the drive unit DU can be achieved, and as a result, an increase in cost of the drive unit DU can be avoided.

(Fourth embodiment)
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In this embodiment, a series regulator is provided in the insulated power supply.

  FIG. 9 shows the configuration of the drive unit DU and the like according to this embodiment. In FIG. 9, the same members as those shown in FIG. 2 are given the same reference numerals for the sake of convenience.

  As shown in the figure, the insulated power supply includes a series regulator 72. The series regulator 72 includes a bipolar transistor 72a. Specifically, the collector of the bipolar transistor 72a is connected to the connection point of the power supply diode 22 and the power supply capacitor 24, and the emitter of the bipolar transistor 72a is connected to one end of the bypass path Lβ. In the present embodiment, the output side of the insulated power supply is the collector side of the bipolar transistor 72a in the insulated power supply.

  The bipolar transistor 72 a is operated by the drive control unit 52. The drive controller 52 operates the bipolar transistor 72a to control the output voltage of the series regulator 72 to a target voltage (for example, 15V).

  Next, the technical significance of providing the series regulator 72 will be described.

  The output voltage of the isolated power supply can vary. In this case, the gate voltage Vge also varies. Here, when the upper and lower arms of Type 2 are short-circuited, the short-circuit current is further increased when the gate voltage Vge is increased due to the fluctuation of the gate voltage Vge. On the other hand, by providing the series regulator 72 in the insulated power supply, fluctuations in the output voltage of the insulated power supply can be suppressed. For this reason, when the upper and lower arm short circuit of Type2 arises, the fall of the reliability of switching element S ¥ # can be avoided more suitably.

(Fifth embodiment)
Hereinafter, a fifth embodiment will be described with reference to the drawings, focusing on differences from the first embodiment.

  In the present embodiment, the short circuit filter time Tsc in the soft cutoff process is variably set.

  FIG. 10 shows the procedure of the soft shutoff process according to this embodiment. This process is repeatedly executed by the drive control unit 52 at a predetermined cycle, for example. Since the drive control unit 52 according to the present embodiment is hardware, the process shown in FIG. 10 is actually executed by a logic circuit.

  In this series of processes, first, in step S20, it is determined whether or not the gate voltage Vge is equal to or higher than a specified voltage Vβ. This process is a process for determining whether or not the switching element S ¥ # is in a full-on state.

  If a negative determination is made in step S20, the process proceeds to step S22, and the short-circuit filter time Tsc is set to the first time Tsc1.

  On the other hand, if an affirmative determination is made in step S20, the process proceeds to step S24, and the short-circuit filter time Tsc is set to a second time Tsc2 that is shorter than the first time Tsc1.

  When the processes of steps S22 and S24 are completed, the process proceeds to step S26, and it is determined whether or not the logic of the output signal Sig of the comparator 48 continues to be “H” for the short circuit filter time Tsc. When an affirmative determination is made in step S26, the process proceeds to step S28, the soft shut-off switching element 44 is switched on, and the charge switching element 28, the discharge switching element 34, and the clamp switching element 36 are turned off. Switch to. Also, a process of outputting a fail signal FL is performed. Incidentally, when the clamping process has been completed, it is not necessary to perform the process of switching the clamping switching element 36 to the off operation in this step.

  If a negative determination is made in step S26, or if the process in step S28 is completed, this series of processes is temporarily terminated.

  Next, FIG. 11 and FIG. 12 show an example of the soft blocking process according to the present embodiment. 11 and 12, (a) shows the transition of the gate voltage Vge, (b) shows the transition of the sense voltage Vse, and (c) shows the transition of the operating state of the soft cutoff switching element 44. Show.

  First, with reference to FIG. 11, the soft cutoff process when the upper and lower arms of Type 1 are short will be described.

  As illustrated, at time t1, the gate voltage Vge starts to increase due to the charging process. Thereby, thereafter, the collector current Ic starts to increase, and the sense voltage Vse also starts to increase.

  Thereafter, at time t2, it is determined that the gate voltage Vge has reached the short-circuit threshold value SC, so that it is determined that the logic of the output signal Sig of the comparator 48 has become “H”. Thereafter, at the time t3 when it is determined that the logic of the output signal Sig is continuously “H” for the first time Tsc1, the soft cutoff switching element 44 is switched to the ON operation. As a result, the switching element S * # is forcibly switched to the off state.

  Next, with reference to FIG. 12, the soft cutoff process when the upper and lower arm shorts of Type 2 occur will be described.

  As illustrated, at time t1, the gate voltage Vge starts to increase due to the charging process. Thereafter, at time t2, when it is determined that the gate voltage Vge has reached the predetermined voltage Vα, the clamping process is started. The crank process is then executed until time t3.

  When the clamping process is completed, the switching element S ¥ # is then brought into a full-on state. Thereafter, at time t4, it is determined that the gate voltage Vge has reached the short-circuit threshold SC, so that the logic of the output signal Sig of the comparator 48 is determined to be “H”. Thereafter, at time t5 when it is determined that the logic level of the output signal Sig remains “H” for the second time Tsc2, the soft cutoff switching element 44 is switched to the ON operation. As a result, the switching element S * # is forcibly switched to the off state.

  As described above, in the present embodiment, when the switching element S ¥ # is in the full-on state, the short circuit filter time Tsc is shortened from the first time Tsc1 to the second time Tsc2. For this reason, switching element S ¥ # can be switched to the off state as soon as possible after the short-circuit current is detected. As a result, a decrease in the reliability of the switching element S ¥ # can be more preferably avoided.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  The operation method of the “connection switching element” is not limited to the one exemplified in the second embodiment. For example, a method may be employed in which the connection switching element 58 is turned on after a predetermined time has elapsed since the operation signal g ¥ # input to the drive control unit 52 is switched to the on operation command.

  In the second and third embodiments, the “connection switching element” is not limited to the MOSFET but may be a bipolar transistor, for example.

  -"Current detection means" is not restricted to what was illustrated to said each embodiment. For example, the drive unit may be provided with voltage detection means (voltage sensor) for detecting the collector-emitter voltage Vce, and the collector current may be detected based on the detection value of the voltage sensor.

  In the first embodiment, the “rectifying element” is not limited to the diode. In short, any other element may be used as long as it has the same function as the diode.

  The “part having the reference potential” to which one end of the capacitor as the “storage means” is connected is not limited to the emitter. For example, it may be a part having a higher potential than the output potential of the driving power supply (the voltage Vom of the first terminal T1). Even in this case, if the potential difference between the terminals of the capacitor is stabilized due to the stabilization of the reference potential, an increase in the gate voltage Vge when the upper and lower arms of Type 2 are short-circuited can be suppressed.

  The number of capacitors as “power storage means” connected to the bypass path is not limited to two, but may be other numbers. Further, the “power storage means” is not limited to a capacitor. In short, any other means may be used as long as it is capable of accumulating charges and has a function similar to that of a capacitor.

  The “driven switching element” is not limited to the IGBT, but may be a MOSFET, for example. The “drive power supply” is not limited to an insulated power supply, and may be another power supply.

  DESCRIPTION OF SYMBOLS 20 ... Switching element for voltage control, 22 ... Power supply diode, 24 ... Power supply capacitor, TW ... Transformer, S ¥ # ... Switching element, Lα ... Charging path, Lβ ... Bypass path, 54a, 54b ... First, second Capacitor of 56 ... diode.

Claims (10)

A charge path (Lα) for connecting the open / close control terminal of the drive target switching element (S ¥ #) and the drive power supply (TW, 20, 22, 24, 25) and charging the open / close control terminal;
A bypass path (Lβ; Lγ) connecting the open / close control terminal and the driving power source;
Power storage means (54a, 54b) capable of accumulating charge, one end connected to the bypass path and the other end connected to a portion having a reference potential different from the output potential of the driving power supply;
A drive circuit for a drive target switching element.   The connection means (56; 58; 70) which is provided in the bypass path and connects the power storage means and the open / close control terminal when the driving target switching element is in a full-on state. The drive circuit of the drive target switching element according to 1.   The connection means includes a rectifying element (56) that allows a current flow in a direction from the open / close control terminal to the driving power supply and prevents a current flow in a reverse direction. The drive circuit of the drive object switching element of description. The connecting means includes
A switching element for connection (58; 70) for turning on and off the bypass path;
Connection operation means (52) for turning on the connection switching element when the drive target switching element is in a full-on state;
The drive circuit for a drive target switching element according to claim 2, comprising:   5. The drive circuit of the drive target switching element according to claim 1, wherein the impedance of the bypass path is set lower than the impedance of the charging path. 6. A charging switching element (28) provided in the charging path for turning on and off the charging path;
Charging operation means (52) for operating the charging switching element;
An integrated circuit (26) having the charging switching element and the charging operation means;
Further comprising
The drive circuit of the drive target switching element according to claim 1, wherein the bypass path (Lβ) is provided outside the integrated circuit. A charging switching element (62) provided in the charging path for turning on and off the charging path;
Charging operation means (52) for operating the charging switching element;
An integrated circuit (26) having the charging switching element and the charging operation means;
Further comprising
The drive circuit of the drive target switching element according to claim 1, wherein a part of the bypass path (Lγ) is provided in the integrated circuit.   The drive circuit for a drive target switching element according to any one of claims 1 to 7, wherein the drive power supply further includes a series regulator (72). Current detection means (St, 46) for detecting a current flowing between the input and output terminals of the drive target switching element;
Compulsory off means (42, 44, 48, 50, 52) forcibly switching the drive target switching element to the off state on condition that the current detected by the current detection means has exceeded the threshold value for a specified time. )When,
Further comprising
9. The drive circuit for a drive target switching element according to claim 1, wherein the forced-off means shortens the specified time when the drive target switching element is in a full-on state. 10. .   The driving target switching element includes a series connection body of a high-potential side switching element (S ¥ p) and a low-potential side switching element (S ¥ n) connected in parallel to the DC power source (12). The drive circuit of the drive object switching element of any one of Claims 1-9 to do.