JP7283334B2 - switch drive circuit - Google Patents

Description

The present invention relates to a drive circuit for a switch.

As a drive circuit of this type, for example, as disclosed in Japanese Unexamined Patent Application Publication No. 2002-200010, there is known one having a Desat type detection function for detecting an overcurrent flowing through a switch such as an IGBT. Specifically, this drive circuit comprises a diode, a capacitor and a current supply. The diode has its cathode connected to the high terminal of the switch. A capacitor connects the anode of the diode to the ground connected to the low-potential terminal of the switch. The current supply unit starts supplying the current to the capacitor at the timing when the filter time has passed since the charging of the gate of the switch was started. The drive circuit determines that an overcurrent is flowing through the switch when the voltage of the capacitor exceeds the threshold when the switch is turned on.

The reason why the filter time is provided in the desaturation method detection function is that an overcurrent is flowing in the middle of the period when the switch is switched from the off state to the on state, even though there is no overcurrent flowing through the switch. This is to prevent erroneous determination that

WO2014/115272

The turn-on speed of the switch varies due to individual differences and operating states of the switch and drive circuit. In this case, in order to accurately prevent an erroneous determination that an overcurrent is flowing, it is conceivable to set the filter time longer according to the lower one of the variation range of the turn-on speed. However, in this case, for the configuration corresponding to the higher turn-on speed variation range, the filter time is set to be longer than the appropriate time, so that it can be quickly determined that an overcurrent is flowing. I am worried that I won't be able to. In this case, the short-circuit energy generated during the period from when the overcurrent starts to flow through the switch to when the switch shifts to protective operation may exceed the short-circuit resistance of the switch.

SUMMARY OF THE INVENTION The present invention provides a switch drive circuit that can rapidly determine that an overcurrent is flowing while preventing an erroneous determination that an overcurrent is flowing even when the turn-on speed of the switch varies. The main purpose is to provide

The present invention provides a switch drive circuit for driving a switch,
a diode whose cathode is connected to the high potential side terminal of the switch;
a current supply unit that starts supplying a current to a capacitance unit formed between a low-potential terminal of the switch and an anode of the diode at a timing after the filter time has passed since charging of the gate of the switch is started; ,
a determining unit that determines that an overcurrent is flowing through the switch when the voltage of the capacitive unit exceeds the threshold when the switch is turned on;
a setting unit configured to set the filter time shorter when the switch turn-on speed is high than when the switch turn-on speed is low.

In the present invention, the filter time is set shorter when the switch turn-on speed is high than when the switch turn-on speed is low. That is, when the turn-on speed is high, the current supply start timing from the current supply unit to the capacitor unit is earlier than when the turn-on speed is low. As a result, even if the turn-on speed of the switch varies, it is possible to quickly determine that an overcurrent is flowing while preventing erroneous determination that an overcurrent is flowing.

1 is an overall configuration diagram of a control system for a rotating electric machine according to a first embodiment; FIG. The figure which shows a drive circuit. 4 is a time chart showing changes in determination voltage and the like when overcurrent does not flow; FIG. 2 is a time chart showing changes in determination voltage and the like when an overcurrent flows; FIG. 4 is a flowchart showing the procedure of overcurrent detection processing; 4 is a flowchart showing the procedure of filter time setting processing; 4 is a time chart showing how the filter time is set when the turn-on speed is low; 4 is a time chart showing how the filter time is set when the turn-on speed is high; FIG. 11 is a flowchart showing the procedure of filter time setting processing according to the second embodiment; FIG. FIG. 11 is a flowchart showing the procedure of filter time setting processing according to the third embodiment; FIG. FIG. 11 is a flowchart showing the procedure of filter time setting processing according to the fourth embodiment; FIG. FIG. 12 is a flowchart showing the procedure of filter time setting processing according to the fifth embodiment; FIG. 4 is a time chart showing how the filter time is set when the turn-on speed is low; 4 is a time chart showing how the filter time is set when the turn-on speed is high; FIG. 12 is a flowchart showing the procedure of filter time setting processing according to the sixth embodiment; FIG. FIG. 12 is a flowchart showing the procedure of filter time setting processing according to the seventh embodiment; FIG. FIG. 12 is a flowchart showing the procedure of filter time setting processing according to the eighth embodiment; FIG. 4 is a time chart showing how the filter time is set when the turn-on speed is low; 4 is a time chart showing how the filter time is set when the turn-on speed is high; FIG. 21 is a flowchart showing the procedure of filter time setting processing according to the ninth embodiment; FIG. FIG. 12 is a flowchart showing the procedure of filter time setting processing according to the tenth embodiment; FIG. The figure which shows the drive circuit based on 11th Embodiment. 4 is a time chart showing how the output current of the constant current power supply is set; 4 is a time chart showing how the output current of the constant current power supply is set; FIG. 21 is a functional block diagram of a drive control unit according to a twelfth embodiment; FIG. 21 is a functional block diagram of a drive control unit according to a thirteenth embodiment;

<First embodiment>
DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment embodying a drive circuit according to the present invention will be described below with reference to the drawings.

As shown in FIG. 1, the control system includes a rotating electrical machine 10, an inverter 20, and a control device 25 that controls the rotating electrical machine 10. As shown in FIG. In this embodiment, the rotating electrical machine 10 includes a three-phase winding 11 that is star-connected. The control system of this embodiment is mounted on a vehicle. The rotor of the rotating electric machine 10 is connected to drive wheels of the vehicle so as to allow power transmission. The rotary electric machine 10 is, for example, a synchronous machine.

The rotating electric machine 10 is connected to a DC power supply 21 via an inverter 20 . In this embodiment, the DC power supply 21 is a secondary battery. A smoothing capacitor 22 is provided between the DC power supply 21 and the inverter 20 .

The inverter 20 includes a series connection body of an upper arm switch SWH and a lower arm switch SWL for each of the U, V, and W phases. In this embodiment, SiC N-channel MOSFETs are used as the switches SWH and SWL. The upper arm switch SWH incorporates an upper arm diode DH as a body diode, and the lower arm switch SWL incorporates a lower arm diode DL as a body diode. In each of the switches SWH and SWL of this embodiment, the high potential side terminal is the drain and the low potential side terminal is the source.

A first end of the winding 11 is connected to a connection point between the source of the upper arm switch SWH and the drain of the lower arm switch SWL in each phase. A second end of each phase winding 11 is connected at a neutral point.

The control device 25 drives the switches SWH and SWL of the inverter 20 in order to control the control amount of the rotating electric machine 10 to the command value. The controlled variable is, for example, torque. In order to alternately turn on the upper and lower arm switches SWH and SWL with a dead time in between, the control device 25 outputs drive signals INH and INL corresponding to the upper and lower arm switches SWH and SWL to the upper and lower arm switches. The signals are output to upper and lower arm driving circuits DrH and DrL provided individually for SWH and SWL. The drive signal takes either an ON command for instructing switching to the ON state of the switch or an OFF command for instructing switching to the OFF state.

Next, the drive circuit will be described with reference to FIG. The drive circuits DrH and DrL of this embodiment basically have the same configuration. Hereinafter, for convenience of explanation, the symbols of the drive circuits DrH and DrL are simply described as Dr, the symbols of the switches SWH and SWL are simply described as SW, and the symbols of the drive signals INH and INL are simply described as IN. or

The drive circuit Dr includes a constant voltage power supply 30, a charging switch 31, a charging resistor 32, a discharging resistor 33 and a discharging switch . A gate of a switch SW is connected to the constant voltage power source 30 via a charging switch 31 and a charging resistor 32 . In this embodiment, a P-channel MOSFET is used as the charge switch 31 and an N-channel MOSFET is used as the discharge switch 34 . Note that Vom in FIG. 2 indicates the output voltage of the constant voltage power supply 30 .

The source of the switch SW (corresponding to the ground portion) is connected to the gate of the switch SW via the discharge resistor 33 and the discharge switch 34 .

The drive circuit Dr includes a soft cutoff resistor 35 and a soft cutoff switch 36 . In this embodiment, an N-channel MOSFET is used as the soft cutoff switch 36 . The resistance value of the soft cut-off resistor 35 is made larger than the resistance value of the discharge resistor 33 . The source of the switch SW is connected to the gate of the switch SW via the soft cutoff resistor 35 and the soft cutoff switch 36 .

The switch SW has a sense terminal St. A minute current having a correlation with the drain current of the switch SW flows through the sense terminal St. A first end of the sense resistor 37 is connected to the sense terminal St, and a second end of the sense resistor 37 is connected to the source of the switch SW. According to this configuration, a voltage drop occurs in the sense resistor 37 due to a minute current flowing through the sense terminal St. Therefore, the potential difference of the sense resistor 37 (hereinafter referred to as sense voltage Vse) can be used as the correlation value of the drain current. In this embodiment, the sense voltage Vse is defined as positive when the potential at the first end of the sense resistor 37 is higher than the potential at the second end.

The drive circuit Dr includes a diode 40 , a constant voltage power supply 41 , a constant current power supply 42 , a supply switch 43 , a capacitor 44 , a reset switch 45 and an electric path 46 . In the present embodiment, the capacitor 44 corresponds to the capacity section, and the constant voltage power supply 41, constant current power supply 42 and supply switch 43 correspond to the "current supply section".

The cathode of the diode 40 is connected to the drain of the switch SW. An electrical path 46 is connected to the anode of diode 40 . A constant current power supply 42 is connected to the electric path 46 via a supply switch 43 . The constant current power supply 42 has a function of supplying power from the constant voltage power supply 41 and outputting a constant current.

A first end of a capacitor 44 is connected to the electrical path 46 and a source of a switch SW is connected to a second end of the capacitor 44 . A source of the switch SW is connected to the electric path 46 via the reset switch 45 .

The drive circuit Dr has a comparator 47 and a power supply 48 . The non-inverting input terminal of the comparator 47 receives the determination voltage Vdeast, which is the voltage across the terminals of the capacitor 44 . The inverting input terminal of the comparator 47 receives the overcurrent threshold value Vα, which is the output voltage of the power supply 48 . The output signal Sig of the comparator 47 is input to the drive control section 50 provided in the drive circuit Dr.

The drive control unit 50 is mainly composed of an IC, for example. The drive control unit 50 has a gate voltage detection circuit 51 , a sense voltage detection circuit 52 and a temperature detection circuit 53 . The gate voltage detection circuit 51 detects the gate voltage Vgs of the switch SW, and the sense voltage detection circuit 52 detects the sense voltage Vse. The temperature detection circuit 53 detects the temperature TD of the switch SW based on the output signal of the temperature sensitive diode 38 arranged near the switch SW. A thermistor may be arranged near the switch SW instead of the temperature sensitive diode 38 .

The drive control unit 50 acquires the drive signal IN output from the control device 25 . When the drive control unit 50 determines that the acquired drive signal IN is the ON command, the drive control unit 50 switches the switch SW to the ON state by the charging process. The charging process is a process of turning on the charging switch 31 and turning off the discharging switch 34 . According to the charging process, the gate voltage of the switch SW becomes equal to or higher than its threshold voltage Vth, and the switch SW is turned on.

When the drive control unit 50 determines that the drive signal IN is an OFF command, the drive control unit 50 switches the switch SW to the OFF state by performing discharge processing. The discharging process is a process of turning off the charging switch 31 and turning on the discharging switch 34 . According to the discharge process, the gate voltage of the switch SW becomes less than the threshold voltage Vth, and the switch SW is turned off.

The functions provided by the drive control unit 50 can be provided by, for example, software recorded in a physical memory device, a computer executing the software, hardware, or a combination thereof.

The drive control unit 50 performs overcurrent detection processing when charging processing is being performed. This process will be described below with reference to FIGS. 3 and 4, taking the lower arm drive circuit DrL as an example.

FIG. 3 shows a case where no overcurrent flows through the switch SW. 3(a) shows the transition of the drive signal IN input to the drive circuit Dr, FIG. 3(b) shows the transition of the gate voltage Vgs of the switch SW, and FIG. 3(c) shows the drain current Ids of the switch SW. shows the transition of FIG. 3(d) shows transition of the determination voltage Vdeast, and FIG. 3(e) shows transition of the voltage Vds between the drain and the source of the switch SW.

At time t1, it is determined that the switch has been made to the ON command, and the charging process is started. This causes the gate voltage Vgs to start rising. Thereafter, at time t2 after the filter time tf has elapsed from time t1, the supply switch 43 is switched to ON while the reset switch 45 is kept OFF. As a result, current starts to be supplied from the constant current power supply 42 to the capacitor 44 . As a result, the determination voltage Vdeast starts rising from zero. In the example shown in FIG. 3, since overcurrent does not flow, the determination voltage Vdeast does not rise to the overcurrent threshold value Vα.

FIG. 4 shows a case where an overcurrent flows through the switch SW. Specifically, when a short-circuit failure occurs in the upper arm switch SWH as the opposing arm switch, the lower arm switch SWL as the own arm switch is switched to the ON state, and the upper and lower arm switches SWH and SWL are switched to the short-circuit current. is flowing. 4A to 4E correspond to FIGS. 3A to 3E.

At time t1, it is determined that the switch has been made to the ON command, and the charging process is started. This causes the gate voltage Vgs to start rising. Thereafter, at time t2 after the filter time tf has elapsed from time t1, the supply switch 43 is switched to ON while the reset switch 45 is kept OFF. As a result, the determination voltage Vdeast starts rising from zero.

In the example shown in FIG. 4, since an overcurrent (short-circuit current) flows, the determination voltage Vdeast reaches the overcurrent threshold value Vα at time t3 thereafter. As a result, the logic of the output signal Sig of the comparator 47 is switched to H, and the drive control unit 50 determines that overcurrent is flowing, and performs soft cutoff processing. A short-circuit current also flows when a short-circuit failure occurs in the upper arm switch SWH while the lower arm switch SWL is in the ON state.

FIG. 5 shows the procedure of overcurrent detection processing. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle.

In step S10, it is determined whether or not the drive signal IN has switched from the OFF command to the ON command.

When an affirmative determination is made in step S10, the process proceeds to step S11, and charging processing is performed in which the charging switch 31 is turned on and the discharging switch 34 is turned off. Also, the soft cutoff switch 36 is turned off.

In step S12, the process waits until it is determined that the filter time tf has elapsed since the affirmative determination was made in step S10. That is, in the present embodiment, the elapsed time after the start of charging the gate of the switch SW is counted as the elapsed time after the driving signal IN is switched to the ON command.

When an affirmative determination is made in step S12, the process proceeds to step S13, and the supply switch 43 is turned on. As a result, current starts to be supplied from the constant current power supply 42 to the capacitor 44 .

In step S14, it is determined whether or not the logic of the output signal Sig of the comparator 47 is L. The processing of step S14 corresponds to the determination unit.

When it is determined that the logic is L in step S14, the process proceeds to step S15 to determine whether or not the drive signal IN has been switched from the ON command to the OFF command. If it is determined in step S15 that the ON command is still issued, the process proceeds to step S14.

On the other hand, if it is determined that the command has been switched to the OFF command in step S15, or if a negative determination is made in step S10, the process advances to step S16 to perform discharge processing in which the charge switch 31 is turned off and the discharge switch 34 is turned on. . Also, the supply switch 43 is switched to OFF drive. Note that the reset switch 45 is temporarily turned on to reset the determination voltage Vdeast to 0 during the period in which the drive signal IN is an OFF command.

When it is determined in step S14 that the logic of the output signal Sig of the comparator 47 is H, it is determined that an overcurrent is flowing, and the process proceeds to step S17. In step S17, a soft cutoff process is performed in which the charge switch 31 and the discharge switch 34 are turned off, and the soft cutoff switch 36 is turned on. As a result, the switch SW is turned off while suppressing the surge voltage that occurs when the switch SW is turned off.

In subsequent step S18, the logic of the fail signal FL is switched. For example, in this embodiment, it switches from L to H. The fail signal FL is notified to the controller 25 . By switching the logic of the fail signal FL, the control device 25 can grasp that an overcurrent is flowing through the switch SW. When the control device 25 determines that an overcurrent is flowing based on the input fail signal FL, the control device 25 turns on and off the switches of the inverter 20 of the phases in which the overcurrent is not flowing to 10 rotor may be rotated to carry out evacuation travel of the vehicle.

Next, FIG. 6 shows the procedure for setting the filter time tf used in step S12 in the overcurrent detection process. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle.

In step S20, it is determined whether or not the drive signal IN has been switched from the OFF command to the ON command.

When an affirmative determination is made in step S20, the process proceeds to step S21, and the rate of increase dVgst of the gate voltage Vgs is calculated based on the detected gate voltage Vgs.

In step S22, the higher the calculated rising speed dVgst is, the shorter the filter time tf is set when the charging process is performed next time, that is, in the next switching cycle. This setting is based on the fact that the turn-on speed of the switch SW increases as the rising speed dVgst increases. Filter time tf may be set, for example, based on map information in which filter time tf and rising speed dVgst are associated. This map information is stored in a memory as a storage unit provided in the drive circuit Dr. The memory is a non-transitional substantive recording medium other than ROM (for example, non-volatile memory other than ROM). It should be noted that in the present embodiment, the processing of steps S21 and S22 corresponds to the setting section.

Next, setting modes of the filter time tf when the turn-on speed of the switch SW is low and when it is high will be described with reference to FIGS. 7 and 8. FIG.

First, the case where the turn-on speed is low will be described with reference to FIG. FIGS. 7A to 7E correspond to FIGS. 3A to 3E.

The charging process starts at time t1, and the gate voltage Vgs begins to rise. After that, at time t2, the gate voltage Vgs reaches the mirror voltage Vmil of the switch SW. After the gate voltage Vgs reaches the mirror voltage Vmil, the drain-source voltage Vds drops to a value close to 0V. During the period from time t1 to t2, the rising speed dVgst is calculated based on the gate voltage Vgs. In FIG. 7, Tmil indicates the period in which the gate voltage Vgs is set to the mirror voltage Vmil (hereinafter referred to as the mirror period).

At time t3 during the mirror period, it is determined that the filter time tf has passed since time t1, and current starts to be supplied from the constant current power supply 42 to the capacitor 44. FIG. After that, at time t4, the gate voltage Vgs begins to rise, after which the gate voltage Vgs reaches the output voltage Vom of the constant voltage power supply 30. FIG.

Next, a case where the turn-on speed is higher than that in FIG. 7 will be described with reference to FIG. 8A to 8E correspond to FIGS. 7A to 7E. Also, times t1, t2, t3 and t4 in FIG. 8 correspond to times t1, t2, t3 and t4 in FIG.

In the example shown in FIG. 8, the rising speed dVgst is higher than the rising speed dVgst shown in FIG. 7, so the filter time tf is set shorter than the filter time tf shown in FIG. As a result, even if the turn-on speed of the switch SW varies due to individual differences and operating states of the switch SW and the drive circuit Dr, it is possible to prevent an erroneous determination that an overcurrent is flowing. It is possible to quickly determine that an overcurrent is flowing.

<Second embodiment>
The second embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, instead of the rate of increase dVgst of the gate voltage Vgs, the filter time tf is set based on the time from when the gate voltage Vgs starts rising from 0 to when it reaches the mirror voltage Vmil.

FIG. 9 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 9, the same reference numerals are assigned to the same processes as those shown in FIG. 6 for convenience.

If the determination in step S20 is affirmative, the process proceeds to step S23, and the elapsed time from when the gate voltage Vgs starts rising from 0 until it reaches the mirror voltage Vmil is calculated based on the detected gate voltage Vgs.

In step S24, the shorter the calculated elapsed time, the shorter the filter time tf in the next switching cycle is set. This setting is based on the fact that the shorter the calculated elapsed time, the higher the turn-on speed of the switch SW. That is, the elapsed time between times t1 and t2 shown in FIG. 8 when the turn-on speed is high is shorter than the elapsed time between times t1 and t2 shown in FIG. 7 when the turn-on speed is low. Note that the filter time tf may be set, for example, based on map information that associates the filter time tf with the elapsed time.

According to the present embodiment described above, the same effects as those of the first embodiment can be obtained.

<Third Embodiment>
The third embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, the filter time tf is set to the time from when the gate voltage Vgs starts rising from 0 to when it reaches the mirror voltage Vmil.

FIG. 10 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 10, the same reference numerals are assigned to the same processes as those shown in FIG. 6 for convenience.

If an affirmative determination is made in step S20, the process proceeds to step S25, and the elapsed time from when the gate voltage Vgs starts rising from 0 until it reaches the mirror voltage Vmil is calculated based on the detected gate voltage Vgs.

In step S26, the calculated elapsed time is set as the filter time tf in the next switching cycle. According to this setting, the higher the turn-on speed of the switch SW, the shorter the filter time tf is set.

According to the present embodiment described above, current starts to be supplied from the constant-current power supply 42 to the capacitor 44 at a timing near the timing when the gate voltage Vgs reaches the mirror voltage Vmil. As a result, overcurrent detection can be started early after the drive signal IN is switched to the ON command.

<Fourth Embodiment>
The fourth embodiment will be described below with reference to the drawings, focusing on differences from the third embodiment. In this embodiment, the filter time tf is set to the time from when the gate voltage Vgs starts rising from 0 to when the mirror period Tmil ends.

FIG. 11 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 11, the same reference numerals are assigned to the same processes as those shown in FIG. 6 for convenience.

If an affirmative determination is made in step S20, the process proceeds to step S27, and the elapsed time from when the gate voltage Vgs starts rising from 0 to when the mirror period Tmil ends is calculated based on the detected gate voltage Vgs.

In step S28, the calculated elapsed time is set as the filter time tf in the next switching cycle. According to this setting, the higher the turn-on speed of the switch SW, the shorter the filter time tf is set.

According to the present embodiment described above, current starts to be supplied from the constant current power supply 42 to the capacitor 44 at timing near the end timing of the mirror period Tmil. As a result, the overcurrent detection can be started after the voltage Vds between the drain and the source is lowered to near zero. As a result, it is possible to accurately prevent an erroneous determination that an overcurrent is flowing through the switch SW even though the overcurrent is not flowing.

<Fifth Embodiment>
The fifth embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, the filter time tf is set based on the sense voltage Vse instead of the gate voltage Vgs.

FIG. 12 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 12, the same reference numerals are assigned to the same processes as those shown in FIG. 6 for convenience.

If an affirmative determination is made in step S20, the process proceeds to step S30, and the rate of increase dVset of the sense voltage Vse is calculated based on the detected sense voltage Vse. This rising speed dVset is the speed during the period when the sense voltage Vse rises immediately after the charging process is started.

In step S31, the higher the calculated rising speed dVset is, the shorter the filter time tf in the next switching cycle is set. This setting is based on the fact that the turn-on speed of the switch SW increases as the rising speed dVset increases. Note that the filter time tf may be set, for example, based on map information that associates the filter time tf with the rate of increase dVset.

Next, setting modes of the filter time tf when the turn-on speed of the switch SW is low and when it is high will be described with reference to FIGS. 13 and 14. FIG.

First, the case where the turn-on speed is low will be described with reference to FIG. FIG. 13(d) shows the transition of the sense voltage Vse, and FIGS. 13(a)-(c), (e), and (f) correspond to FIGS. 3(a)-(e).

At time t1, the charging process starts, the gate voltage Vgs begins to rise, and then the gate voltage Vgs reaches the mirror voltage Vmil of the switch SW. Further, after time t1, the sense voltage Vse also rises as the drain current Ids rises. The sense voltage Vse reaches its peak value at time t2. During the period from time t1 to t2, the rising speed dVset of the sense voltage Vse used for setting the filter time tf is calculated.

After that, at time t3 during the mirror period, it is determined that the filter time tf has passed since time t1, and current starts to be supplied from the constant current power supply 42 to the capacitor 44. FIG.

Next, a case where the turn-on speed is higher than that in FIG. 13 will be described with reference to FIG. 14(a) to (f) correspond to the previous FIGS. 13(a) to (f). Also, times t1, t2, t3 and t4 in FIG. 14 correspond to times t1, t2, t3 and t4 in FIG.

In the example shown in FIG. 14, the rising speed dVset is higher than the rising speed dVset shown in FIG. 13, so the filter time tf is set shorter than the filter time tf shown in FIG.

According to the present embodiment described above, the same effects as those of the first embodiment can be obtained.

<Sixth embodiment>
The sixth embodiment will be described below with reference to the drawings, focusing on differences from the fifth embodiment. In this embodiment, the overcurrent detection process executed by the drive control unit 50 of the lower arm drive circuit DrL will be described as an example. In this overcurrent detection process, the gate voltage Vgs of the lower arm switch SWL changes from 0 to Elapsed time from the start of the rise to the end timing of the recovery current flowing through the upper arm diode DH is calculated. Then, the calculated elapsed time is set as the filter time tf.

FIG. 15 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 15, the same reference numerals are assigned to the same processes as those shown in FIG. 12 for the sake of convenience.

If an affirmative determination is made in step S20, the process proceeds to step S32 to calculate the elapsed time from when the detected gate voltage Vgs starts rising from 0 to when the recovery current of the upper arm diode DH ends. Specifically, for example, the elapsed time from when the detected gate voltage Vgs starts rising from 0 to when the sense voltage Vse reaches its peak value (time t2 in FIGS. 13 and 14) is calculated. The reason why the elapsed time is calculated is that the timing at which the sense voltage Vse reaches the peak value is the same timing as the end timing of the recovery current flow through the upper arm diode DH, and that the end timing of the recovery current flow This process is performed in consideration of the fact that the voltage Vds between the drain and source of the switch SWL has already dropped significantly.

In step S33, the calculated elapsed time is set as the filter time tf in the next switching cycle. According to this setting, the higher the turn-on speed of the switch SW, the shorter the filter time tf is set.

According to the present embodiment described above, the same effects as those of the fifth embodiment can be obtained.

<Seventh embodiment>
The seventh embodiment will be described below with reference to the drawings, focusing on differences from the fifth embodiment. In this embodiment, the elapsed time from when the gate voltage Vgs of the switch SW starts rising from 0 to when the detected sense voltage Vse stops rising is calculated. Then, the calculated elapsed time is set as the filter time tf. Here, the timing at which the rising of the sense voltage Vse ends is time t4 in FIGS. During the period in which the rise occurs, the correlation between the current flowing through the sense terminal St and the drain current Ids of the switch SW is greatly broken.

FIG. 16 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 16, the same reference numerals are assigned to the same processes as those shown in FIG. 12 for the sake of convenience.

If an affirmative determination is made in step S20, the process proceeds to step S34 to calculate the elapsed time from when the detected gate voltage Vgs starts rising from 0 to when the detected sense voltage Vse stops rising.

In step S35, the calculated elapsed time is set as the filter time tf in the next switching cycle. According to this setting, the higher the turn-on speed of the switch SW, the shorter the filter time tf is set.

According to the present embodiment described above, the same effects as those of the fifth embodiment can be obtained.

<Eighth embodiment>
The eighth embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, the filter time tf is set based on the temperature of the switch SW instead of the gate voltage Vgs.

FIG. 17 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 17, the same reference numerals are assigned to the same processes as those shown in FIG. 6 for convenience.

If an affirmative determination is made in step S20, the process proceeds to step S40, and the detected temperature TD rises immediately after the charging process is started based on the temperature of the switch SW detected by the temperature detection circuit 53 (hereinafter referred to as the detected temperature TD). A rate of increase dTt of the detected temperature TD during the period is calculated.

In step S41, the higher the calculated rising speed dTt is, the shorter the filter time tf in the next switching cycle is set. This setting is based on the fact that the turn-on speed of the switch SW increases as the rising speed dTt increases.

Next, setting modes of the filter time tf when the turn-on speed of the switch SW is low and when it is high will be described with reference to FIGS. 18 and 19. FIG.

First, the case where the turn-on speed is low will be described with reference to FIG. FIG. 18(d) shows transition of the detected temperature TD, and FIGS. 18(a)-(c), (e), and (f) correspond to FIGS. 3(a)-(e).

At time t1, the charging process starts, the gate voltage Vgs begins to rise, and then the gate voltage Vgs reaches the mirror voltage Vmil of the switch SW. After the time t1, the detected temperature TD also rises as the drain current Ids rises. The drain current Ids reaches its peak value at time t2, and the detected temperature TD reaches its peak value at time t3 thereafter. The reason why the detected temperature TD drops from time t3 is that the switch SW is in a fully-on state and the loss generated in the switch SW is reduced. During the period from time t1 to t3 when the detected temperature TD rises, the rate of increase dT of the detected temperature TD used for setting the filter time tf is calculated.

After that, at time t3 during the mirror period, it is determined that the filter time tf has passed since time t1, and current starts to be supplied from the constant current power supply 42 to the capacitor 44. FIG.

Next, a case where the turn-on speed is higher than that in FIG. 18 will be described with reference to FIG. 19(a) to (f) correspond to the previous FIGS. 18(a) to (f). Also, times t1, t2, t3 and t4 in FIG. 19 correspond to times t1, t2, t3 and t4 in FIG.

In the example shown in FIG. 19, the rising speed dTt is higher than the rising speed dTt shown in FIG. 18, so the filter time tf is set shorter than the filter time tf shown in FIG.

According to the present embodiment described above, the same effects as those of the first embodiment can be obtained.

<Ninth Embodiment>
The ninth embodiment will be described below with reference to the drawings, focusing on differences from the eighth embodiment. In this embodiment, instead of the rate of increase dTt of the detected temperature TD, the filter time tf is set based on the average temperature Tave, which is the time average value of the detected temperature TD.

FIG. 20 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 20, the same reference numerals are assigned to the same processes as those shown in FIG. 17 for convenience.

When an affirmative determination is made in step S20, the process proceeds to step S42 to calculate the average temperature Tave based on the detected temperature TD. Specifically, for example, an average temperature Tave may be calculated as an average value of the detected temperatures TD in a plurality of switching cycles.

In step S43, the filter time tf in the next switching cycle is set shorter as the calculated average temperature Tave is lower. This setting is based on the fact that the lower the average temperature Tave, the higher the turn-on speed of the switch SW. FIG. 18 shows the average temperature Tave when the turn-on speed is low, and FIG. 19 shows the average temperature Tave when the turn-on speed is high. The average temperature Tave shown in FIG. 19 is lower than the average temperature Tave shown in FIG. Note that the filter time tf may be set, for example, based on map information that associates the filter time tf with the average temperature Tave.

According to the present embodiment described above, the same effects as those of the eighth embodiment can be obtained.

<Tenth Embodiment>
The tenth embodiment will be described below with reference to the drawings, focusing on differences from the eighth embodiment. In this embodiment, as shown in the times t1 to t3 in FIGS. 18 and 19, the filter time tf is the time from when the gate voltage Vgs starts rising from 0 to when the detected temperature TD starts falling. set.

FIG. 21 shows the procedure for setting the filter time tf. This process is repeatedly executed by the drive control unit 50, for example, at a predetermined control cycle. In addition, in FIG. 21, the same reference numerals are assigned to the same processes as those shown in FIG. 17 for the sake of convenience.

When an affirmative determination is made in step S20, the process proceeds to step S44 to calculate the elapsed time from when the detected gate voltage Vgs starts to rise from 0 to when the detected temperature TD starts to fall.

In step S45, the calculated elapsed time is set as the filter time tf in the next switching cycle. According to this setting, the higher the turn-on speed of the switch SW, the shorter the filter time tf is set.

According to the present embodiment described above, the overcurrent detection can be started after the voltage Vds between the drain and the source is lowered to near zero. As a result, it is possible to accurately prevent an erroneous determination that an overcurrent is flowing through the switch SW even though the overcurrent is not flowing.

<Eleventh Embodiment>
The eleventh embodiment will be described below with reference to the drawings, focusing on differences from the above-described embodiments. In this embodiment, as shown in FIG. 22, the output current It of the constant current power supply 42 is made variable. This output current It is made variable by operating the constant current power supply 42 by the drive control unit 50 . In addition, in FIG. 22, the same reference numerals are given to the same configurations as those shown in FIG. 2 for convenience.

Next, two methods for varying the output current It will be described.

First, with reference to FIG. 23, the case where the current supply start timing from the constant current power supply 42 to the capacitor 44 is set after the voltage Vds between the drain and the source drops to near zero will be described. FIG. 23(d) shows transition of the output current It of the constant current power supply 42, and FIGS. Yes.

At time t1, the charging process starts, the gate voltage Vgs begins to rise, and then the gate voltage Vgs reaches the mirror voltage Vmil of the switch SW. Further, after time t1, at time t2, the drain-source voltage Vds drops to near zero. After that, at time t3 during the mirror period, it is determined that the filter time tf has passed since time t1, and current starts to be supplied from the constant current power supply 42 to the capacitor 44. FIG.

Here, in the period from time t3 to t5, the output current It is increased from 0 to a predetermined current Iα. During the period t3-t5, the rate of increase of the output current It is set higher during the period from time t3 to t4 than during the period from time t4 to t5. According to this setting, the capacitor 44 is charged as early as possible from time t3, so overcurrent detection can be started quickly.

Next, a case where the current supply start timing from the constant current power supply 42 to the capacitor 44 is set before the drain-source voltage Vds drops to near zero will be described with reference to FIG. FIGS. 24(a) to (f) correspond to FIGS. 23(a) to (f).

The charging process starts at time t1, and the gate voltage Vgs begins to rise. After time t1, at time t2, it is determined that the filter time tf has elapsed since time t1, and current starts to be supplied from the constant current power supply 42 to the capacitor 44. FIG. After that, at time t3, the drain-source voltage Vds drops to near zero.

Here, in the period from time t2 to t5, the output current It is increased from 0 to a predetermined current Iα. In this period t2 to t5, the rate of increase of the output current It is set higher during the period from time t4 to t5 than during the period from time t2 to t4. According to this setting, overcurrent detection can be started as early as possible while accurately preventing an erroneous determination that an overcurrent is flowing even though an overcurrent is not flowing through the switch SW. can.

<Modified example of the eleventh embodiment>
The drive control unit 50 determines whether the timing at which the filter time tf elapses after the start of the charging process is before or after the timing at which the voltage Vds between the drain and the source drops to near 0 (hereinafter referred to as reference timing). . When the drive control unit 50 determines that the timing at which the filter time tf elapses is later than the reference timing, the drive control unit 50 sets the output current It shown in FIG. If it is determined that the timing is earlier than the reference timing, the output current It may be set as shown in FIG. 24(d).

<Twelfth Embodiment>
The twelfth embodiment will be described below with reference to the drawings, focusing on differences from the above embodiments.

FIG. 25 shows a functional block diagram of the drive control section 50. As shown in FIG.

The drive control section 50 includes a first setting section 61 , a second setting section 62 , a third setting section 63 and a selection section 64 .

The first setting unit 61 performs the filtering time setting process described in any one of the first to fourth embodiments, based on the detected gate voltage Vgs (corresponding to the "switch state quantity"). Hereinafter, the filter time set by the first setting unit 61 will be referred to as a first filter time tf1.

The second setting unit 62 performs the filter time setting process described in any one of the fifth to seventh embodiments, based on the detected sense voltage Vse (corresponding to the "switch state quantity"). Hereinafter, the filter time set by the second setting unit 62 will be referred to as a second filter time tf2.

The third setting unit 63 performs the filtering time setting process described in any one of the eighth to tenth embodiments, based on the detected temperature TD (corresponding to the "switch state quantity"). Hereinafter, the filter time set by the third setting unit 63 will be referred to as a third filter time tf3.

In each switching period of the switch SW, the selector 64 sets the filter time of the setter that first calculated the filter time among the setters 61 to 63 as the filter time tf used in step S12 of FIG. .

According to the present embodiment described above, it is possible to early determine the filter time required in the next switching cycle.

<Thirteenth Embodiment>
The thirteenth embodiment will be described below with reference to the drawings, focusing on differences from the twelfth embodiment. In this embodiment, as shown in FIG. 26, the selection unit 64 selects the longest filter time among the filter times tf1 to tf3 calculated by the setting units 61 to 63 in each switching cycle of the switch SW. 5 is set as the filter time tf used in step S12.

According to the present embodiment described above, it is possible to accurately prevent an erroneous determination that an overcurrent is flowing through the switch SW even though the overcurrent is not flowing.

<Other embodiments>
It should be noted that each of the above-described embodiments may be modified as follows.

In the thirteenth embodiment, the selection unit 64 sets the intermediate filter time among the filter times tf1 to tf3 calculated by the setting units 61 to 63 as the filter time tf used in step S12 of FIG. may

- The temperature characteristic of the switch SW may change depending on the drain current. Specifically, for example, in the current region where the drain current is small, the turn-on speed increases as the detected temperature TD decreases, while in the current region where the drain current increases, the turn-on speed increases as the detected temperature TD increases. Therefore, the filter time tf may be set using both the sense voltage Vse and the detected temperature TD.

- The switch SW may be turned on by constant current drive instead of constant voltage drive.

- The capacitor used in the desaturation method is not limited to the capacitor 44 as a passive element. For example, the capacitor 44 as a passive element may be removed from the drive circuit Dr, and a parasitic capacitance formed between the electrical path 46 and the ground portion may be used as the capacitance portion.

- The switches that constitute the inverter are not limited to MOSFETs, but may be IGBTs, for example. In this case, the high side terminal of the switch is the collector and the low side terminal is the emitter. Moreover, the power conversion circuit including the switch is not limited to the multiphase inverter, and may be, for example, a DCDC converter.

- The controller and techniques described in this disclosure can be performed by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program; may be implemented. Alternatively, the controller and techniques described in this disclosure may be implemented by a dedicated computer provided by configuring the processor with one or more dedicated hardware logic circuits. Alternatively, the control units and techniques described in this disclosure can be implemented by a combination of a processor and memory programmed to perform one or more functions and a processor configured by one or more hardware logic circuits. It may also be implemented by one or more dedicated computers configured. The computer program may also be stored as computer-executable instructions on a computer-readable non-transitional tangible recording medium.

DESCRIPTION OF SYMBOLS 20... Inverter 25... Control apparatus 40... Diode 42... Constant current power supply 43... Supply switch 44... Capacitor 47... Comparator 50... Drive control part.

Claims (18)

In the switch drive circuits (DrH, DrL) that drive the switches (SWH, SWL),
a diode (40) having a cathode connected to the high-potential terminal of the switch;
A current is supplied to a capacitor (44) formed between a low-potential side terminal of the switch and the anode of the diode at the timing when the filter time (tf) has passed since the charging of the gate of the switch is started. A current supply unit (41 to 43) that starts to
a determination unit that determines that an overcurrent is flowing through the switch when the voltage (Vdeast) of the capacitance unit exceeds the threshold value (Vα) when the switch is turned on;
and a setting unit that sets the filter time shorter when the switch turn-on speed is high than when the switch turn-on speed is low. A gate voltage detection unit (51) for detecting the gate voltage of the switch,
2. The switch drive circuit according to claim 1, wherein the setting unit sets the filter time based on the detected gate voltage. The setting unit determines a rate of increase (dVgst) of the detected gate voltage during a period from when the charging of the gate is started until the gate voltage of the switch reaches a mirror voltage (Vmil) of the switch. 3. The switch driving circuit according to claim 2, wherein the filter time is set shorter when the rate of increase is higher than when the rate is low. The setting unit sets the filter time when the time from when the charging of the gate is started until the detected gate voltage reaches the mirror voltage of the switch is shorter than when the time is longer. 3. The switch driving circuit according to claim 2, wherein the time is set short. 3. The switch drive according to claim 2, wherein the setting unit sets the filter time to the time from when charging of the gate is started until the detected gate voltage reaches a mirror voltage of the switch. circuit. The setting unit calculates the time from the start of charging to the gate to the end of the mirror period of the switch based on the detected gate voltage, and sets the calculated time as the filter time. 3. A drive circuit for a switch according to claim 2. The switch has a sense terminal (St) through which a minute current having a correlation with the current flowing through itself flows,
A sense voltage detection unit (52) for detecting a sense voltage (Vse), which is a potential difference between both ends of the sense resistor (37) connected to the sense terminal,
2. The switch drive circuit according to claim 1, wherein the setting unit sets the filter time based on the detected sense voltage. The setting unit sets the filter time when the rising speed of the detected sense voltage is higher than when the rising speed of the detected sense voltage is lower immediately after the charging of the gate is started. 8. The switch drive circuit according to claim 7, wherein the switch is set short. In a switch drive circuit that drives the upper arm switch (SWH) and the lower arm switch (SWL) as the switches, and alternately turns on the upper arm switch and the lower arm switch,
Diodes (DH, DL) are connected in antiparallel to the upper arm switch and the lower arm switch,
Of the upper arm switch and the lower arm switch, the switch that is about to be switched to the ON state is the self-arm switch, the remaining switches are the opposing arm switches, and the sense voltage detection section corresponding to the self-arm switch is the self-arm switch. In the case of an arm detection section, the setting section is connected in anti-parallel to the opposite arm switch after charging of the gate of the self-arm switch is started based on the sense voltage detected by the self-arm detection section. 8. The switch driving circuit according to claim 7, wherein a time required for the recovery current to flow through said connected diode to end is calculated, and the calculated time is set as said filter time. The setting unit calculates the time from the start of charging to the gate to the end of rising of the detected sense voltage based on the detected sense voltage, and sets the calculated time to the filter. 8. The switch drive circuit according to claim 7, wherein the switch is set to time. A temperature detection unit (53) that detects the temperature of the switch,
2. The switch driving circuit according to claim 1, wherein the setting section sets the filtering time based on the temperature detected by the temperature detecting section. The setting unit sets the filter time when the rising speed (dTt) of the detected temperature is higher than when the rising speed (dTt) in the period when the detected temperature rises immediately after the charging of the gate is started. 12. The switch drive circuit according to claim 11, wherein the switch is set short. 12. The switch drive circuit according to claim 11, wherein the setting unit sets the filter time shorter when the time average value (Tave) of the detected temperature is lower than when the time average value (Tave) of the detected temperature is high. 12. The switch driving circuit according to claim 11, wherein the setting unit calculates a time from when charging of the gate is started to when the detected temperature starts to decrease, and sets the calculated time as the filter time. . 15. The switch according to any one of claims 1 to 14, wherein the current supply unit increases the rate of increase of the supply current in the first half of the period for increasing the supply current from 0 to the predetermined current (Iα) than in the second half. drive circuit. 15. The switch according to any one of claims 1 to 14, wherein the current supply unit increases the rate of increase of the supply current in the latter half of the period for increasing the supply current from 0 to the predetermined current (Iα) than in the first half. drive circuit. A detection unit (51 to 53) that detects a plurality of state quantities of the switch,
17. The setting unit according to any one of claims 1 to 16, wherein for each of the state quantities, the setting unit calculates the filter time based on the detected state quantity, and uses the first calculated filter time among the calculated filter times. 2. A switch drive circuit according to claim 1. A detection unit (51 to 53) that detects a plurality of state quantities of the switch,
The setting unit calculates the filter time corresponding to each state quantity based on each of the plurality of detected state quantities, and uses a filter time other than the shortest filter time among the calculated filter times. 17. A switch driving circuit according to any one of items 1 to 16.

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