JP2013214875A - Semiconductor device - Google Patents
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本発明は、電力変換回路用半導体装置に関し、特に過電流時にスイッチング素子を保護する駆動回路の制御技術に関する。 The present invention relates to a semiconductor device for a power conversion circuit, and more particularly to a drive circuit control technique for protecting a switching element in the event of an overcurrent.
図５に、特許文献１に示された従来の技術を用いた半導体装置の回路図を示す。主回路部２０はダイオードを逆並列接続したＩＧＢＴ２１〜２６で構成された３相ブリッジ回路であり、直流電源の正極Ｐと負極Ｎとの間に、ＩＧＢＴ２４と２１との直列回路と、ＩＧＢＴ２５と２２との直列回路と、ＩＧＢＴ２６と２３との直列回路とが、各々接続されている。各ＩＧＢＴ直列回路の直列接続点は直流−交流変換の場合は交流出力となり、交流−直流変換の場合は交流入力となる。各ＩＧＢＴには電流検出用の補助素子（センスＩＧＢＴとも呼ぶ）が接続される。ＩＧＢＴ２１に接続されたドライバーＩＣ０には、ＩＧＢＴ２１をオンオフさせるドライブ回路と過電流保護回路が内蔵されている。他のＩＧＢＴ２２〜２６についても同様のドライバーＩＣが接続されるが省略されている。この様な構成の半導体装置はＩＰＭ（Intelligent Power-Module）と呼ばれる。 FIG. 5 shows a circuit diagram of a semiconductor device using the conventional technique disclosed in Patent Document 1. In FIG. The main circuit unit 20 is a three-phase bridge circuit composed of IGBTs 21 to 26 in which diodes are connected in reverse parallel. Between the positive electrode P and the negative electrode N of the DC power supply, a series circuit of IGBTs 24 and 21, and IGBTs 25 and 22. And a series circuit of IGBTs 26 and 23 are connected to each other. The series connection point of each IGBT series circuit is an AC output in the case of DC-AC conversion, and is an AC input in the case of AC-DC conversion. Each IGBT is connected to an auxiliary element (also referred to as a sense IGBT) for current detection. The driver IC0 connected to the IGBT 21 includes a drive circuit for turning on and off the IGBT 21 and an overcurrent protection circuit. Similar driver ICs are connected to the other IGBTs 22 to 26, but are omitted. A semiconductor device having such a configuration is called an IPM (Intelligent Power-Module).
以下に、ドライバーＩＣ０について構成と動作を説明する。ＩＧＢＴ２１をオンオフ駆動するための信号入力端子ＩＮは、オアゲート１１を介してオン信号時にＩＧＢＴ２１のゲートに駆動用電源３からソース電流を注入するためのオン用スイッチ１（ＰチャンネルＦＥＴ）のゲートに、またオフ信号時にＩＧＢＴ２１のゲートにシンク電流を供給するためのオフ用スイッチ２（ＮチャンネルＦＥＴ）のゲートに、各々接続されている。実際にはＩＧＢＴ２１のゲートと直列に抵抗が接続されるが省略されている。ここで端子ＩＮの信号がローレベルの時オン用スイッチ１はオン、オフ用スイッチ２はオフとなる。 Hereinafter, the configuration and operation of the driver IC0 will be described. The signal input terminal IN for driving the IGBT 21 on and off is connected to the gate of the switch 1 for turning on (P channel FET) for injecting the source current from the driving power source 3 to the gate of the IGBT 21 at the time of the ON signal through the OR gate 11. Further, each is connected to the gate of an off switch 2 (N-channel FET) for supplying a sink current to the gate of the IGBT 21 at the time of an off signal. In practice, a resistor is connected in series with the gate of the IGBT 21, but is omitted. When the signal at the terminal IN is at a low level, the on switch 1 is turned on and the off switch 2 is turned off.
過電流保護回路においては、電流検出用補助素子２７のエミッタをドライバーＩＣ０のＯＣ端子に入力し、このＯＣ端子とグランドとの間に抵抗５と６との直列回路を接続し、電流信号を電圧信号に変換する。抵抗５と６の直列接続点の電圧Ｖｉは基準電圧７の電圧Ｖｂ１とコンパレータ8で比較され、抵抗５と６の直列接続点の電圧Ｖｉが基準電圧７の電圧Ｖｂ１より大きくなると、コンパレータ８の出力はハイレベルとなり、フリップフロップ１０をセットして、出力端子Qをハイレベルにする。出力端子Ｑがハイレベルとなると、オアゲート１１の出力がハイレベルとなりオン用スイッチ１はオフとなると共に、演算増幅器９が動作状態となる。演算増幅器９の入力には、入力側に供給されている基準電圧７の電圧Ｖｂ１と電流検出回路４０の分圧抵抗５及び６で検出される電圧値Ｖｉとが入力され、これらの電圧が一致するようにゲート電圧ＶＧが減少されて、所定の固定電圧に収束される。 In the overcurrent protection circuit, the emitter of the current detection auxiliary element 27 is input to the OC terminal of the driver IC0, a series circuit of resistors 5 and 6 is connected between the OC terminal and the ground, and the current signal is converted into a voltage. Convert to signal. The voltage Vi at the series connection point of the resistors 5 and 6 is compared with the voltage Vb1 of the reference voltage 7 by the comparator 8. When the voltage Vi at the series connection point of the resistors 5 and 6 becomes larger than the voltage Vb1 of the reference voltage 7, the comparator 8 The output becomes high level, the flip-flop 10 is set, and the output terminal Q is set to high level. When the output terminal Q becomes high level, the output of the OR gate 11 becomes high level, the on switch 1 is turned off, and the operational amplifier 9 is activated. The input of the operational amplifier 9 receives the voltage Vb1 of the reference voltage 7 supplied to the input side and the voltage value Vi detected by the voltage dividing resistors 5 and 6 of the current detection circuit 40, and these voltages match. Thus, the gate voltage VG is decreased and converged to a predetermined fixed voltage.
上述のように、従来の過電流制限方式では、電流検出用補助ＩＧＢＴ２７に流れる電流をドライバーＩＣ内に内蔵している分圧抵抗に流し、分圧抵抗で得られる電圧と基準電圧をコンパレータで比較し、分圧抵抗で得られる電圧が基準電圧を超える時にフリップフロップをセットし、フリップフロップの出力信号でオン用スイッチをオフすると共に、演算増幅器をオフ状態からオン状態に切替制御して、ＩＧＢＴのゲートに接続されるドライバーＩＣの出力端子ＯＵＴの電圧を演算増幅器でオン状態の電圧より低い電圧に制御する方式である。この方式の場合、分圧抵抗で得られる電圧が短時間でも基準電圧を超えるとフリップフロップがセットされてしまい、次に入力端子ＩＮにフリップフリップをリセットする電圧が入力されるまで、過電流制限状態が継続することになる。ノイズのような外乱が混入した場合にも同様の動作となる。
従って、本発明の課題は、短時間の過電流やノイズが消滅した場合には過電流制限機能が自動的に定常の動作状態に復帰できる過電流保護回路を提供することである。
As described above, in the conventional overcurrent limiting method, the current flowing through the current detection auxiliary IGBT 27 is passed through the voltage dividing resistor built in the driver IC, and the voltage obtained by the voltage dividing resistor is compared with the reference voltage by the comparator. When the voltage obtained by the voltage dividing resistor exceeds the reference voltage, the flip-flop is set, the ON switch is turned off by the output signal of the flip-flop, and the operational amplifier is controlled to be switched from the OFF state to the ON state. The voltage at the output terminal OUT of the driver IC connected to the gate of the driver IC is controlled to a voltage lower than the on-state voltage by an operational amplifier. In this method, if the voltage obtained by the voltage dividing resistor exceeds the reference voltage even for a short time, the flip-flop is set and the overcurrent limit is applied until the next voltage to reset the flip-flop is input to the input terminal IN. The state will continue. The same operation is performed when a disturbance such as noise is mixed.
Accordingly, an object of the present invention is to provide an overcurrent protection circuit in which an overcurrent limiting function can automatically return to a steady operation state when a short-time overcurrent or noise disappears.
上述の課題を解決するために、第1の発明においては、電流検出用補助素子を備えたＩＧＢＴと、ダイオードと、ドライバーＩＣで構成される電力変換回路用半導体装置であって、前記ＩＧＢＴをオン状態にする場合には前記ドライバーＩＣの出力から前記ＩＧＢＴのゲートにソース電流を注入し、前記ＩＧＢＴをオフさせる場合には前記ドライバーＩＣの出力から前記ＩＧＢＴのゲートにシンク電流を供給する駆動回路内に、外部制御回路からのオン信号指令に基づいてソース電流を出力するオン用スイッチと、外部制御回路からのオフ信号に基づいてシンク電流を出力するオフ用スイッチと、前記電流検出用補助素子の電流を電圧に変換する抵抗と、前記抵抗の電圧と第１の基準電圧とを入力としたコンパレータと、前記コンパレータの出力信号で動作と停止が切替可能な演算増幅器と、前記演算増幅器の出力電圧を決める第２の基準電圧と、を備え、前記演算増幅器の出力は前記オン用スイッチの出力と前記ドライバーＩＣの出力との間に接続され、前記抵抗の電圧が第１の基準電圧より大きい場合には、前記オン用スイッチをオフさせると共に、前記演算増幅器を動作状態とする。 In order to solve the above-described problem, in the first invention, there is provided a semiconductor device for a power conversion circuit including an IGBT including a current detection auxiliary element, a diode, and a driver IC, wherein the IGBT is turned on. In the drive circuit, a source current is injected from the output of the driver IC to the gate of the IGBT when the driver IC is turned on, and a sink current is supplied from the output of the driver IC to the gate of the IGBT when the IGBT is turned off. In addition, an ON switch that outputs a source current based on an ON signal command from the external control circuit, an OFF switch that outputs a sink current based on an OFF signal from the external control circuit, and the current detection auxiliary element A resistor that converts current into voltage, a comparator that receives the voltage of the resistor and the first reference voltage, and an output of the comparator An operational amplifier that can be switched between operation and stop by a force signal, and a second reference voltage that determines an output voltage of the operational amplifier, the output of the operational amplifier being the output of the on switch and the output of the driver IC And when the voltage of the resistor is larger than the first reference voltage, the switch for turning on is turned off and the operational amplifier is set in an operating state.
第２の発明においては、第１の発明における、前記コンパレータの出力に信号遅れ回路を接続し、前記信号遅れ回路の出力信号で、前記オン用スイッチの制御と前記演算増幅器の動作と停止の切替を行う。 In a second invention, a signal delay circuit is connected to the output of the comparator in the first invention, and the control of the switch for ON and the switching of the operation of the operational amplifier and the stop by the output signal of the signal delay circuit I do.
第３の発明においては、第１又は第2の発明における、前記演算増幅器の二つの入力の一方には前記第２の基準電圧を、他方にはドライバーＩＣの出力とグランド間に接続した抵抗分圧回路の分圧された電圧を、各々接続する。
第４の発明においては、第３の発明における、前記コンパレータの出力に信号遅れ回路を接続し、前記信号遅れ回路の出力信号で、前記オン用スイッチの制御と前記演算増幅器の動作と停止の切替を行う。
第５の発明においては、第１〜第４の発明における、前記第２の基準電圧として前記第１の基準電圧を用いる。
第６の発明においては、第１〜第５の発明における、前記ＩＧＢＴの代わりに電界効果型トランジスタを用いる。
In the third invention, in the first or second invention, one of the two inputs of the operational amplifier is connected to the second reference voltage, and the other is connected to a resistor connected between the output of the driver IC and the ground. The divided voltages of the voltage circuit are connected to each other.
In a fourth aspect of the invention, a signal delay circuit is connected to the output of the comparator in the third aspect of the invention, and control of the on-state switch and switching of operation and stop of the operational amplifier are performed by the output signal of the signal delay circuit. I do.
In a fifth invention, the first reference voltage is used as the second reference voltage in the first to fourth inventions.
In the sixth invention, a field effect transistor is used instead of the IGBT in the first to fifth inventions.
本発明では、ＩＧＢＴの過電流を電圧信号に変換し、この信号と基準電圧とをコンパレータで比較し、ＩＧＢＴの電流を電圧信号に変換した電圧が基準電圧を超えている時のコンパレータの出力信号（ハイレベル）で、ＩＧＢＴをオンさせるためのオン用スイッチをオフさせると共に、演算増幅器を停止状態から動作状態に切替制御して、ＩＧＢＴのゲートに接続されるドライバーＩＣの出力端子ＯＵＴの電圧を演算増幅器でオン状態の電圧より低い電圧に制御している。このため、ＩＧＢＴの電流が過電流以下になると、ＩＧＢＴの電流を電圧信号に変換した電圧が小さくなり、コンパレータの出力信号は定常状態の信号（ローレベル）になり、ＩＧＢＴをオンさせるためのオン用スイッチをオン状態にすると共に、演算増幅器を動作状態から停止状態に切替制御する。 In the present invention, the overcurrent of the IGBT is converted into a voltage signal, the signal is compared with a reference voltage by the comparator, and the output signal of the comparator when the voltage obtained by converting the IGBT current into the voltage signal exceeds the reference voltage. At (high level), the switch for turning on the IGBT is turned off and the operational amplifier is switched from the stopped state to the operating state to control the voltage at the output terminal OUT of the driver IC connected to the gate of the IGBT. The operational amplifier is controlled to a voltage lower than the on-state voltage. For this reason, when the current of the IGBT becomes equal to or less than the overcurrent, the voltage obtained by converting the current of the IGBT into a voltage signal becomes small, the output signal of the comparator becomes a steady state signal (low level), and the on-state for turning on the IGBT is turned on. The operational switch is turned on and the operational amplifier is controlled to be switched from the operating state to the stopped state.
この結果、過電流が発生している時又はノイズが入っている時だけ、ＩＧＢＴをオンさせるためのオン用スイッチをオフさせると共に、演算増幅器を停止状態から動作状態に切替制御するため、誤動作の可能性がなくなる。 As a result, the switch for turning on the IGBT is turned off only when an overcurrent is generated or noise is entered, and the operational amplifier is switched from the stopped state to the operating state. The possibility disappears.
本発明の要点は、ＩＧＢＴの過電流を電圧信号に変換し、この信号と基準電圧とをコンパレータで比較し、ＩＧＢＴの電流を電圧信号に変換した電圧が基準電圧を超えている時のコンパレータの出力信号（ハイレベル）で、ＩＧＢＴをオンさせるためのオン用スイッチをオフさせると共に、演算増幅器を停止状態から動作状態に切替制御して、ＩＧＢＴのゲートに接続されるドライバーＩＣの出力端子ＯＵＴの電圧を演算増幅器でオン状態の電圧より低い電圧に制御している点である。 The gist of the present invention is that the overcurrent of the IGBT is converted into a voltage signal, the signal and the reference voltage are compared by a comparator, and the comparator current when the voltage obtained by converting the IGBT current to the voltage signal exceeds the reference voltage. The output signal (high level) turns off the switch for turning on the IGBT, and switches the operational amplifier from the stopped state to the operating state to control the output terminal OUT of the driver IC connected to the gate of the IGBT. The voltage is controlled to a voltage lower than the on-state voltage by the operational amplifier.
図１に、本発明の第1の実施例を示す。主回路部２０はダイオードを逆並列接続したＩＧＢＴ２１〜２６で構成された３相ブリッジ回路であり、直流電源の正極Ｐと負極Ｎとの間に、ＩＧＢＴ２４と２１との直列回路と、ＩＧＢＴ２５と２２との直列回路と、ＩＧＢＴ２６と２３との直列回路とが、各々接続されている。各ＩＧＢＴ直列回路の直列接続点は直流−交流変換の場合は交流出力となり、交流−直流変換の場合は交流入力となる。各ＩＧＢＴには電流検出用の補助素子（センスＩＧＢＴとも呼ぶ）が接続される。ここでは、ＩＧＢＴ２１に接続された電流検出用の補助素子２７だけが記載されている。補助素子２７のコレクタはＩＧＢＴ２１のコレクタに、補助素子２７のゲートはＩＧＢＴ２１のゲートに、各々接続され、補助素子２７のエミッタはドライバーＩＣ０に接続される。ＩＧＢＴ２１に接続されたドライバーＩＣ０には、ＩＧＢＴ２１をオンオフさせるドライブ回路と過電流保護回路が内蔵されている。他のＩＧＢＴ２２〜２６についても同様のドライバーＩＣが接続されるが省略されている。 FIG. 1 shows a first embodiment of the present invention. The main circuit unit 20 is a three-phase bridge circuit composed of IGBTs 21 to 26 in which diodes are connected in reverse parallel. Between the positive electrode P and the negative electrode N of the DC power supply, a series circuit of IGBTs 24 and 21, and IGBTs 25 and 22. And a series circuit of IGBTs 26 and 23 are connected to each other. The series connection point of each IGBT series circuit is an AC output in the case of DC-AC conversion, and is an AC input in the case of AC-DC conversion. Each IGBT is connected to an auxiliary element (also referred to as a sense IGBT) for current detection. Here, only the auxiliary element 27 for current detection connected to the IGBT 21 is described. The collector of auxiliary element 27 is connected to the collector of IGBT 21, the gate of auxiliary element 27 is connected to the gate of IGBT 21, and the emitter of auxiliary element 27 is connected to driver IC0. The driver IC0 connected to the IGBT 21 includes a drive circuit for turning on and off the IGBT 21 and an overcurrent protection circuit. Similar driver ICs are connected to the other IGBTs 22 to 26, but are omitted.
以下に、ドライバーＩＣ０について構成と動作を説明する。ＩＧＢＴ２１をオンオフ駆動するための信号入力端子ＩＮは、オアゲート１１を介してオン信号時にＩＧＢＴ２１のゲートに駆動用電源３からソース電流を注入するためのオン用スイッチ１（ＰチャンネルＦＥＴ）のゲートに、またオフ信号時にＩＧＢＴ２１のゲートにシンク電流を供給するためのオフ用スイッチ２（ＮチャンネルＦＥＴ）のゲートに、各々接続されている。ここで、実際にはＩＧＢＴ２１のゲートと直列に抵抗が接続されるが省略されている。ここで端子ＩＮの信号がローレベルの時オン用スイッチ１はオン、オフ用スイッチ２はオフとなる。 Hereinafter, the configuration and operation of the driver IC0 will be described. The signal input terminal IN for driving the IGBT 21 on and off is connected to the gate of the switch 1 for turning on (P channel FET) for injecting the source current from the driving power source 3 to the gate of the IGBT 21 at the time of the ON signal through the OR gate 11. Further, each is connected to the gate of an off switch 2 (N-channel FET) for supplying a sink current to the gate of the IGBT 21 at the time of an off signal. Here, although a resistor is actually connected in series with the gate of the IGBT 21, it is omitted. When the signal at the terminal IN is at a low level, the on switch 1 is turned on and the off switch 2 is turned off.
過電流保護は電流検出用補助素子２７のエミッタをドライバーＩＣ０のＯＣ端子に入力し、このＯＣ端子とグランドとの間に抵抗５と６との直列回路を接続し、電流信号を電圧信号に変換する。抵抗５と６の直列接続点の電圧Ｖｉは基準電圧７の電圧Ｖｂ１とコンパレータ8で比較され、抵抗５と６の直列接続点の電圧Ｖ１が基準電圧７の電圧Ｖｂ１より大きくなると、コンパレータ８の出力はハイレベルとなる。コンパレータ８の出力がハイレベルとなると、オアゲート１１の出力がハイレベルとなりオン用スイッチ１はオフとなると共に、演算増幅器９が動作状態となる。ここで、演算増幅器９は外部信号がハイレベルの時動作状態となり、ローレベルの時停止状態となる制御端子を備えている。演算増幅器９の入力には、入力側に供給されている基準電圧７の電圧Ｖｂ１と電流検出回路の分圧抵抗５及び６で検出される電圧値Ｖｉとが入力され、これらの電圧が一致するようにゲート電圧ＶＧが減少されて、所定の固定電圧に収束される。ここで、第１の基準電圧としての基準電圧７の代わりに電圧の違う第２の基準電圧を用いれば、動作点を変えることができる。従って、過電流が短時間に定常電流へと低下した場合には、オン用スイッチ１はオンとなり、演算増幅器９は停止状態となり、通常の動作状態となる。ノイズが混入した場合も同様にノイズがなくなれば、通常の状態へと自動的に復帰する。 In overcurrent protection, the emitter of the current detection auxiliary element 27 is input to the OC terminal of the driver IC0, and a series circuit of resistors 5 and 6 is connected between the OC terminal and the ground to convert the current signal into a voltage signal. To do. The voltage Vi at the series connection point of the resistors 5 and 6 is compared with the voltage Vb1 of the reference voltage 7 by the comparator 8, and when the voltage V1 at the series connection point of the resistors 5 and 6 becomes larger than the voltage Vb1 of the reference voltage 7, The output becomes high level. When the output of the comparator 8 becomes high level, the output of the OR gate 11 becomes high level, the on switch 1 is turned off, and the operational amplifier 9 is activated. Here, the operational amplifier 9 includes a control terminal that is in an operating state when the external signal is at a high level and is in a stopped state when the external signal is at a low level. The voltage Vb1 of the reference voltage 7 supplied to the input side and the voltage value Vi detected by the voltage dividing resistors 5 and 6 of the current detection circuit are input to the input of the operational amplifier 9, and these voltages match. Thus, the gate voltage VG is decreased and converged to a predetermined fixed voltage. Here, if a second reference voltage having a different voltage is used instead of the reference voltage 7 as the first reference voltage, the operating point can be changed. Accordingly, when the overcurrent decreases to a steady current in a short time, the on switch 1 is turned on, the operational amplifier 9 is stopped, and a normal operation state is obtained. Similarly, when noise is mixed, if the noise disappears, it automatically returns to the normal state.
図６に微小幅の過電流時のゲート電圧Ｖｇの動作波形を示す。５０がドライバーＩＣ０の入力ＩＮの電圧Ｖｉｎ、６０が微小幅の過電流信号、７０がフリップフロップがない場合（本発明）のゲート電圧波形、７１がフリップフロプがある場合（従来）のゲート電圧波形である。フリップフロップがある場合は過電流信号がなくなっても演算増幅器が動作状態にあるため、ゲート電圧はゆっくりと上昇する。またフリップフロップがない場合は、過電流信号がなくなると演算増幅器が停止状態となり、ソース電流注入用のオン用スイッチ１がオンとなり、ゲート電圧は急速に定常電圧まで上昇する。 FIG. 6 shows an operation waveform of the gate voltage Vg when the overcurrent has a minute width. 50 is a voltage Vin at the input IN of the driver IC0, 60 is an overcurrent signal having a very small width, 70 is a gate voltage waveform when there is no flip-flop (present invention), and 71 is a gate voltage waveform when there is a flip-flop (conventional). is there. When there is a flip-flop, the gate voltage rises slowly because the operational amplifier is in operation even when the overcurrent signal disappears. If there is no flip-flop, the operational amplifier is stopped when the overcurrent signal disappears, the source current injection on switch 1 is turned on, and the gate voltage rapidly rises to a steady voltage.
図２に、本発明の第２の実施例を示す。第１の実施例との違いは、コンパレータ８の出力に遅延回路１００が接続されている点である。ここで、遅延回路１００は、コンパレータ８の出力がローレベルからハイレベルに変化した時には立ち上がり時間を遅延させて出力をハイレベルに変化させ、ハイレベルからローレベルに変化した時には遅れ時間なくローレベルに変化させるオンディレータイマー回路で構成される。電流検出回路に短かい時間幅の信号が繰り返し入力されると、コンパレータ８の出力も高速にハイロー動作を繰り返すパルス波形となるが、遅延回路１００を設けることにより、短い幅のパルスは除去されて、特定の幅以上のパルスの時だけ遅延回路の出力にハイレベル信号が出力される。この結果、ノイズが混入した場合も除去することができる。遅延回路の出力にハイレベルの信号が出力されると過電流保護動作を行い、ローレベルになると定常動作に復帰する動作は、実施例１と同様である。 FIG. 2 shows a second embodiment of the present invention. The difference from the first embodiment is that the delay circuit 100 is connected to the output of the comparator 8. Here, the delay circuit 100 delays the rise time when the output of the comparator 8 changes from the low level to the high level, changes the output to the high level, and when the output from the high level changes to the low level, the delay level is low without delay. It consists of an on-delay timer circuit that changes to When a signal having a short time width is repeatedly input to the current detection circuit, the output of the comparator 8 also has a pulse waveform that repeats a high / low operation at high speed. However, by providing the delay circuit 100, a pulse having a short width is removed. A high level signal is output to the output of the delay circuit only when the pulse has a specific width or more. As a result, even when noise is mixed, it can be removed. The operation of performing an overcurrent protection operation when a high level signal is output to the output of the delay circuit and returning to a steady operation when the signal becomes low is the same as in the first embodiment.
図３に、本発明の第３の実施例を示す。第１の実施例との違いは、演算増幅器９の入力端子の接続方法の違いである。＋入力端子は基準電圧７に、−端子はドライバーＩＣ０の出力端子ＯＵＴとグランドＰＧＮＤとの間に接続された抵抗１２と１３の直列回路の直列接続点に、各々接続される。演算増幅器９はコンパレータ８の出力がハイレベルになると動作状態となり、基準電圧７の電圧Ｖｂ１と抵抗１２と１３の直列回路の直列接続点の電圧差がなくなるように、ＯＵＴ端子の電圧を制御する。第１の実施例では、第２の基準電圧を用いて、動作点を変えることを示したが、基準電圧としては第１の基準電圧としての基準電圧７だけを用いても、動作点を変えることが可能となる。 FIG. 3 shows a third embodiment of the present invention. The difference from the first embodiment is the connection method of the input terminal of the operational amplifier 9. The + input terminal is connected to the reference voltage 7, and the − terminal is connected to the series connection point of the series circuit of the resistors 12 and 13 connected between the output terminal OUT of the driver IC 0 and the ground PGND. The operational amplifier 9 is activated when the output of the comparator 8 becomes high level, and controls the voltage at the OUT terminal so that the voltage difference between the series connection point of the series circuit of the voltage Vb1 of the reference voltage 7 and the resistors 12 and 13 is eliminated. . In the first embodiment, the operation point is changed by using the second reference voltage. However, the operation point is changed by using only the reference voltage 7 as the first reference voltage as the reference voltage. It becomes possible.
図４に、本発明の第４の実施例を示す。第３の実施例との違いは、第３の実施例におけるコンパレータ８の出力に遅延回路１００が接続されている点である。動作と効果は第２の実施例と同じであるので説明は省略する。 FIG. 4 shows a fourth embodiment of the present invention. The difference from the third embodiment is that the delay circuit 100 is connected to the output of the comparator 8 in the third embodiment. Since the operation and effect are the same as those of the second embodiment, description thereof is omitted.
尚、上記実施例には主回路のスイッチング素子としてＩＧＢＴを用いた例を示したが、ＩＧＢＴの代わりに電圧駆動型電界効果トランジスタを用いた場合でも実現可能である。 In the above embodiment, the IGBT is used as the switching element of the main circuit. However, the present invention can be realized even when a voltage driven field effect transistor is used instead of the IGBT.
本発明は、過電流保護に関する発明であり、半導体モジュールを用いた電力変換装置のゲート駆動回路、ＩＰＭなどへの適用が可能である。 The present invention relates to overcurrent protection, and can be applied to a gate drive circuit, an IPM, and the like of a power conversion device using a semiconductor module.
０・・・ドライバーIC １・・・ＰチャンネルFET
２・・・ＮチャンネルＦＥＴ ３・・・駆動用電源
５，６、１２、１３・・・抵抗 ７・・・基準電圧
８・・・コンパレータ ９・・・演算増幅器
１０・・・フリップフロップ １・・・オアゲート
２０・・・主回路 ２１〜２６・・・ＩＧＢＴ
２７・・・補助ＩＧＢＴ（センスＩＧＢＴ） １００・・・遅延回路
0 ... Driver IC 1 ... P-channel FET
2 ... N-channel FET 3 ... Driving power source 5, 6, 12, 13 ... Resistance 7 ... Reference voltage 8 ... Comparator 9 ... Operational amplifier 10 ... Flip-flop 1. ..OR gate 20 ... main circuit 21-26 ... IGBT
27: Auxiliary IGBT (Sense IGBT) 100: Delay circuit
Claims (6)
前記ＩＧＢＴをオン状態にする場合には前記ドライバーＩＣの出力から前記ＩＧＢＴのゲートにソース電流を注入し、前記ＩＧＢＴをオフさせる場合には前記ドライバーＩＣの出力から前記ＩＧＢＴのゲートにシンク電流を供給する駆動回路内に、
外部制御回路からのオン信号指令に基づいてソース電流を出力するオン用スイッチと、外部制御回路からのオフ信号に基づいてシンク電流を出力するオフ用スイッチと、前記電流検出用補助素子の電流を電圧に変換する抵抗と、前記抵抗の電圧と第１の基準電圧とを入力としたコンパレータと、前記コンパレータの出力信号で動作と停止が切替可能な演算増幅器と、前記演算増幅器の出力電圧を決める第２の基準電圧と、を備え、前記演算増幅器の出力は前記オン用スイッチの出力と前記ドライバーＩＣの出力との間に接続され、前記抵抗の電圧が第１の基準電圧より大きい場合には、前記オン用スイッチをオフさせると共に、前記演算増幅器を動作状態とすることを特徴とする電力変換回路用半導体装置。 A semiconductor device for a power conversion circuit including an IGBT including a current detection auxiliary element, a diode, and a driver IC,
When turning on the IGBT, a source current is injected from the output of the driver IC to the gate of the IGBT, and when turning off the IGBT, a sink current is supplied from the output of the driver IC to the gate of the IGBT. In the drive circuit that
An ON switch that outputs a source current based on an ON signal command from an external control circuit, an OFF switch that outputs a sink current based on an OFF signal from the external control circuit, and the current of the current detection auxiliary element A resistor that converts voltage, a comparator that receives the voltage of the resistor and the first reference voltage, an operational amplifier that can be switched between operation and stop by an output signal of the comparator, and an output voltage of the operational amplifier are determined A second reference voltage, and an output of the operational amplifier is connected between an output of the switch for turning on and an output of the driver IC, and the voltage of the resistor is larger than the first reference voltage. A semiconductor device for a power conversion circuit, wherein the on switch is turned off and the operational amplifier is set in an operating state.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9570905B2 (en) | 2012-09-24 | 2017-02-14 | Toyota Jidosha Kabushiki Kaisha | Semiconductor drive apparatus |
| WO2017056679A1 (en) * | 2015-09-30 | 2017-04-06 | 富士電機株式会社 | Multi-phase power conversion device control circuit |
| CN107528551A (en) * | 2016-06-22 | 2017-12-29 | 联咏科技股份有限公司 | Electric current bootstrapping comparator and operational amplifier |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001197724A (en) * | 2000-01-14 | 2001-07-19 | Fuji Electric Co Ltd | Gate drive circuit for power semiconductor element |
| JP2001345688A (en) * | 2000-03-31 | 2001-12-14 | Denso Corp | Semiconductor switching element driving circuit |
| JP2010062860A (en) * | 2008-09-03 | 2010-03-18 | Fuji Electric Systems Co Ltd | Switching element drive circuit |
-
2012
- 2012-04-02 JP JP2012083957A patent/JP2013214875A/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001197724A (en) * | 2000-01-14 | 2001-07-19 | Fuji Electric Co Ltd | Gate drive circuit for power semiconductor element |
| JP2001345688A (en) * | 2000-03-31 | 2001-12-14 | Denso Corp | Semiconductor switching element driving circuit |
| JP2010062860A (en) * | 2008-09-03 | 2010-03-18 | Fuji Electric Systems Co Ltd | Switching element drive circuit |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9570905B2 (en) | 2012-09-24 | 2017-02-14 | Toyota Jidosha Kabushiki Kaisha | Semiconductor drive apparatus |
| WO2017056679A1 (en) * | 2015-09-30 | 2017-04-06 | 富士電機株式会社 | Multi-phase power conversion device control circuit |
| CN107408878A (en) * | 2015-09-30 | 2017-11-28 | 富士电机株式会社 | The control circuit of polyphase electric power converting means |
| JPWO2017056679A1 (en) * | 2015-09-30 | 2017-12-28 | 富士電機株式会社 | Control circuit for multiphase power converter |
| US10141834B2 (en) | 2015-09-30 | 2018-11-27 | Fuji Electric Co., Ltd | Multi-phase power conversion device control circuit |
| CN107408878B (en) * | 2015-09-30 | 2019-07-30 | 富士电机株式会社 | The control circuit of polyphase electric power converting means |
| CN107528551A (en) * | 2016-06-22 | 2017-12-29 | 联咏科技股份有限公司 | Electric current bootstrapping comparator and operational amplifier |
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