JP2013149842A - Method of manufacturing silicon carbide semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a silicon carbide semiconductor device that can improve channel mobility by suppressing a decrease in threshold voltage.SOLUTION: A silicon dioxide film is formed as a gate oxide film 15 on a silicon carbide base 10, and the silicon carbide base 10 having the silicon dioxide film formed is thermally treated in an atmosphere including nitrogen oxide gas to be nitrided in a reactor. Consequently, a silicon carbide semiconductor device 1 can be improved in channel mobility. After the nitriding, the temperature in the reactor is lowered in the atmosphere including the nitrogen oxide gas. Consequently, formation of an oxygen vacancy after the nitriding can be suppressed, so that the silicon carbide semiconductor device 1 can be suppressed from decreasing in threshold voltage to have higher channel mobility.

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device.

  Silicon carbide (SiC) has an excellent physical property value, and enables realization of a power device having a high breakdown voltage and a low loss. In a silicon carbide semiconductor device using silicon carbide, such as a metal oxide semiconductor field effect transistor (abbreviation: MOSFET), a silicon dioxide film is provided on a silicon carbide substrate.

  Many interface states exist at the interface between silicon carbide and silicon dioxide. For example, after a silicon dioxide film is formed on a silicon carbide substrate, an interface level (hereinafter sometimes referred to as “defect level”) due to defects may occur at the interface between silicon carbide and silicon dioxide. is there. The defect level is an interface level close to the conduction band. Due to this defect level, the channel mobility of the MOSFET becomes extremely small compared to the electron mobility in the SiC bulk. As a result, the on-resistance value becomes higher than an ideal value.

As a cause of the generation of defect levels at the interface between silicon carbide and silicon dioxide after the formation of a silicon dioxide film on a silicon carbide substrate, precipitation of carbon atoms at the interface is considered. In order to reduce the density of defect states at the interface between silicon carbide and silicon dioxide, an atmosphere of nitrogen oxide gas such as nitrogen monoxide (NO) gas or dinitrogen monoxide (N ₂ O) gas, or Nitriding by heat treatment in an ammonia (NH ₃ ) gas atmosphere is effective. In particular, nitriding with nitrogen monoxide gas is effective. The defect level generated at the interface between silicon carbide and silicon dioxide by nitriding becomes electrically inactive.

  In order to effectively perform the nitriding treatment, the temperature at which the nitriding treatment is performed (hereinafter sometimes referred to as “nitriding treatment temperature”) is often relatively high (see, for example, Patent Documents 1 and 2). For example, in the technique disclosed in Patent Document 1, the temperature is 1100 ° C. to 1250 ° C., and in the technique disclosed in Patent Document 2, the temperature is 1000 ° C. to 1300 ° C. Further, in order to effectively perform the nitriding treatment, the nitrogen oxide gas is sometimes diluted with an inert gas such as argon gas or nitrogen gas (for example, see Patent Documents 2 to 4).

  After the nitriding process is completed, the silicon carbide substrate is taken out of the reaction furnace. The silicon carbide substrate is taken out at a temperature lower than the nitriding temperature and hardly reacting with the atmosphere, for example, 500 ° C. to 800 ° C. When the silicon carbide substrate is taken out, the temperature in the reaction furnace is lowered from the nitriding temperature to the substrate take-out temperature after the inside of the reaction furnace is made an inert gas atmosphere (hereinafter sometimes referred to as “inert gas atmosphere”). .

  At this time, if the atmosphere in the reaction furnace is replaced with an inert gas atmosphere immediately after the nitriding treatment is completed, the silicon carbide substrate is exposed to a high-temperature inert gas atmosphere. In a high-temperature inert gas atmosphere, oxygen atoms are easily released from the silicon dioxide film on the silicon carbide substrate, so that many oxygen vacancies are generated in the silicon dioxide film.

  The oxygen vacancies in the silicon dioxide film capture positive holes and are positively charged. Therefore, when oxygen vacancies are generated in the silicon dioxide film, the positive charge increases. When the positive charge increases in the silicon dioxide film, the threshold voltage of the MOSFET having the silicon dioxide film as a gate insulating film is lowered. Further, oxygen vacancies in the silicon dioxide film cause instability of the threshold voltage and cause long-term reliability degradation (see, for example, Non-Patent Document 1).

JP 2005-136386 A JP 2006-210818 A Japanese Patent No. 4164575 International Publication No. 2010/103820 Pamphlet

R. Green, A.M. Lelis, D.C. Hubersat, "Application of reliability test standards to SiC Power MOSFETs", Reliability Physics Symposium (IRPS), IEEE International, 2011, pp. EX. 2.1-EX. 2.9

  As described above, since the density of defect levels is relatively high at the interface between silicon carbide and silicon dioxide, the channel mobility of a MOSFET using silicon carbide (hereinafter sometimes referred to as “silicon carbide MOSFET”) is SiC. Smaller than the electron mobility in the bulk. After the formation of the silicon dioxide film, it is possible to reduce the interface state density and improve the channel mobility by performing nitriding at a relatively high temperature, but the following problems arise.

  After completion of the nitriding treatment, the atmosphere in the reaction furnace is replaced with an inert gas atmosphere from the nitrogen oxide gas atmosphere or the ammonia gas atmosphere, so that the silicon carbide substrate is exposed to a high-temperature inert gas atmosphere. In a high-temperature inert gas atmosphere, oxygen atoms are released from the silicon dioxide film on the silicon carbide substrate, and oxygen vacancies are generated. Oxygen vacancies are positively charged and become positive charges by capturing holes, so that when oxygen vacancies are generated, the positive charges increase and the threshold voltage of the MOSFET decreases. In addition, oxygen vacancies in the silicon dioxide film cause destabilization of the threshold voltage and cause long-term reliability degradation.

  When a silicon carbide semiconductor device such as a MOSFET is used as a power device, securing high withstand voltage characteristics is a top priority. In order to ensure high breakdown voltage characteristics, a certain amount of threshold voltage is required. Therefore, in the development of MOSFETs using silicon carbide, it is an urgent task to improve the channel mobility and establish a threshold voltage control technique.

  An object of the present invention is to provide a method for manufacturing a silicon carbide semiconductor device capable of improving channel mobility while suppressing a decrease in threshold voltage.

  The method for manufacturing a silicon carbide semiconductor device of the present invention includes a substrate preparation step of preparing a silicon carbide substrate and an insulating film formation step of forming an insulating film on the silicon carbide substrate, the insulating film formation step comprising: A silicon dioxide film forming step of forming a silicon dioxide film to be the insulating film on a silicon substrate, and the silicon carbide substrate on which the silicon dioxide film is formed in an atmosphere containing nitrogen oxide gas in a reaction furnace A nitriding treatment step for performing nitriding treatment by heat treatment, and a temperature lowering step for lowering the temperature in the reaction furnace in an atmosphere containing the nitrogen oxide gas after the nitriding treatment step.

  According to the method for manufacturing a silicon carbide semiconductor device of the present invention, a silicon carbide semiconductor device is manufactured through a substrate preparation step and an insulating film formation step. In the substrate preparation step, a silicon carbide substrate is prepared. In the insulating film forming step, an insulating film is formed on the silicon carbide substrate. At this time, first, in the silicon dioxide film forming step, a silicon dioxide film serving as an insulating film is formed on the silicon carbide substrate. The silicon carbide substrate on which the silicon dioxide film is formed is nitrided by being heat-treated in an atmosphere containing nitrogen oxide gas in a reaction furnace in a nitriding process. By this nitriding treatment, the channel mobility of the silicon carbide semiconductor device can be improved. After the nitriding treatment step, the temperature in the reaction furnace is lowered in an atmosphere containing nitrogen oxide gas in the temperature lowering step. By lowering the temperature in this way, generation of oxygen vacancies after nitriding treatment can be suppressed, so that a decrease in threshold voltage of the silicon carbide semiconductor device can be suppressed. Therefore, the channel mobility can be improved while suppressing a decrease in threshold voltage of the silicon carbide semiconductor device.

It is sectional drawing which shows the structure of the silicon carbide semiconductor device 1 manufactured by the manufacturing method of the silicon carbide semiconductor device which is one Embodiment of this invention. It is a flowchart which shows the process sequence of the manufacturing method of the silicon carbide semiconductor device which is one Embodiment of this invention. It is sectional drawing which shows the state of the board | substrate 11 in the stage where formation of the drift layer 12 was complete | finished. It is sectional drawing which shows the state of the drift layer 12 and the board | substrate 11 of the stage which the formation of base region 13a, 13b was complete | finished. It is sectional drawing which shows the state of the drift layer 12 and the board | substrate 11 of the stage which completed formation of source region 14a, 14b. 2 is a cross-sectional view showing the state of the substrate 10 at the stage where the formation of the gate oxide film 15 is completed. FIG. FIG. 6 is a cross-sectional view showing the substrate 10 at a stage where the formation of the gate electrode 16 has been completed. 2 is a cross-sectional view showing a state of a substrate 10 at a stage where patterning of a gate oxide film 15 is completed. FIG. It is sectional drawing which shows the state of the base | substrate 10 in the stage which completed formation of the source electrodes 17a and 17b. It is a figure which shows the process sequence of the nitriding process process and temperature-fall process in one Embodiment of this invention. It is a figure which shows the process sequence of the nitriding process process and temperature-fall process in a comparative example. It is a graph which shows the gate voltage-drain current characteristic of MOSFET manufactured by the Example and the comparative example.

  FIG. 1 is a cross sectional view showing a configuration of a silicon carbide semiconductor device 1 manufactured by a method for manufacturing a silicon carbide semiconductor device according to an embodiment of the present invention. Silicon carbide semiconductor device 1 in the present embodiment is a metal-oxide-semiconductor field effect transistor (MOSFET) using silicon carbide (SiC). In the following description, a MOSFET using silicon carbide may be referred to as a “silicon carbide MOSFET”.

  A silicon carbide semiconductor device 1 includes a silicon carbide (SiC) substrate (hereinafter sometimes simply referred to as “substrate”) 11, a drift layer 12, base regions 13 a and 13 b, source regions 14 a and 14 b, and a gate oxide film that are semiconductor substrates. 15, a gate electrode 16, source electrodes 17a and 17b, and a drain electrode 18. Substrate 11, drift layer 12, base regions 13 a and 13 b, and source regions 14 a and 14 b constitute a silicon carbide substrate (hereinafter sometimes simply referred to as “substrate”) 10. In the following embodiments, the first conductivity type is n-type and the second conductivity type is p-type.

  The substrate 11 is realized by an n-type silicon carbide (SiC) substrate that is a first conductivity type. Drift layer 12 is made of silicon carbide, specifically, n-type silicon carbide which is the first conductivity type. The drift layer 12 is formed by being laminated on the surface on one side in the thickness direction of the substrate 11.

  A pair of base regions 13 a and 13 b are formed in part on the surface portion of the drift layer 12 on one side in the thickness direction. In the following description, when the base regions 13a and 13b are distinguished from each other, they are referred to as a first base region 13a and a second base region 13b. The first and second base regions 13a and 13b are formed at a predetermined depth from the surface on one side in the thickness direction of the drift layer 12 with a space therebetween. Each base region 13a, 13b contains a p-type impurity, for example, aluminum (Al), which is a second conductivity type impurity (hereinafter sometimes referred to as “second conductivity type impurity”).

  Source regions 14a and 14b are partially formed on the surface portion on one side in the thickness direction of each base region 13a and 13b. That is, a pair of source regions 14a and 14b are formed in part on the surface portion on one side in the thickness direction of the drift layer 12 and on the surface portion on one side in the thickness direction of the base regions 13a and 13b. In the following description, when the source regions 14a and 14b are shown separately, they are referred to as a first source region 14a and a second source region 14b.

  Each source region 14a, 14b is formed shallower than each base region 13a, 13b in a part of the surface portion on one side in the thickness direction of each base region 13a, 13b. Each source region 14a, 14b contains an n-type impurity, for example, nitrogen (N), which is an impurity of the first conductivity type (hereinafter sometimes referred to as “first conductivity-type impurity”).

  The gate oxide film 15 is formed on the surface on one side in the thickness direction of the pair of base regions 13a and 13b and the drift layer 12 therebetween, extending to the source regions 14a and 14b. In the present embodiment, gate oxide film 15 is a silicon dioxide film. The gate oxide film 15 functions as a gate insulating film.

  The gate electrode 16 is formed on the surface of one side in the thickness direction of the gate oxide film 15. The gate electrode 16 is formed so as to reach the source regions 14a and 14b from the drift layer 12 between the pair of base regions 13a and 13b when viewed in plan from one side in the thickness direction.

  The source electrode 17 is formed so as to cover portions of the base regions 13a and 13b that are not covered with the gate oxide film 15 and cover portions of the source regions 14a and 14b that are not covered with the gate oxide film 15. That is, a pair of source electrodes 17a and 17b is formed in a portion not covered with the gate oxide film 15 on the surface of the drift layer 12 on one side in the thickness direction. In the following description, when the source electrodes 17a and 17b are shown separately, they are referred to as a first source electrode 17a and a second source electrode 17b.

  The first source electrode 17a is formed on the surface of one side in the thickness direction of the first base region 13a, and is electrically connected to the first source region 14a. The second source electrode 17b is formed on the surface of one side in the thickness direction of the second base region 13b, and is electrically connected to the second source region 14b.

  The drain electrode 18 is formed on the surface opposite to the surface on one side in the thickness direction of the substrate 11, that is, on the surface on the other side in the thickness direction of the substrate 11. The drain electrode 18 is electrically connected to the substrate 11.

  In the silicon carbide semiconductor device 1 shown in FIG. 1, when a voltage is applied to the gate electrode 16, inversion channel layers are formed on the surfaces of the base regions 13a and 13b immediately below the gate electrode 16, and the source regions 14a and 14b and the drift layer are formed. 12, a path through which charges flow is formed.

  When silicon carbide MOSFET that is silicon carbide semiconductor device 1 is an n-channel MOSFET that uses electrons as carriers, electrons flow into drift layer 12 from source regions 14a and 14b. The electrons flowing into the drift layer 12 flow through the drift layer 12 and the substrate 11 according to the electric field formed by the voltage applied to the drain electrode 18 and reach the drain electrode 18. Therefore, by applying a voltage to the gate electrode 16, a current flows from the drain electrode 18 to the source electrodes 17a and 17b.

  When the silicon carbide MOSFET is a p-channel MOSFET using holes as carriers, holes are injected from the drain electrode 18. The injected holes flow through the drift layer 12 and reach the base regions 13a and 13b, and then pass through the inversion channel layers formed on the surfaces of the base regions 13a and 13b to form the source electrodes 17a and 17b. It flows into the source regions 14a and 14b according to the potential. As a result, holes flow from the drain electrode 18 to the source electrodes 17a and 17b.

  Silicon carbide semiconductor device 1 shown in FIG. 1 is manufactured as follows using the method for manufacturing the silicon carbide semiconductor device of the present embodiment. Hereinafter, it demonstrates in order of a process, referring drawings.

  FIG. 2 is a flowchart showing a processing procedure of the method for manufacturing the silicon carbide semiconductor device according to the embodiment of the present invention. The method for manufacturing a silicon carbide semiconductor device of the present embodiment includes a base preparation step, a gate oxide film formation step, and an electrode formation step. The gate oxide film forming step includes a silicon dioxide film forming step, a nitriding treatment step, and a temperature lowering step. The method for manufacturing the silicon carbide semiconductor device of the present embodiment starts when necessary devices and materials are prepared, and proceeds to the substrate preparation step of step S1.

  3-5 is a figure for demonstrating a base | substrate preparation process. In the substrate preparation step of step S1, the substrate 10 is prepared. In the present embodiment, the substrate 10 is produced as follows. Although different from the present embodiment, a separately prepared substrate 10 may be prepared.

FIG. 3 is a cross-sectional view showing the state of the substrate 11 at the stage where the formation of the drift layer 12 is completed. In the substrate preparation step of step S1, first, the n-type silicon carbide substrate 11 having the first conductivity type is formed on the surface on one side in the thickness direction of the n-type silicon carbide substrate 11 having the first conductivity type by using an epitaxial crystal growth method. Drift layer 12 made of a silicon carbide epitaxial layer is formed. The dimension in the thickness direction of the drift layer 12 (hereinafter sometimes referred to as “thickness”) is about 5 μm to 50 μm. The concentration of the first conductivity type impurity in the drift layer 12 (hereinafter sometimes referred to as “first conductivity type impurity concentration”) is about 1 × 10 ¹⁵ cm ⁻³ to 1 × 10 ¹⁸ cm ⁻³ .

  By forming the drift layer 12 under the above conditions, a vertical type high breakdown voltage MOSFET having a breakdown voltage of several hundred V to 3 kV or more can be realized as the nitride semiconductor device 1.

  As the plane orientation of silicon carbide substrate 11, (0001) plane, (000-1) plane, (11-20) plane, or the like can be used. In addition, as the polytype of silicon carbide substrate 11, any of 4H, 6H, and 3C can be used.

  FIG. 4 is a cross-sectional view showing the state of the drift layer 12 and the substrate 11 at the stage where the formation of the base regions 13a and 13b is completed. After forming the drift layer 12 as described above, a mask (not shown) is formed so that the region for forming the base regions 13a and 13b is exposed on the surface of the drift layer 12 on one side in the thickness direction. For example, a mask is formed from resist, silicon dioxide, silicon nitride, or the like using photolithography.

  Using the formed mask as an impurity implantation blocking film, impurities are ion-implanted from one side in the thickness direction of the substrate 11 to form a pair of base regions 13a and 13b. Specifically, second conductivity type base regions 13a and 13b are formed by ion implantation of a second conductivity type impurity. When the mask is removed after the ion implantation, the cross-sectional structure shown in FIG. 4 is obtained.

  When silicon carbide semiconductor device 1 to be manufactured is an n-channel MOSFET, for example, boron (B) or aluminum (Al) can be used as the second conductivity type impurity introduced into base regions 13a and 13b. When silicon carbide semiconductor device 1 to be manufactured is a p-channel MOSFET, for example, phosphorus (P) or nitrogen (N) can be used as the second conductivity type impurity.

  The depth of each base region 13a, 13b is required not to exceed the thickness of the drift layer 12. Specifically, the depth of each base region 13a, 13b is, for example, about 0.5 μm to 3 μm. Here, the “depth” refers to the distance from the surface on one side in the thickness direction of the drift layer 12.

The concentration of the second conductivity type impurity in each of the base regions 13 a and 13 b (hereinafter sometimes referred to as “second conductivity type impurity concentration”) is selected to be a concentration exceeding the first conductivity type impurity concentration in the drift layer 12. The second conductivity type impurity concentration in each of the base regions 13a and 13b is, for example, about 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .

  FIG. 5 is a cross-sectional view showing the state of the drift layer 12 and the substrate 11 at the stage where the formation of the source regions 14a and 14b is completed. A mask (not shown) is formed on the surface of the drift layer 12 on one side in the thickness direction so as to expose portions where the source regions 14a and 14b are to be formed by using a photoengraving technique.

  Using the mask thus formed, first conductivity type impurities are ion-implanted into the base regions 13a and 13b to form first conductivity type source regions 14a and 14b, respectively. After the ion implantation, if the mask used for forming the source regions 14a and 14b is removed, the cross-sectional structure shown in FIG. 5 is obtained. In this way, the substrate 10 composed of the substrate 11, the drift layer 12, the base regions 13a and 13b, and the source regions 14a and 14b is obtained.

  As the first conductivity type impurity introduced into source regions 14a and 14b, when silicon carbide semiconductor device 1 to be manufactured is an n-channel MOSFET, for example, phosphorus (P) or nitrogen (N) can be used. When silicon carbide semiconductor device 1 to be manufactured is a p-channel MOSFET, for example, boron (B) or aluminum (Al) can be used.

The source regions 14a and 14b are formed shallower than the base regions 13a and 13b. That is, the depth of the source regions 14a and 14b is selected to be smaller than the depth of the base regions 13a and 13b. The concentration of the first conductivity type impurity introduced into each source region 14a, 14b is, for example, about 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ .

  After removal of the mask, the substrate 10 is heat-treated by a heat treatment apparatus under a high temperature condition of, for example, 1300 ° C. to 1900 ° C., for example, for about 30 seconds to 1 hour. As a result, the implanted ions are electrically activated. When the substrate 10 is manufactured as described above, the process proceeds to the gate oxide film forming step in step S2.

  FIG. 6 is a cross-sectional view showing the state of the substrate 10 at the stage where the formation of the gate oxide film 15 is completed. In the gate oxide film forming step in step S2, the gate oxide film 15 is formed on the substrate 10 as follows. First, in the silicon dioxide film forming process of step S21, silicon dioxide that becomes the gate oxide film 15 is formed on the surface on one side in the thickness direction of the substrate 10 by, for example, chemical vapor deposition (abbreviation: CVD). A film is formed. In the CVD method, the substrate 10 is put into a reaction furnace to form a silicon dioxide film.

  In the silicon dioxide film forming step of step S21, a silicon dioxide film may be formed by thermal oxidation in an atmosphere containing oxygen instead of chemical vapor deposition. After the formation of the silicon dioxide film, the substrate 10 is taken out from the reaction furnace, and the process proceeds to the nitriding process in step S22.

  In the nitriding process in step S22, nitriding is performed as follows. After the substrate 10 is put into the reaction furnace for nitriding treatment, the temperature in the reaction furnace is increased by setting the atmosphere in the reaction furnace as an inert gas atmosphere (hereinafter sometimes referred to as “inert gas atmosphere”). For example, nitrogen gas, argon gas or helium gas is used as the inert gas.

When the inside of the reaction furnace reaches a predetermined nitriding temperature, the atmosphere in the reaction furnace is replaced with an atmosphere containing nitrogen oxide gas (hereinafter sometimes referred to as “nitrogen oxide gas atmosphere”). As the nitrogen oxide gas, at least one gas selected from nitrogen monoxide (NO) gas, dinitrogen monoxide (N ₂ O) gas, and nitrogen dioxide (NO ₂ ) gas is used. Among these, for example, it is desirable to use nitrogen monoxide gas or dinitrogen monoxide gas, and it is particularly desirable to use nitrogen monoxide gas.

  From the time when the atmosphere in the reaction furnace is replaced with the nitrogen oxide gas atmosphere, the temperature in the reaction furnace is maintained at the nitriding temperature in the nitrogen oxide gas atmosphere until a predetermined nitriding time elapses. The nitriding time is preferably about 10 minutes to 10 hours.

  By performing such a nitriding process, it is possible to prevent the occurrence of defects and improve the state of the interface between silicon dioxide and silicon carbide.

  The nitrogen oxide gas atmosphere in the reactor during the nitriding treatment includes not only a gas atmosphere containing only the nitrogen oxide gas, but also nitrogen oxide gas such as nitrogen monoxide gas or dinitrogen monoxide gas, nitrogen gas, A gas atmosphere diluted with an inert gas such as argon gas or helium gas may be used. The nitrogen oxide gas atmosphere may include two or more types of nitrogen oxide gases. For example, an atmosphere in which nitrogen monoxide gas and dinitrogen monoxide gas are mixed may be used as the nitrogen oxide gas atmosphere.

  The nitriding temperature is preferably 900 ° C. or higher and 1450 ° C. or lower, and particularly preferably 1150 ° C. or higher and 1350 ° C. or lower. Under low temperature conditions of less than 1150 ° C., the nitriding rate is relatively slow, and the inactivation of interface states by nitrogen atoms does not proceed easily. In particular, under a low temperature condition of less than 900 ° C., the nitriding rate is very slow, and interface state inactivation by nitrogen atoms hardly proceeds.

  Further, under high temperature conditions exceeding 1350 ° C., thermal oxidation by oxygen generated by decomposition of nitric oxide or dinitrogen monoxide proceeds, and a new interface state increases. In particular, under high temperature conditions exceeding 1450 ° C., thermal oxidation by oxygen generated by decomposition of nitric oxide or dinitrogen monoxide tends to proceed, and new interface states tend to increase.

  Therefore, the nitriding temperature is preferably 900 ° C. or higher and 1450 ° C. or lower, and particularly preferably 1150 ° C. or higher and 1350 ° C. or lower. Based on this, in this embodiment, in the nitriding process, the temperature in the reaction furnace is set to 900 ° C. or higher and 1450 ° C. or lower, specifically, 1150 ° C. or higher and 1350 ° C. or lower, and heat treatment is performed.

  After performing the nitriding process as described above, the process proceeds to a temperature lowering process in step S23. In the temperature lowering step in step S23, the temperature is lowered in a state where the inside of the reaction furnace is filled with a nitrogen oxide gas atmosphere. It is desirable to lower the temperature in the nitrogen oxide gas atmosphere until the temperature in the reactor becomes 950 ° C. or lower. If the temperature in the reaction furnace becomes 950 ° C. or lower, the gas atmosphere in the reaction furnace may be replaced with an inert gas atmosphere. This is due to the following reason.

  According to the following reference 1, the diffusion energy of oxygen in silicon dioxide is approximately 1.3 eV. Reference 1: E.E. L. Williams, Journal of the American Ceramic Society, 1965, 48, p. 190

The diffusion coefficient of oxygen at 1300 ° C. in silicon dioxide is 1.4 × 10 ⁻¹³ cm ² / sec, whereas the diffusion coefficient of oxygen at 950 ° C. in silicon dioxide is 8.8 × 10 6. ^-15 cm ² / sec. That is, at 950 ° C., the diffusion coefficient of oxygen in silicon dioxide decreases to 1/10 (1/10) or less of the diffusion coefficient at 1300 ° C. That is, in the temperature range of 950 ° C. or lower, the diffusion of oxygen in the silicon dioxide film is suppressed, and the number of oxygen vacancies is reduced. Therefore, by lowering the temperature to 950 ° C. or lower in a state where the reaction furnace is filled with a nitrogen oxide gas atmosphere, the effects of the present invention described later can be sufficiently obtained.

  From the above, in the present embodiment, the temperature drop in the nitrogen oxide gas atmosphere is set to, for example, 900 ° C., and thereafter, the temperature is replaced with an inert gas atmosphere such as nitrogen gas and the substrate 10 is taken out in advance. The temperature is lowered to the temperature. In order to obtain the maximum effect of the present invention, the atmosphere in the reaction furnace may be replaced with an inert gas atmosphere after the temperature in the reaction furnace reaches the temperature at which the substrate 10 is taken out.

  The temperature at which the substrate 10 is taken out is selected so as to be lower than the nitriding temperature and hardly react with the atmosphere. Specifically, the temperature at which the substrate 10 is taken out is, for example, 500 ° C. to 800 ° C.

  After the substrate 10 is taken out as described above, the process proceeds to the electrode forming step of step S3. 7-9 is a figure for demonstrating an electrode formation process. In the electrode forming step in step S3, the gate electrode 16, the source electrode 17, and the drain electrode 18 shown in FIG. 1 are formed as follows.

  FIG. 7 is a cross-sectional view showing the substrate 10 at the stage where the formation of the gate electrode 16 has been completed. A gate electrode film to be the gate electrode 16 is formed on the surface of the gate oxide film 15 on one side in the thickness direction.

  Next, the gate electrode film is patterned using the photoengraving technique to form the gate electrode 16. In the gate electrode 16, the base regions 13 a and 13 b and the source regions 14 a and 14 b are located at both ends of the gate electrode 16, and the drift layer 12 exposed between the pair of base regions 13 a and 13 b is formed at the center of the gate electrode 16. It is formed by patterning the gate electrode film so as to be positioned.

  The gate electrode 16 and the pair of source regions 14a and 14b are desirably formed so as to overlap each other in a range of, for example, 10 nm to 5 μm when viewed in plan from one side in the thickness direction. As a result, the influence of the fringe effect at the end of the gate electrode 16 can be suppressed, and a voltage can be uniformly applied to the surfaces of the base regions 13a and 13b. Therefore, the inversion channel layer can be reliably formed on the surfaces of the base regions 13a and 13b.

  As a material of the gate electrode 16, n-type or p-type polycrystalline silicon (polysilicon) may be used, or n-type or p-type polycrystalline silicon carbide may be used. Alternatively, a low-resistance refractory metal such as aluminum, titanium, molybdenum, tantalum, niobium, or tungsten may be used, or a nitride of these low-resistance refractory metals may be used.

  FIG. 8 is a cross-sectional view showing the state of the substrate 10 at the stage where the patterning of the gate oxide film 15 is completed. After the patterning of the gate electrode 16, unnecessary portions of the gate oxide film 15 are removed by patterning using a photoengraving technique and wet etching or dry etching. As a result, as shown in FIG. 8, the surfaces of the source regions 14a and 14b are exposed. The gate oxide film 15 is formed so that the dimension in the width direction perpendicular to the thickness direction is longer than that of the gate electrode 16. Thus, the source electrodes 17a and 17b and the gate electrode 16 formed in the next process can be reliably electrically separated.

  FIG. 9 is a cross-sectional view showing the state of the substrate 10 at the stage where the formation of the source electrodes 17a and 17b is completed. After patterning the gate oxide film 15, source electrodes 17a and 17b are formed in the exposed portions of the source regions 14a and 14b, as shown in FIG. Specifically, after forming a source electrode film to be the source electrodes 17a and 17b, the source electrodes 17a and 17b are formed by patterning.

  Thereafter, the drain electrode 18 is formed on the back surface of the substrate 11, that is, the surface on the other side in the thickness direction, as shown in FIG. Thereby, the main part of silicon carbide semiconductor device 1 having the element structure shown in FIG. 1 is completed.

  As a material for the source electrodes 17a and 17b and the drain electrode 18, aluminum, nickel, titanium, copper, gold, or the like may be used, or a composite material thereof may be used.

  After the formation of the source electrodes 17a and 17b, a heat treatment at about 1000 ° C. may be performed in order to obtain ohmic contact with the source regions 14a and 14b of the source electrodes 17a and 17b. In addition, after the drain electrode 18 is formed, a heat treatment at about 1000 ° C. may be performed in order to obtain an ohmic contact of the drain electrode 18 with the substrate 11.

  As described above, according to the method for manufacturing the silicon carbide semiconductor device of the present embodiment, the silicon dioxide film to be gate oxide film 15 is formed on substrate 10 in the silicon dioxide film forming process of the gate oxide film forming process. . The substrate 10 on which the silicon dioxide film is formed is subjected to nitriding treatment by heat treatment in an atmosphere containing nitrogen oxide gas in a reaction furnace in a nitriding step. By this nitriding treatment, the channel mobility of silicon carbide semiconductor device 1 can be improved.

  After the nitriding treatment step, the temperature in the reaction furnace is lowered in an atmosphere containing nitrogen oxide gas in the temperature lowering step. By lowering the temperature in this way, it is possible to suppress the generation of oxygen vacancies after the nitriding treatment, and thus it is possible to suppress a decrease in the threshold voltage of silicon carbide semiconductor device 1. Since this effect is limited only to the reduction of the fixed charge in the gate insulating film 15 which is a gate insulating film, the channel mobility does not decrease along with the reduction of the threshold voltage. Therefore, a decrease in threshold voltage of silicon carbide semiconductor device 1 can be suppressed and channel mobility can be improved.

  10 and 11 are diagrams showing process sequences in the nitriding treatment step and the temperature lowering step. FIG. 10 is a diagram showing a process sequence of the nitriding treatment step and the temperature lowering step in the embodiment of the present invention. In FIG. 10, as an example, a silicon dioxide film is formed by CVD in the gate oxide film forming process in step S <b> 21 shown in FIG. 2, and nitriding is performed with nitrogen monoxide gas in the nitriding process in step S <b> 22. A process sequence when the temperature in the reactor is lowered with a nitrogen oxide gas atmosphere in the temperature lowering step is shown.

  FIG. 11 is a diagram illustrating a process sequence of a nitriding process and a temperature lowering process in the comparative example. In FIG. 11, as a comparative example, after performing the gate oxide film forming step of step S21 and the nitriding step of step S22 as in the embodiment, the inside of the reaction furnace is replaced with nitrogen gas which is an inert gas. A process sequence in a case where the temperature in the reaction furnace is lowered to the substrate take-out temperature as the gas atmosphere is shown.

  In both the example and the comparative example, the temperature increase of the nitriding reactor is started at time t1. When the temperature in the reaction furnace reaches a predetermined substrate charging / discharging temperature T0 at time t2, the substrate 10 is charged into the reaction furnace. At this time, the inside of the reaction furnace is an inert gas atmosphere A0. The substrate charging / discharging temperature T0 is a temperature that is predetermined as the charging temperature of the substrate 10 and a temperature that is predetermined as the discharging temperature of the substrate 10.

  At time t3, the temperature rise of the reactor is resumed. When the temperature in the reaction furnace reaches a predetermined nitriding temperature TN at time t4, the atmosphere in the reaction furnace is replaced with the nitrogen oxide gas atmosphere AN at time t5, and heat treatment is started. When a predetermined nitriding time elapses at time t6, the heat treatment is finished.

  In the example shown in FIG. 10, when the heat treatment is completed at time t6, the process proceeds to the temperature lowering process of step S23 shown in FIG. When the temperature in the reaction furnace reaches 900 ° C. at time t7, the atmosphere in the reaction furnace is replaced with an inert gas atmosphere A0. In this embodiment, an atmosphere of nitrogen gas is used as the inert gas atmosphere A0.

  Thereafter, the temperature decrease of the reaction furnace is continued. When the temperature in the reaction furnace reaches a predetermined substrate loading / unloading temperature T0 at time t8, the temperature decrease is completed, and at time t9, the substrate 10 is removed from the reaction furnace. The The temperature in the reaction furnace returns to the temperature before the temperature rise at time t10.

  In contrast, in the comparative example shown in FIG. 11, when the heat treatment is completed at time t6, the atmosphere in the reaction furnace is replaced with the inert gas atmosphere A0. Thereafter, at time t11, temperature reduction is started in the inert gas atmosphere A0. When the temperature in the reaction furnace reaches the substrate charging / discharging temperature T0 at time t12, the temperature drop is finished, and at time t13, the substrate 10 is extracted from the reaction furnace. The temperature in the reaction furnace returns to the temperature before the temperature rise at time t14.

  FIG. 12 is a graph showing gate voltage-drain current characteristics of MOSFETs manufactured in Examples and Comparative Examples. In FIG. 12, the measurement result of the MOSFET manufactured in the example is indicated by a black circle “●”, and the measurement result of the MOSFET manufactured in the comparative example is indicated by a white circle “◯”. In FIG. 12, the horizontal axis represents the gate voltage [V], and the vertical axis represents the drain current [A]. The gate voltage at the intersection of the straight line indicated by reference numeral “31” and the horizontal axis corresponds to the threshold voltage of the MOSFET manufactured in the example. The gate voltage at the intersection of the straight line indicated by the reference sign “32” and the horizontal axis corresponds to the threshold voltage of the MOSFET manufactured in the comparative example.

  From FIG. 12, it can be seen that the threshold voltage of the MOSFET manufactured in the example is increased by about 1.0 V compared to the MOSFET manufactured in the comparative example. From this, it can be seen that the decrease in the threshold voltage can be suppressed by lowering the temperature in the reaction furnace after the nitriding treatment in the nitrogen oxide gas atmosphere AN as in the embodiment.

  As described above, according to the present embodiment, after the nitriding process, the temperature in the reaction furnace is lowered in the nitrogen oxide gas atmosphere AN, so that a decrease in threshold voltage due to the nitriding process can be suppressed. Thereby, when the temperature is not lowered in the nitrogen oxide gas atmosphere, the threshold voltage can be increased as compared with the case where the temperature is lowered in the inert gas atmosphere, for example. Therefore, as described above, channel mobility can be improved while suppressing a decrease in threshold voltage of silicon carbide semiconductor device 1.

  In this embodiment, in the temperature lowering step, the temperature in the reaction furnace is decreased to 950 ° C. or lower in an atmosphere containing nitrogen oxide gas. As described above, in the temperature range of 950 ° C. or lower, diffusion of oxygen in the silicon dioxide film can be suppressed, so that generation of oxygen vacancies can be suppressed. Therefore, by lowering the temperature in the reactor to 950 ° C. or lower in an atmosphere containing nitrogen oxide gas, the above-described effect of the present invention can be sufficiently obtained that the reduction in threshold voltage can be suppressed.

  Further, in this embodiment, after the temperature inside the reaction furnace is lowered to 950 ° C. or less in an atmosphere containing nitrogen oxide gas in the temperature lowering step, the inside of the reaction furnace is changed from an atmosphere containing nitrogen oxide gas to an inert gas atmosphere. The temperature in the reactor is lowered. Thereby, undesired nitridation of the substrate 10 can be suppressed.

In the present embodiment, the nitrogen oxide gas used in the nitriding treatment step is at least selected from nitrogen monoxide (NO) gas, dinitrogen monoxide (N ₂ O) gas, and nitrogen dioxide (NO ₂ ) gas. One kind of gas. Thereby, the nitriding treatment can be performed effectively. Specifically, the defect level generated at the interface between the silicon dioxide of the gate oxide film 15 and the silicon carbide of the substrate 10 is more reliably electrically inactivated, and the defect level at the interface between the silicon carbide and silicon dioxide is more reliably deactivated. The density of the position can be reliably reduced. Therefore, carrier mobility can be improved reliably.

  Among these nitrogen oxide gases, it is desirable to use nitrogen monoxide gas or dinitrogen monoxide gas, and it is particularly desirable to use nitrogen monoxide gas. By using nitrogen monoxide gas or dinitrogen monoxide gas, in particular nitrogen monoxide gas, the above-described defect level inactivation and defect level density can be more reliably performed. The degree can be improved more reliably.

  In this embodiment, in the nitriding treatment step, the nitriding treatment is performed by heat treatment in which the temperature in the reaction furnace is 900 ° C. or higher and 1450 ° C. or lower, specifically, 1150 ° C. or higher and 1350 ° C. or lower. Thereby, the nitriding treatment can be performed effectively. Specifically, inactivation of the interface state by nitrogen atoms can be performed more reliably. Further, decomposition of the nitrogen oxide gas can be suppressed, thermal oxidation due to oxygen generated by the decomposition can be prevented, and an increase in new interface states can be prevented. Therefore, the carrier mobility of silicon carbide semiconductor device 1 can be improved more reliably.

  As described above, when nitriding is performed by a heat treatment in which the temperature in the reactor is set to 900 ° C. or higher and 1450 ° C. or lower, specifically, 1150 ° C. or higher and 1350 ° C. or lower, the reactor is immediately after the nitriding is completed. When the temperature inside the inside atmosphere is replaced with an inert gas atmosphere, oxygen vacancies are generated in the silicon dioxide film, and the threshold voltage may be lowered.

  In contrast, in the present embodiment, as described above, the temperature inside the reactor is lowered in a nitrogen oxide gas atmosphere after the nitriding treatment, so that the generation of oxygen vacancies in the silicon dioxide film is suppressed, and the threshold value is reduced. A decrease in voltage can be suppressed. Therefore, it is possible to effectively improve the carrier mobility of silicon carbide semiconductor device 1 by effectively performing the nitriding treatment as described above while suppressing the decrease in threshold voltage.

  In the present embodiment, in the silicon dioxide film forming step, a silicon dioxide film is deposited and formed on the surface of silicon carbide substrate 10 by the CVD method. At the interface between the silicon dioxide film formed in this step and the substrate 10, a defect level due to defects may occur. In the present embodiment, since the nitriding process is performed in the nitriding process, the defect level generated at the interface between the silicon dioxide film and the substrate 10 can be electrically inactivated.

  As a result, the density of defect levels at the interface between the silicon dioxide film and the substrate 10 can be reduced. Therefore, even when the silicon dioxide film is formed by a CVD method in which defects may occur, the channel mobility of silicon carbide semiconductor device 1 can be improved.

  Although different from the present embodiment, in the silicon dioxide film formation step, the silicon dioxide film may be formed by thermally oxidizing the surface of the silicon carbide substrate 10 in an atmosphere containing oxygen as described above. . Even in this case, the same effect as in the present embodiment can be obtained.

  In the present embodiment described above, silicon carbide semiconductor device 1 is a MOSFET, but is not limited to this. The method for manufacturing a silicon carbide semiconductor device of the present embodiment is applied to an insulated gate transistor device such as a MOSFET or IGBT (Insulated Gate Bipolar Transistor) having a silicon dioxide film formed on a silicon carbide substrate as a gate insulating film. be able to. Here, “on a silicon carbide substrate” means that on a silicon carbide substrate when the silicon carbide substrate is composed of only a silicon carbide substrate, and the silicon carbide substrate is formed on the silicon carbide substrate. When it is configured to include a silicon carbide layer, it means on the silicon carbide layer.

  The insulated gate transistor element may be a lateral semiconductor element in which the source electrode, the gate electrode, and the drain electrode are formed on the same surface of the substrate, and the source electrode, the gate electrode, and the drain electrode sandwich the substrate. It may be a vertical semiconductor element formed on the opposite side. That is, the method for manufacturing the silicon carbide semiconductor device of the present embodiment can be applied to a horizontal semiconductor element and can also be applied to a vertical semiconductor element.

  In the present invention, the constituent elements of the embodiments can be appropriately modified or omitted within the scope of the invention. For example, in the present embodiment, silicon carbide substrate 10 includes silicon carbide substrate 11, drift layer 12, base regions 13a and 13b, and source regions 14a and 14b. It may be included, or may be composed only of silicon carbide substrate 11.

  DESCRIPTION OF SYMBOLS 1 Silicon carbide semiconductor device, 10 base | substrate, 11 board | substrate, 12 drift layer, 13a, 13b base region, 14a, 14b source region, 15 gate oxide film, 16 gate electrode, 17a, 17b source electrode, 18 drain electrode

Claims (8)

A substrate preparation step of preparing a silicon carbide substrate;
An insulating film forming step of forming an insulating film on the silicon carbide substrate,
The insulating film forming step includes
A silicon dioxide film forming step of forming a silicon dioxide film to be the insulating film on the silicon carbide substrate;
A nitriding treatment step of nitriding the silicon carbide substrate on which the silicon dioxide film is formed by heat-treating in an atmosphere containing nitrogen oxide gas in a reaction furnace;
A method for manufacturing a silicon carbide semiconductor device comprising: a temperature lowering step of lowering the temperature in the reaction furnace in an atmosphere containing the nitrogen oxide gas after the nitriding step.   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein in the temperature lowering step, the temperature in the reaction furnace is decreased to 950 ° C. or less in an atmosphere containing the nitrogen oxide gas.   In the temperature lowering step, after the temperature in the reaction furnace is lowered to 950 ° C. or less in an atmosphere containing the nitrogen oxide gas, the atmosphere in the reaction furnace is replaced with an inert gas atmosphere from the atmosphere containing the nitrogen oxide gas. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein the temperature in the reactor is lowered. The nitrogen oxide gas is at least one gas selected from nitrogen monoxide (NO) gas, dinitrogen monoxide (N ₂ O) gas, and nitrogen dioxide (NO ₂ ) gas. Item 4. A method for manufacturing a silicon carbide semiconductor device according to any one of Items 1 to 3.   5. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein, in the nitriding treatment step, the heat treatment is performed at a temperature in the reaction furnace of 900 ° C. or higher and 1450 ° C. or lower. .   The method for manufacturing a silicon carbide semiconductor device according to claim 5, wherein in the nitriding treatment step, the heat treatment is performed at a temperature in the reaction furnace of 1150 ° C. or higher and 1350 ° C. or lower. In the silicon dioxide film forming step,
The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the silicon dioxide film is deposited on the surface of the silicon carbide substrate by chemical vapor deposition. . In the silicon dioxide film forming step,
The silicon carbide semiconductor device according to claim 1, wherein the silicon dioxide film is formed by thermally oxidizing the surface of the silicon carbide substrate in an atmosphere containing oxygen. Production method.

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