JP6253133B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to a method for manufacturing a silicon carbide semiconductor device that can reduce the contact resistance of an ohmic electrode and has good ohmic characteristics.

  In recent years, silicon carbide (SiC) has attracted attention as one of semiconductor materials that can replace silicon (hereinafter referred to as Si). Since the band gap of SiC is 4H-SiC, which is 3.26 eV, which is nearly three times larger than the band gap of Si (1.12 eV), the upper limit temperature of operation can be increased. In addition, the dielectric breakdown electric field strength is 3.0 MV / cm for 4H-SiC, which is about an order of magnitude larger than that of Si (0.25 MV / cm). Effective on-resistance is reduced, and power loss in a steady state can be reduced.

Furthermore, the thermal conductivity is 4.9 W / cmK for 4H-SiC, which is more than three times higher than the thermal conductivity of Si (1.5 W / cmK). It also has the advantage of being able to. Furthermore, since the saturation drift speed is as high as 2 × 10 ⁷ cm / s, it is excellent in high-speed operation. For these reasons, SiC is expected to be applied to power semiconductor elements (mainly power devices), high-frequency devices, high-temperature operation devices, and the like.

  Currently, MOSFETs, pn diodes, Schottky diodes, etc. are manufactured using SiC, and devices that exceed the characteristics of Si have been developed in terms of dielectric strength and on-resistance (forward voltage / forward current during energization). As a result, mass production is gradually accelerating.

  In manufacturing these devices, a technique for controlling the conductivity type and carrier concentration in a selected region is required. The method includes a thermal diffusion method and an ion implantation method. Since the diffusion coefficient of impurities is very small in SiC, the thermal diffusion method widely used in Si semiconductors is difficult to apply to SiC.

  Therefore, an ion implantation method is usually used for SiC. As ion species to be implanted, nitrogen (N) and phosphorus (P) are used for n-type, and aluminum (Al) or boron (B) is often used for p-type.

  SiC has many crystal types (hereinafter referred to as polytypes) due to the difference in the overlapping order of the Si and C planes. Due to the difference in the polytype, even if the ratio of the Si face and the C face is the same, the physical property values such as the band gap are different.

When the concentration of ion species ion-implanted into a substrate for a semiconductor device exceeds about 10 ¹⁹ atms / cm ³ , the ion-implanted region becomes a continuous amorphous material. There is a problem that a low-resistance region cannot be formed due to the mixing of the metal or the activation rate. For this reason, in order to suppress amorphization at the time of ion implantation, a temperature rising implantation technique in which a substrate is heated and implanted is generally used (see, for example, Patent Document 1 below).

  The ohmic electrode formed on the back surface (second main surface) of the SiC substrate forms an ohmic contact by raising the heat treatment temperature, and lowers the contact resistance. Since this contact resistance directly affects the forward characteristic (Vf) of the Schottky barrier diode (SBD) and the on-resistance (Ron) of the MOSFET, it is important to reduce it in terms of device characteristics. As one method for lowering the contact resistance, a method is proposed in which ions such as P and N are heated and implanted into the second main surface before the ohmic electrode formed on the second main surface is formed. (For example, refer to Patent Document 2 below.)

Japanese Patent No. 4348408 JP 2006-324585 A

  Even in the case where ion implantation is used for the second main surface, the heat treatment temperature for forming the ohmic electrode tends to become more powerful and stable as the temperature is set higher, but the setting exceeds 1050 ° C. In order to perform this heat treatment, it is necessary to use an expensive apparatus with higher heat resistance such as changing the material of the quartz tube to polycrystalline silicon carbide, which leads to an increase in cost.

  In particular, the gate insulating film used for the MOSFET formed before the ohmic electrode is deteriorated when heat treatment higher than the temperature at the time of formation is performed. Further, even when heat treatment at 900 ° C. to 1000 ° C. is performed, the threshold voltage fluctuates and the leakage current increases.

  Compared to Si (1.12 eV), SiC has a large band gap, which has the advantage of increasing the breakdown field strength. However, because of the high band gap, in order to obtain a stable and good ohmic contact. Requires heat treatment at a higher temperature and has a problem that the gate insulating film is not stable.

In view of the above problems, and an object thereof is to provide a method for manufacturing a silicon carbide semiconductor device of the device of yo good properties by lowering the heat treatment temperature for the ohmic contact formation of a silicon carbide semiconductor device can be manufactured.

To achieve the above object, a method for manufacturing a silicon carbide semiconductor device of the present invention, the crystal type and growing an epitaxial layer on the first main surface of the silicon carbide substrate of 4H-Si C, of the silicon carbide substrate Before the step of forming the metal film on the second main surface opposite to the epitaxial layer and the step of forming the metal film on the second main surface, the ionic species concentration is 1 on the second main surface. × 10 ¹⁸ and step of activating ions are implanted at ^{atms / cm 3 ~1 × 10 20} atms / cm 3, performs activation heat treatment of 1500 ° C. to 1800 ° C., a mixed crystal state of the 3C-SiC and 4H-SiC The ion implantation is performed in the range of 30 keV to 350 keV so that the concentration of the box profile is reduced to 500 nm without heating phosphorus in the silicon carbide substrate doped with nitrogen. 3C-SiC having a smaller band gap than that of the silicon carbide substrate between the second main surface of the silicon carbide substrate and the metal film formed as an ohmic electrode on the second main surface. A layer containing 3C-SiC and 4H-SiC, which is alloyed with an ohmic electrode by forming an ohmic electrode formed by heat treatment, and remains unalloyed is 50 nm to 200 nm To do.

  Further, the ratio of 3C—SiC in the silicon carbide substrate on the surface of the second main surface is 10% to 90%, preferably 20% to 30%.

  According to the said structure, the mixed crystal layer of 4H-SiC and 3C-SiC whose band gap is smaller than a silicon carbide substrate can be formed between a silicon carbide substrate and an ohmic electrode. This mixed crystal layer can be formed by combining room temperature implantation and activation heat treatment, and reduces the contact resistance without impeding the formation of the low resistance region.

According to the present invention, there is an effect that the device of yo good properties by lowering the heat treatment temperature for the ohmic contact formation can be produced.

1 is a cross-sectional structure diagram showing a silicon carbide Schottky barrier diode according to the present invention. It is a cross-section figure showing the manufacturing process of the silicon carbide Schottky barrier diode concerning the present invention.

  Exemplary embodiments of a method for manufacturing a silicon carbide semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings.

For example, the inventors selectively formed 3C-SiC (2.23 eV) having a small band gap in SiC between 4H-SiC (3.26 eV) and the ohmic electrode. The formation of 3C-SiC is performed by ion implantation of the second main surface without heating at an ion species concentration of 1 × 10 ¹⁸ atms / cm ³ to 1 × 10 ²⁰ atms / cm ³ and activation heat treatment at 1500 ° C. to 1800 ° C. To form a mixed crystal state of 3C—SiC and 4H—SiC. In the activation heat treatment, 3C-SiC is formed in a granular state and is in a dispersed state. Unlike other polytypes, 3C-SiC is more likely to be formed during recrystallization by heat treatment at 1500 ° C. to 1800 ° C. as amorphization at the time of ion implantation progresses. 3C-SiC is easily crystallized, but large bulk formation is unlikely to occur, so it can exist in a granular dispersed state.

Here, since the contact resistance increases due to the decrease in the activation rate due to the non-heated ion implantation at the ion species concentration of 1 × 10 ¹⁸ atms / cm ³ to 1 × 10 ²⁰ atms / cm ³ , the film thickness is set to 50 nm to 200 nm. By making it thin and mixed with 4H—SiC, the contact resistance is reduced without inhibiting the formation of the low resistance region.

  As described above, an ion species having a concentration different from that of the silicon carbide substrate is ion-implanted into the second main surface without heating and recrystallized by an activation heat treatment at 1500 ° C. to 1800 ° C., and 3C—SiC having a small band gap. By selectively dispersing and forming, a heat treatment temperature for forming the ohmic contact in the electrode forming process of the silicon carbide semiconductor element can be lowered, and a device having good characteristics can be manufactured at low cost.

(First embodiment)
FIG. 1 is a cross-sectional structure diagram showing a silicon carbide Schottky barrier diode (SiC-SBD) according to the present invention. This example is an example for obtaining the effects of the present invention, such as a film forming method and conditions, and does not represent all conditions.

  In the SiC-SBD shown in FIG. 1, a low-concentration conductivity type silicon carbide drift layer 2 is formed on a high-concentration silicon carbide substrate 1. The first conductivity type impurity ion implantation regions 3 for the junction, barrier, and Schottky (JBS) structure are formed at a predetermined interval. An oxide film 5 is formed on the impurity ion implantation region 3, a Schottky contact hole portion 5a is opened, and a Schottky electrode 7 is formed on the first main surface. 8 is an electrode pad.

  A second conductivity type impurity ion implantation region 4, an ohmic electrode 6, and an external electrode layer 9 are formed on the back surface (second main surface) of the silicon carbide substrate 1.

FIG. 2 is a cross-sectional structure diagram showing a manufacturing process of the silicon carbide Schottky barrier diode according to the present invention. First, as shown in FIG. 2A, as the silicon carbide substrate 1, for example, a 4H—SiC substrate (4 ° off substrate) having a crystal structure is used. On the first main surface of the high-concentration n-type silicon carbide substrate 1 doped with 1 × 10 ¹⁶ / cm ³ of nitrogen and having a (0001) plane of 350 μm thickness, for example, 1.8 × A low concentration n-type drift layer (epitaxial layer) 2 having a thickness of 6 μm, for example, doped with 10 ¹⁶ / cm ³ of nitrogen is formed by deposition.

Next, as shown in FIG. 2B, the first conductivity type (p-type) impurity region 3 for the JBS structure is formed on the silicon carbide (SiC) substrate composed of the n-type substrate 1 and the n-type drift layer 2. Form. For example, the first conductivity type impurity (Al) is implanted within a range of 30 keV to 350 keV by ion implantation so that the concentration of the box profile is 2 × 10 ¹⁹ / cm ³ up to 500 nm, and heating at 500 ° C. Inject at 2 μm intervals.

Next, as shown in FIG. 2C, for example, phosphorus (P) is converted to n-type as a second conductivity type impurity by ion implantation from the second main surface (back surface) of silicon carbide (SiC). Without heating the silicon carbide substrate 1, implantation is performed on the entire surface in the range of 30 keV to 350 keV so that the concentration of the box profile is 8 × 10 ²⁰ / cm ³ up to 500 nm at room temperature. Thereby, the impurity ion implantation region 4 of the second conductivity type is formed.

Next, as shown in FIG. 2D, the silicon carbide substrate 1 on which the carbon protective film 11 is formed on the surface of the impurity ion implantation region 4 on the second main surface side is inserted into the activation heat treatment apparatus, and then 1 Vacuuming is performed to × 10 ⁻² Pa or less, Ar gas is introduced, and heat treatment is performed at 1700 ° C. for 5 minutes at a pressure of 1 × 10 ⁵ Pa. Here, when the produced silicon carbide substrate 1 was extracted and 3C-SiC and 4H-SiC were mapped by microscopic Raman spectroscopy, 3C-SiC was present in an area ratio of 20%. Thereby, a layer in which silicon carbide having a band gap smaller than that of silicon carbide substrate 1 or silicon carbide having a smaller band gap is mixed is formed on the surface layer of impurity ion implantation region 4.

Next, as shown in FIG. 2E, the carbon protective film 11 on the second main surface of the silicon carbide substrate 1 subjected to the activation heat treatment is removed (ashed) by an ashing device. Ashing was performed in oxygen plasma by introducing oxygen (O ₂ ) with a reactive ion etching apparatus and applying a pressure of 12 Pa and an RF power of 500 W. Ashing time is 5 minutes. Next, pyrothermal oxidation is performed in a diffusion furnace, and a sacrificial oxide film is removed for 100 nm from the injection layer on the back surface by etching with buffered hydrofluoric acid.

  Next, as shown in FIG. 2F, an oxide film 5 having a thickness of 500 nm is formed on the first main surface of the silicon carbide substrate 1 after the removal of the sacrificial oxide film by a chemical vapor deposition (CVD) method. Then, nickel (Ni) and titanium (Ti), which are ohmic electrodes 6, are successively formed on the second main surface by sputtering, and heat treatment is performed at 800 ° C. for 10 minutes to form ohmic contacts.

  Next, as shown in FIG. 2G, a Schottky contact hole portion 5a is formed in the oxide film 5 on the first main surface by photolithography, and subsequently titanium (Ti) is added to the first main surface. A Schottky electrode 7 is fabricated by forming the entire surface by sputtering, patterning by photolithography, and heat treatment at 500 ° C. for 10 minutes.

  Then, as shown in FIG. 2 (h), 5 μm of aluminum (Al) is formed by sputtering as the electrode pad 8 on the first main surface side, and 200 nm of Au is formed as the external electrode layer 9 on the second main surface side. A film is formed.

(Comparative example)
The silicon carbide substrate 1 was similarly manufactured except that the ion implantation for forming the impurity ion implantation region 4 was not performed on the second main surface of the example and the carbon protective film 11 was sputtered. . Similarly produced silicon carbide substrate 1 was extracted, and 3C-SiC and 4H-SiC were mapped by microscopic Raman spectroscopy. As a result, it was confirmed that 3C-SiC was present in an area ratio of 1%.

(Evaluation of Examples and Comparative Examples)
As a comparison of the forward characteristics of the diodes produced using the manufacturing method described above, electrical characteristics were evaluated using 20 samples each of the examples and comparative examples. When the on-voltage (Vf) when a current of 25 A flows was measured, it was 1.412 V (variation σ = 0.0807 V) in the comparative example, whereas 1.106 V (variation σ = 0) in the example. .0267V). Thus, since the ON voltage was lower in the example than in the comparative example, it was confirmed that the contact resistance with the ohmic electrode formed on the second main surface of the silicon carbide substrate can be reduced.

(Other examples)
In the first embodiment, the case of manufacturing a simple vertical SiC-SBD device for evaluation has been described. However, a structure having an edge that provides a breakdown voltage around the element may be used. Also, other devices such as MOS structures can be manufactured on the first main surface. Furthermore, in the first embodiment, the (0001) plane is described as an example of the main surface, but the (000-1) plane may be used as the main surface.

  As the crystal type of the silicon carbide substrate 1, 4H—SiC or 6H—SiC can be used, and ohmic is formed on the second main surface and the second main surface by ion implantation without heating the silicon carbide substrate 1. A layer in which 3C—SiC or 3C—SiC is mixed can be formed between the metal film formed as the electrode 6. The ratio of 3C-SiC is 10% to 90%, desirably 20% to 30%. Further, when the layer containing 3C—SiC in the silicon carbide substrate 1 is alloyed with the ohmic electrode by the formation of the ohmic electrode formed by heat treatment, the 3C—SiC of the silicon carbide substrate 1 that remains without being alloyed is formed. The layer is 30 nm to 1000 nm, preferably 50 nm to 200 nm.

  As described above, according to the present invention, the contact resistance with the ohmic electrode formed on the second main surface of the silicon carbide substrate can be reduced, and various ions are implanted into the second main surface of the silicon carbide substrate. Then, an activated layer can be formed, and an ohmic electrode having good ohmic characteristics can be obtained. The present invention can be applied to semiconductor devices such as MOSFETs, SBDs, and IGBTs using SiC semiconductors.

  As described above, the method for manufacturing a silicon carbide semiconductor device according to the present invention is useful for power semiconductor devices such as power devices, and power semiconductor devices used for industrial motor control and engine control.

DESCRIPTION OF SYMBOLS 1 High concentration conductivity type silicon carbide substrate 2 Low concentration conductivity type silicon carbide drift layer 3 First conductivity type impurity ion implantation region 4 Second conductivity type impurity ion implantation region (second main surface)
5 Oxide film 6 Ohmic electrode 7 Schottky electrode 8 Electrode pad 9 External electrode layer 11 Carbon protective film

Claims (2)

A step of crystal form an epitaxial layer is grown on the first main surface of the silicon carbide substrate of 4H-Si C,
Forming a metal film on a second main surface opposite to the epitaxial layer of the silicon carbide substrate;
Before the step of forming a metal film on the second main surface, the second main surface is activated by ion implantation at an ion species concentration of 1 × 10 ¹⁸ atms / cm ³ to 1 × 10 ²⁰ atms / cm ^3. The process of
Performing an activation heat treatment at 1500 ° C. to 1800 ° C. to form a mixed crystal state of 3C—SiC and 4H—SiC ,
The ion implantation is performed by implanting phosphorus into the silicon carbide substrate doped with nitrogen to the entire surface in a range of 30 keV to 350 keV so as to have a box profile concentration up to 500 nm without heating. By forming an ohmic electrode, a layer containing 3C—SiC having a band gap smaller than that of the silicon carbide substrate is formed between the main surface of the silicon carbide substrate and the metal film formed as an ohmic electrode on the second main surface. The layer of the mixed crystal state of 3C—SiC and 4H—SiC that is alloyed with the ohmic electrode and remains unalloyed is 50 nm to 200 nm.
A method for manufacturing a silicon carbide semiconductor device.   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein a ratio of 3C—SiC in the silicon carbide substrate on the surface of the second main surface is 10% to 90%.

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