JP2006156478A - Silicon carbide semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the channel mobility of a silicon carbide insulated gate transistor. <P>SOLUTION: The gate insulation film of the insulated gate transistor of a silicon carbide semiconductor device is formed by the vapor deposition method. Before and after the formation of the gate insulation film, nitriding is conducted in a nitrogen oxide gas atmosphere. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a silicon carbide (SiC) semiconductor device and a manufacturing method thereof, and more particularly to an insulated gate transistor based on silicon carbide and a manufacturing method for reducing the on-resistance.

  Silicon carbide (SiC) has a wider band gap than silicon (Si) and has excellent physical properties such as dielectric breakdown electric field strength, saturation electron velocity, and thermal conductivity, and excellent physical properties as a power device material. Has a value. One feature of silicon carbide is that an insulating film made of high-quality silicon dioxide can be formed by a thermal oxidation method. By using silicon dioxide formed by this thermal oxidation method as a gate insulating film, it is possible to manufacture a high output insulated gate field effect transistor (MOSFET) having a high breakdown voltage and low loss.

  However, although switching MOSFETs made of silicon carbide have been developed, the mobility of the inversion layer (channel layer) is small, and the expected performance has not been realized. This is because a large number of interface states (traps) exist at the so-called MOS interface of silicon dioxide (SiO 2) / silicon carbide (SiC) formed by the conventional thermal oxidation method, so that it can move sufficiently in the inversion layer. This is because it becomes difficult to have majority carriers and the channel conductance (channel mobility μch) becomes very low. As a result, the on-resistance (source / drain resistance at the time of conduction) of the element is increased, resulting in a problem that the loss during the on-operation increases.

  Various measures have been reported to reduce the interface state existing at the MOS interface. For example, in Patent Document 1 (Japanese Patent Publication No. 2004-511101 (International Publication WO2002 / 029874)), a silicon carbide layer is oxidized in a dinitrogen monoxide (N2O) environment or carbonized in a dinitrogen monoxide environment. There is shown a method for reducing this silicon dioxide / silicon carbide interface state by annealing an oxide layer on a silicon layer. In the processing method disclosed in Patent Document 1, a silicon carbide film is grown on a silicon carbide surface by heat-treating a silicon carbide substrate in a dinitrogen monoxide atmosphere at a high temperature of, for example, 1300 ° C. (thermal oxidation method). Or a method of nitriding an oxide formed on the surface of a silicon carbide substrate in a dinitrogen monoxide atmosphere. As a method for forming an oxide film on the surface of the silicon carbide substrate, it is described that a thermal oxidation process, a low pressure chemical vapor deposition method (LPCVD method) or a wet reoxidation process is used.

  According to Patent Document 1, the interface state density, that is, the interface trap density (DIT) can be reduced by the above processing. When this oxide film is used as a gate insulating film of a MOSFET, the effective surface channel of the transistor is disclosed. It states that mobility is improved.

  Non-Patent Document 1 (“GY Chung et al.,“ Improved Inversion Channel Mobility for 4H-SiC MOSFETs Following High Temperature Anneals in Nitric Oxide ”, IEEE Electron Device Letters, vol. 22, No. 4, pp. 176- 178, April 2001), the effective channel mobility of the 4H-SiC lateral (lateral) MOSFET is passivated by high-temperature annealing in a nitric oxide atmosphere at the interface state near the silicon carbide / silicon dioxide conductor edge. This non-patent document 1 shows that the surface of the 4H-SiC epitaxial layer is oxidized to form an oxide film, and then a high temperature of 1175 ° C. in a nitrogen monoxide atmosphere. It is intended to reduce the silicon carbide / silicon dioxide interface state density by annealing for 2 hours.

Further, instead of forming the MOSFET using the (0001) plane of the conventional hexagonal silicon carbide, if the MOSFET is formed using different plane orientations such as the (000-1) plane of hexagonal silicon carbide, the MOS Non-Patent Document 2 (“K. Fukuda et al.,“ High Inversion Channel Mobility of MOSFET Fabricated on 4H-SiC ”indicates that the interface state of the interface is small and high channel mobility is obtained compared to the (0001) plane. C (000-1) Face Using H ₂ Post-Oxidation Annealing ”, Mater. Sci. Forum, vol. 433-436, pp. 567-570, 2003. In this non-patent document 2, Using the C (000-1) plane of 4H—SiC as the main surface, a sacrificial oxide film is formed on the main surface and removed with an HF (hydrofluoric acid) solution, and then a gate oxide film is formed by a thermal oxidation method After annealing this gate oxide film in an argon (Ar) atmosphere Further subjected to post-oxidation annealing in hydrogen (H2) atmosphere.
Special Table 2004-511101 Pamphlet (International Publication WO2002 / 029874) “GY Chung et al.,“ Improved Inversion Channel Mobility for 4H-SiC MOSFETs Following High Temperature Anneals in Nitric Oxide ”, IEEE Electron Device Letters, vol. 22, No.4, pp.176-178, April 2001 “K. Fukuda et al.,“ High Inversion Channel Mobility of MOSFET Fabricated on 4H-SiC C (000-1) Face Using H2 Post-Oxidation Annealing ”, Mater. Sci. Forum, vol.433-436, pp.567 -570, 2003

  As described above, although the channel mobility μch can be improved by the thermal oxidation method and the nitriding treatment in a nitrogen monoxide or dinitrogen monoxide atmosphere, it is expected from the inherent physical properties of silicon carbide. In order to realize the device characteristics, it is necessary to further improve the interface trap density.

  That is, thermal oxidation of silicon carbide is performed by many methods such as oxidation in a dry oxygen atmosphere, oxidation in a mixed gas atmosphere of water vapor and oxygen, and oxidation in a dinitrogen monoxide gas atmosphere. In this case, since the silicon carbide surface of the substrate is oxidized, even if the surface is cleaned using a sacrificial oxide film as shown in Non-Patent Document 2, a large number of interface states are inevitably formed. The

  Further, as shown in the above-mentioned Patent Document 1, even when an oxide film is formed by the LPCVD method, the surface of the silicon carbide is exposed to a high-temperature oxidizing atmosphere when the oxide film is formed, and similarly, the silicon carbide and the oxide are oxidized. An interface state serving as a charge trap center is formed at the interface with the film. Therefore, when forming an insulating film such as a silicon dioxide film on the silicon carbide surface, it is necessary to prevent the formation of interface states as much as possible and reduce the interface trap density.

  Therefore, an object of the present invention is to provide a silicon carbide semiconductor device having a reduced interface trap density and a method for manufacturing the same.

  Another object of the present invention is to provide a silicon carbide semiconductor device having a high channel mobility and a method for manufacturing the same.

  A method of manufacturing a silicon carbide semiconductor device according to the present invention includes a step of nitriding a silicon carbide substrate surface in a nitrogen oxide gas atmosphere, and forming an insulating film on the nitrided silicon carbide substrate surface by vapor phase growth And a step of further nitriding the insulating film in a nitrogen oxide-based atmosphere.

  A silicon carbide semiconductor device according to the present invention includes a silicon carbide substrate whose surface is nitrided, a gate insulating film obtained by nitriding a silicon dioxide film vapor-grown on the surface of the silicon carbide substrate, and the gate insulating film And a gate electrode formed thereon.

  According to the method for manufacturing a silicon carbide semiconductor device according to the present invention, the surface of the silicon carbide substrate is nitrided before forming the insulating film, the silicon carbide main surface is passivated, and the quality of the substrate / insulating film interface is improved. To do. In addition, the insulating film is deposited according to a chemical or physical vapor deposition method, and interface states generated by a conventionally used thermal oxidation method can be reduced.

  In addition, the insulating film formed by this vapor deposition method is inferior in quality in terms of denseness and the like as compared with the insulating film formed by the thermal oxidation method, but nitriding treatment should be performed after this insulating film is deposited. Thus, the quality of the interface and the insulating film is improved, and a high channel mobility μch can be achieved.

  By applying these processes to a silicon carbide substrate having a main surface having a different plane orientation, the channel mobility μch can be further improved. Further, the insulating film forming method using the chemical or physical vapor deposition method can shorten the process time as compared with the case where the insulating film is formed by the thermal oxidation method.

  In the silicon carbide semiconductor device according to the present invention, a silicon dioxide film grown on the surface of a silicon carbide substrate whose surface is nitrided is provided as a gate insulating film, and a gate electrode is formed on the gate insulating film. Thus, a silicon carbide MOSFET having a high channel mobility with a reduced substrate / insulating film interface trap density can be realized.

[Embodiment 1]
FIG. 1 schematically shows a cross-sectional structure of an element structure of a silicon carbide semiconductor device manufactured by the method for manufacturing a silicon carbide semiconductor device according to the first embodiment of the present invention. Specifically, FIG. 1 shows a cross-sectional structure of a silicon carbide MOSFET as an example of a silicon carbide semiconductor device.

  In FIG. 1, a silicon carbide semiconductor device includes a drift layer 2 made of silicon carbide of a first conductivity type formed on the surface of a first conductivity type substrate 1 and a predetermined depth on the drift layer 2 between each other. Source regions 4a and 4b of the first conductivity type formed on the surfaces of the base regions 3a and 3b, and the source regions 4a and 4b of the first conductivity type formed on the surfaces of the base regions 3a and 3b, respectively. Gate insulating film 5 extending to regions 4a and 4b and formed on drift layer 2 and base regions 3a and 3b, and source electrodes 7a and 7b in electrical contact with source regions 4a and 4b, respectively. Gate electrodes formed on the base insulating film 5 so as to reach the source regions 4a and 4b in a plan view on the base regions 3a and 3b and the region between them. When, and a drain electrode 8 formed on the lower surface of the substrate 1.

  Substrate is constituted by substrate 1, drift layer 2, base regions 3a and 3b, and source regions 4a and 4b.

  In the silicon carbide semiconductor device shown in FIG. 1, when a voltage is applied to gate electrode 6, inversion channel layers are formed on the surfaces of base regions 3a and 3b immediately below the gate electrode, and source regions 4a and 4b and a drift layer are formed. A path through which charges flow is formed between the two. When silicon carbide MOSFET is an n-channel MOSFET, majority carriers are electrons, and electrons flowing from source regions 4a and 4b to drift layer 2 are drift layer 2 and substrate according to an electric field formed by a voltage applied to drain electrode 8. To the drain electrode 8 via Therefore, by applying a voltage to the gate electrode 6, a current flows from the drain electrode 8 to the source electrodes 7a and 7b. When the silicon carbide MOSFET is a p-channel MOSFET and the majority carriers are holes, the holes injected from the drain electrode 8 flow through the drift layer 2 and reach the base regions 3a and 3b. It flows into source regions 4a and 4b according to the potentials of source electrodes 7a and 7b through an inversion channel layer formed on the surfaces of base regions 3a and 3b. As a result, holes flow from the drain electrode 8 to the source electrodes 7a and 7b.

  Gate insulating film 5 is formed of a silicon dioxide film, and a main body surface is subjected to a passivation treatment by nitriding a substrate (showing a region from substrate 1 to a portion where source regions 4a and 4b are formed) formed of silicon carbide. After the step, the gate insulating film 5 is formed on the main surface of the substrate by chemical or physical vapor deposition to suppress the generation of charge traps at the interface between the gate insulating film 5 and the base regions 3a and 3b.

  After the gate insulating film 5 is formed, nitriding treatment is performed in a nitrogen oxide gas atmosphere to further reduce the interface state and improve the film quality of the gate insulating film 5. Thereby, the interface state generated at the MOS interface can be reduced, and accordingly, the interface trap density can be reduced and the channel mobility of the silicon carbide MOSFET can be improved. Hereinafter, the method for manufacturing the silicon carbide semiconductor device shown in FIG. 1 will be described in the order of steps. In the present embodiment, the nitriding atmosphere is a gas atmosphere, but nitric oxide or dinitrogen monoxide is a gas under the processing conditions in the manufacturing process of the semiconductor device of the present invention, and In the description, it is simply described as atmosphere. Therefore, for example, a nitrogen monoxide atmosphere indicates a nitrogen monoxide gas atmosphere.

In FIG. 2, a drift layer 2 made of a silicon carbide epitaxial layer of the first conductivity type is formed on the first conductivity type substrate 1 using an epitaxial crystal growth method. The thickness of the drift layer 2 may be about 5 to 50 μm, and the impurity concentration may be about 1 × 10 ¹⁵ to 1 × 10 ¹⁸ / cm ³ .

  By forming the drift layer 2 under the above-described conditions, a vertical type high breakdown voltage MOSFET having a breakdown voltage of several hundred V to 3 KV or more can be realized.

  As the first conductivity type substrate 1, for example, an n-type silicon carbide substrate is preferable, and (0001) plane, (000-1) plane, (11-20) plane, etc. can be used as the plane orientation. As the polytype of silicon carbide substrate 1, any of 4H, 6H, and 3C can be used.

  Next, referring to FIG. 3, after the drift layer 2 is formed by an epitaxial crystal growth method, a resist is formed using a photoengraving technique so that a region for forming a base region is exposed on the surface of the drift layer 2. A mask is formed using silicon dioxide, silicon nitride, or the like. Impurities are ion-implanted using this mask as an impurity implantation blocking film to form a pair of second conductivity type base regions 3a and 3b. FIG. 3 shows the cross-sectional structure of the element after removing the mask used for this ion implantation.

  When this silicon carbide semiconductor device is an n-channel MOSFET, boron (B) or aluminum (Al) can be used as the second conductivity type impurity introduced into base regions 3a and 3b, and in the case of p-channel MOSFET In this case, phosphorus (P) or nitrogen (N) can be used as the second conductivity type implanted impurity.

  The depths of the base regions 3a and 3b are required not to exceed the thickness of the drift layer 2, and the depth may be about 0.5 to 3 μm, for example.

The concentration of the second conductivity type impurity in the base regions 3a and 3b is set to a concentration exceeding the concentration of the first conductivity type impurity in the drift layer 2, for example, about 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ^3. If it is.

  Next, referring to FIG. 4, a mask is formed on the surface of the substrate using photolithography, and the source region forming portion is exposed. Using this mask, the first conductivity type impurities are introduced into base regions 3a and 3b. Ion implantation is performed to form first conductivity type source regions 4a and 4b, respectively. FIG. 4 shows a cross-sectional structure of the element after removing the mask for forming the source region.

  When the silicon carbide semiconductor device is an n-channel MOSFET, for example, phosphorus (P) or nitrogen (N) can be used as the first conductivity type impurity introduced into source regions 4a and 4b. When this silicon carbide semiconductor device is a p-channel MOSFET, for example, boron (B) or aluminum (Al) can be used.

The depths of the source regions 4a and 4b are made shallower than the depths of the base regions 3a and 3b. The concentration of the first conductivity type impurity introduced into the source regions 4a and 4b may be, for example, about 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ .

  Subsequently, the implanted ions are electrically activated by performing a heat treatment on the silicon carbide substrate under a high temperature condition of, for example, 1300 ° C. to 1900 ° C. for about 30 seconds to 1 hour by a heat treatment apparatus.

  Next, referring to FIG. 5, the surface of the silicon carbide substrate is passivated by nitriding in a nitrogen oxide atmosphere of nitric oxide (NO) or dinitrogen monoxide (N2O). After this passivation treatment, a gate insulating film 5 is formed on the surface of the silicon carbide substrate using physical vapor deposition or chemical vapor deposition. After the formation of the insulating film 5, nitriding is further performed in a nitrogen monoxide or dinitrogen monoxide atmosphere. A series of steps for producing the gate insulating film 5 is a characteristic step in the present invention, and will be described in detail later.

  By the nitriding treatment before and after the production of the gate insulating film 5, the crystal quality of the gate insulating film can be improved and the interface state can be effectively reduced.

  Next, referring to FIG. 6, a gate electrode 6 is formed on the gate insulating film 5, and then patterned using a photoengraving technique. The gate electrode 6 is patterned in such a shape that the base regions 3a and 3b and the source regions 4a and 4b are located at both ends thereof, and the exposed drift layer 2 between the base regions 3a and 3b is located at the center thereof.

  The gate electrode 6 is preferably formed so as to overlap with the pair of source regions 4a and 4b in the range of, for example, 10 nm to 5 μm in plan view. The influence of the fringe effect at the end of the gate electrode 6 is suppressed, and a voltage is uniformly applied to the surfaces of the base regions 3a and 3b, so that the inverted channel layer is reliably formed on the base regions 3a and 3b.

  The material of the gate electrode 6 may be n-type or p-type polycrystalline silicon (polysilicon), n-type or p-type polycrystalline silicon carbide, aluminum, or A low-resistance refractory metal such as titanium, molybdenum, tantalum, niobium, or tungsten may be used, and a nitride of a refractory low-resistance metal may be used.

  After the patterning of the gate electrode 6, unnecessary portions of the gate insulating film 5 are removed by patterning using photolithography and wet or dry etching, so that the surfaces of the source regions 4a and 4b are obtained as shown in FIG. Is exposed. The gate insulating film 5 is formed longer than the gate electrode 6 and reliably separates the source electrode and the gate electrode 6 formed in the next process.

  Next, as shown in FIG. 8, source electrodes 7a and 7b are formed on the exposed portions of the source regions 4a and 4b by film formation and patterning.

  Thereafter, the drain electrode 8 is formed on the back surface of the substrate 1 to complete the main part of the semiconductor device having the element structure shown in FIG.

  As materials for the source electrodes 7a and 7b and the drain electrode 8, aluminum, nickel, titanium, gold, or a composite thereof can be used. Further, in order to obtain ohmic contact between the source regions 4a and 4b and the first conductivity type substrate 1, heat treatment at about 1000 ° C. may be performed after the source electrodes 7a and 7b and the drain electrode 8 are formed.

  Next, a gate insulating film forming step and a nitriding step in a nitrogen oxide atmosphere of nitrogen monoxide or dinitrogen monoxide characteristic in the method for manufacturing a silicon carbide semiconductor device according to the present invention will be described in detail with reference to FIG. explain.

  FIG. 9 shows a reactor in each process from the nitriding process on the surface of the silicon carbide base for the purpose of forming the gate insulating film 5, the forming process of the silicon dioxide film by chemical vapor deposition, and the subsequent nitriding process. It is a figure showing an inside temperature profile. Here, a chemical vapor deposition method is used as the vapor phase growth method for forming the gate insulating film, and a case where silicon dioxide is used as the material of the gate insulating film 5 is described as an example. Further, since the processing is performed in units of wafers on which the silicon carbide substrate is formed (in parallel with a predetermined number of wafers), FIG. 9 shows a wafer on which the silicon carbide substrate is formed.

  In FIG. 9, the vertical axis indicates the temperature in each processing step, the horizontal axis indicates time, the nitriding step in a nitrogen monoxide or dinitrogen monoxide atmosphere, and the formation of an oxide film by chemical vapor deposition A gate insulating film forming process including a process and a subsequent nitriding process under a nitrogen monoxide or dinitrogen monoxide atmosphere is shown together with each corresponding temperature profile.

  In FIG. 9, first, a base region 3 (regions 3a and 3b are shown generically) and a source region 4 (shown generically) in a reactor for nitriding under an inert gas atmosphere such as argon (Ar) or nitrogen (N2). The formed silicon carbide substrate is introduced (wafer introduction). The regions 4a and 4b are generically shown).

  When the temperature in the nitriding furnace (nitriding treatment reactor) reaches the processing temperature, the inside of the reaction furnace is charged with nitrogen monoxide (NO) or dinitrogen monoxide (NO) from an inert gas atmosphere such as argon or nitrogen. The nitriding process is performed by switching to the N 2 O) atmosphere and maintaining the nitrogen oxide atmosphere and the processing temperature for a predetermined time. By carrying out such a nitriding process, nitrogen atoms (N) are passivated (passivated) on the main surface of the silicon carbide substrate, and the interface with the silicon dioxide film deposited in the next process is improved.

  As for the atmosphere during nitriding in the nitriding reactor, nitrogen monoxide or dinitrogen monoxide diluted with nitrogen, argon, helium, krypton, or the like may be used. An atmosphere gas in which dinitrogen oxide is mixed may be used. These atmospheres are collectively referred to as a nitrogen oxide atmosphere.

  The nitriding temperature is desirably 900 ° C. to 1450 ° C. This is because, at a low temperature of 900 ° C. or lower, the nitriding rate is very slow and the passivation of nitrogen atoms hardly proceeds. Further, under high temperature conditions of 1450 ° C. or higher, thermal oxidation by oxygen atoms contained in nitrogen monoxide or dinitrogen monoxide proceeds, traps due to thermal oxidation occur at the interface, and conversely the interface trap density increases. Because.

  The nitriding time is preferably about 30 minutes to 6 hours.

  After this nitriding process, the atmosphere in the nitriding reactor is switched to an inert gas atmosphere such as argon or nitrogen, and the temperature of the nitriding process is maintained for a certain period, and the atmosphere is completely switched to an inert gas. Thereafter, the temperature is lowered to the silicon carbide substrate take-out temperature, and after the temperature drop, the silicon carbide substrate is taken out of the reaction furnace. Thereby, the nitriding process step before forming the gate insulating film is completed.

  Next, the silicon carbide substrate after the nitriding treatment is introduced into a chemical vapor deposition reactor (CVD furnace) (wafer movement), the processing temperature is set to a predetermined temperature, and the chemical vapor deposition method is used. Silicon dioxide is deposited. With respect to the material gas in this CVD furnace, for example, silane, disilane, dichlorosilane, difluorosilane, tetraethoxysilane (TEOS) or the like can be used as a silicon source. As an oxygen source, for example, oxygen (O, O 2), ozone (O 3), oxygen radicals, dinitrogen monoxide and the like can be used.

  Moreover, methods such as thermal excitation, plasma excitation, and photoexcitation can be used for the decomposition. Preferably, good quality silicon dioxide can be formed without damaging the surface of the silicon carbide substrate by forming the film by thermal decomposition of these material gas sources.

  The film thickness of the silicon dioxide may be about 2 to 200 nm, but preferably about 30 to 70 nm from the pressure resistance condition. The film thickness of this silicon dioxide can be controlled by the film formation conditions, but the film formation time can be significantly shortened compared to the thermal oxidation method.

  Further, when the silicon dioxide film is formed by chemical vapor deposition, the film formation temperature may be about 100 to 1000 ° C., for example. In the case of film formation by a thermal oxidation method, silicon carbide is less likely to be thermally oxidized than silicon, so that a practical thermal oxidation temperature is required to be higher than 1100 ° C. Further, in the thermal oxidation method, oxygen atoms diffuse into silicon carbide to form silicon dioxide, so that a silicon carbide / silicon dioxide interface is formed inside silicon carbide. For this reason, the depth of the base region and the source region, which are regions into which impurities are implanted, and the impurity profile in the depth direction of the base region and the source region 4 are affected, and the element characteristic value varies from the target value.

  In addition, due to the difference in impurity concentration between the base region 3, the source region 4, and the drift layer 2, the thermal oxidation rate differs, and it is difficult to form the gate insulating film 5 having a uniform thickness. A gate insulating film 5 is formed on the exposed portions of the drift layer 2, the base region 3 and the source region 4. In this case, since the impurities of the drift layer 2, the base region 3 and the source region 4 are taken into the gate insulating film during the thermal oxidation process, the reliability of the gate insulating film 5 is impaired. Become.

  When chemical vapor deposition is used, silicon dioxide is deposited on the surface of the silicon carbide substrate, and therefore the silicon dioxide / silicon carbide interface is formed on the surface of the silicon carbide. In addition, the highly reliable gate insulating film 5 can be formed with a uniform film thickness and without the influence of the implanted impurities, which can strictly control the implanted impurity profile.

  By performing film formation for a predetermined time by this chemical vapor deposition method, a gate insulating layer having a desired thickness made of silicon dioxide can be deposited on the surface of the silicon carbide substrate.

  After the silicon dioxide film is formed in the CVD furnace, the temperature of the CVD furnace is lowered. After the temperature is lowered, the silicon carbide substrate is taken out from the CVD furnace and moved to the nitriding furnace, and the silicon carbide substrate on which the gate insulating film 5 is deposited is introduced into the nitriding furnace. The nitriding process after forming the gate insulating film is performed in the same procedure as the nitriding process before forming the gate insulating film. By performing the nitriding process after the formation of the gate insulating film, the quality of the deposited silicon dioxide film and the quality of the interface between silicon dioxide and silicon carbide are further improved.

  In the above-described series of processing steps, a case is described in which apparatuses for performing chemical vapor deposition and nitriding of silicon dioxide are separately provided. However, these chemical vapor deposition and nitridation processes may be performed continuously in the same apparatus. In this case, the temperature raising / lowering time of the temperature accompanying the movement of the silicon carbide substrate between apparatuses can be reduced, the process time can be further shortened, and further, the contamination of the substrate due to the movement between apparatuses is reduced.

  Further, although the nitriding treatment procedure before and after the formation of the gate insulating film is the same, the processing conditions may be the same or different.

  FIG. 10 shows a list of the maximum field effect mobility (μfe) of the silicon carbide MOSFET formed by the silicon carbide semiconductor device manufacturing method according to the present invention and the silicon carbide MOSFET formed by the conventional thermal oxidation method. FIG. As a comparative example, a case where a silicon dioxide film is formed on a (0001) surface by performing a thermal oxidation step in an oxygen atmosphere containing water vapor according to a conventional thermal oxidation method is shown as an example. As an example of the present invention, a silicon dioxide film is nitrided on a silicon carbide substrate (epitaxial layer) having a (0001) plane, a (000-1) plane, and a (11-20) plane as the plane orientation. The case where it is formed by a combination of chemical vapor deposition and nitriding is shown.

As shown in FIG. 10, in the conventional method, the peak value of the field effect mobility μfe is 1.5 cm ² / Vs (volt · second). On the other hand, in the silicon carbide MOSFET according to the embodiment of the present invention, 40 cm ² / Vs is achieved on the (0001) plane. When the silicon dioxide film is formed on the (11-20) plane by using the manufacturing method of the present invention, the highest channel mobility of 55 cm ² / Vs can be achieved. It is considered that high mobility can be realized by combining the deposition method for forming the silicon dioxide film without oxidizing the silicon carbide substrate and the nitriding treatment step.

  Further, when a silicon carbide substrate having a different surface orientation as the main surface is used, a difference in characteristics is observed. When a silicon carbide substrate having a (11-20) surface as the main surface is used, the highest mobility can be obtained.

  In the present embodiment, a silicon dioxide film is deposited by performing chemical vapor deposition at 200 ° C. By forming this film formation temperature higher, a denser oxide film is formed. Therefore, it is expected that higher mobility can be obtained by increasing the growth temperature.

  In addition, an effect such as passivating defects in the oxide film by in-situ doping of impurities such as nitrogen during silicon dioxide film formation is expected, and an improvement in mobility can be expected.

  In the above description, silicon carbide MOSFET is shown as an example of a silicon carbide semiconductor device. However, a similar effect can be obtained by applying the manufacturing method according to the present invention also to a silicon carbide semiconductor device having an element structure in which an insulating film is formed on a silicon carbide layer such as IGBT. The present invention can also be applied to a case where a semiconductor device uses a transistor in which a source and a drain are formed on the same surface. Therefore, by applying the manufacturing method according to the present invention to a semiconductor device generally having an element structure in which an insulating film is formed on a silicon carbide layer, a semiconductor device having a low MOS interface state can be realized.

  In addition, although the chemical vapor deposition method is shown as a method for forming the gate insulating film, a physical film forming method such as an evaporation method, a sputtering method, an ion cluster beam method, or a molecular beam epitaxy method is used. The gate insulating film may be formed by using (physical vapor deposition method).

  Further, the first conductivity type and the second conductivity type of the silicon carbide semiconductor device may be n-type and p-type, and conversely, may be p-type and n-type. An n-channel MOSFET is realized when the first conductivity type is n-type, and a p-channel MOSFET is realized when the first conductivity type is p-type.

  Although the case where the gate insulating film is formed of silicon dioxide is shown, other insulating films such as silicon nitride film, silicon oxynitride film, aluminum oxide film, aluminum nitride film, hafnium oxide film, zirconium oxide Even if a film or the like is used, the same effect can be obtained.

[Example of change]
Further, as a device structure of the MOSFET, a configuration in which the gate insulating film 5 is formed on the first conductivity type drift layer 2 is shown, but as shown in FIG. After forming the source regions 4a and 4b, the first conductivity type epitaxial silicon carbide layer (epitaxial layer) 10 is provided on the drift layer 2, the base regions 3a and 3b, and the partial regions of the source regions 4a and 4b, A gate insulating film 5 may be formed on the epitaxial layer 10. The film thickness of the epitaxial layer 10 is set to such a thickness that an inversion channel layer is formed. In this case, since the inversion channel layer is formed in the first conductivity type epitaxial silicon carbide layer 10, a region where the crystallinity is relatively deteriorated by the impurity implantation is not used as the channel, and the channel mobility of the MOSFET is further increased. Can be improved. In the off state, a depletion layer spreads in the epitaxial layer 10, and a normally-off type transistor can be realized.

  In FIG. 11, parts corresponding to those shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. Also in the structure shown in FIG. 11, after the epitaxial layer 10 is formed on the entire main surface of the substrate, nitriding is performed before and after the formation of the gate insulating film 5 in accordance with the same manufacturing process as described in the previous embodiment. In addition, the epitaxial layer 10 and the gate insulating film 5 are patterned.

  As described above, according to the method for manufacturing a silicon carbide semiconductor device according to the present invention, the surface of the underlying silicon carbide substrate is not oxidized when the insulating film forming step is performed by chemical or physical vapor deposition after nitriding. Therefore, the generation of interface states at the MOS interface due to the thermal oxidation of the silicon carbide substrate as in the case of the thermal oxidation method is reduced, and the quality of the insulating film and the MOS interface is improved by the nitriding process before and after the formation of the insulating film. And the characteristics of the MOSFET are improved.

  The present invention can be applied to an insulated gate transistor element such as a MOSFET or IGBT having an insulating film formed on a silicon carbide substrate layer as a gate insulating film. In addition, as this insulated gate transistor, it can be applied to a lateral semiconductor element in which a source, a gate and a drain electrode are formed on the same main surface, and a power device having high mobility and operating at high speed, This can be realized by the present invention.

It is a figure which shows roughly the cross-section of the silicon carbide semiconductor device manufactured according to this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is process sectional drawing of the manufacturing method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is a figure which shows the temperature profile in each process process time series relevant to gate insulating film preparation in manufacture of the silicon carbide semiconductor device according to this invention. It is a figure which lists and shows the maximum value of the field effect mobility of the silicon carbide semiconductor device produced by the conventional thermal oxidation method of the silicon carbide semiconductor device according to Embodiment 1 of this invention. It is a figure which shows the cross-section of the unit element of the semiconductor device according to other embodiment of this invention.

Explanation of symbols

  1 substrate, 2 drift layer, 3, 3a, 3b base region, 4, 4a, 4b source region, 5 gate insulating film, 6 gate electrode, 7a, 7b source electrode, 8 drain electrode, 10 epitaxial layer.

Claims (7)

Nitriding the silicon carbide substrate surface in a nitrogen oxide-based gas atmosphere;
Forming an insulating film on the nitrided silicon carbide substrate surface by vapor deposition;
And a step of nitriding the insulating film in a nitrogen oxide-based gas atmosphere.   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the step of forming the insulating film by the vapor phase growth method includes the step of forming a silicon dioxide film by using chemical vapor deposition method by thermal decomposition.   2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein both the nitriding treatment in the nitrogen oxide-based gas atmosphere is performed in a temperature range of 900 ° C. to 1450 ° C. 3. The silicon carbide semiconductor device includes an insulated gate transistor,
The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the insulating film is used as a gate insulating film of the insulated gate transistor. The silicon carbide substrate includes a silicon carbide layer having a (11-20) plane as a main surface plane orientation,
The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein said insulating film is formed on said main surface of said silicon carbide layer after said nitriding step. A silicon carbide substrate whose surface is nitrided,
A gate insulating film obtained by nitriding silicon dioxide vapor-grown on the silicon carbide substrate surface;
A silicon carbide semiconductor device comprising: a gate electrode formed on the gate insulating film. The silicon carbide substrate is
A substrate region of a first conductivity type in which an impurity region is formed at a predetermined interval on the surface;
The silicon carbide semiconductor device according to claim 6, further comprising: an epitaxial layer of the first conductivity type formed on the first substrate region.

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