JP2013046412A - オンpcb誘電体導波路 - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
- H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
- H01P11/003—Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
- H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
- H01P11/006—Manufacturing dielectric waveguides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/16—Dielectric waveguides, i.e. without a longitudinal conductor
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/0274—Optical details, e.g. printed circuits comprising integral optical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/12—Coupling devices having more than two ports
- H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/12—Coupling devices having more than two ports
- H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
- H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
- H01P5/188—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers the guides being dielectric waveguides
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- H—ELECTRICITY
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- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P7/00—Resonators of the waveguide type
- H01P7/08—Strip line resonators
- H01P7/082—Microstripline resonators
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- H—ELECTRICITY
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- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P7/00—Resonators of the waveguide type
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
- H05K3/305—Affixing by adhesive
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- Y10T29/49016—Antenna or wave energy "plumbing" making
- Y10T29/49018—Antenna or wave energy "plumbing" making with other electrical component
Abstract
【課題】周波数が高くなるほど大きくなるマイクロストリップ線(MSL)による損失を、誘電体導波路に替えて広範囲の周波数での伝搬損失を低くする。
【解決手段】チップ間RF通信のためのシステムは、PCB上に実装され、システムは、誘電材料から作成された誘電体導波路22を有する。システムは、誘電体導波路22の各端32,34に結合器24,26を有する。各結合器24,26は、誘電体導波路22を信号源28,30に結合する。誘電体導波路22は、PCB上に印刷、型押し、切断又は事前製作される。
【選択図】図1
【解決手段】チップ間RF通信のためのシステムは、PCB上に実装され、システムは、誘電材料から作成された誘電体導波路22を有する。システムは、誘電体導波路22の各端32,34に結合器24,26を有する。各結合器24,26は、誘電体導波路22を信号源28,30に結合する。誘電体導波路22は、PCB上に印刷、型押し、切断又は事前製作される。
【選択図】図1
Description
本開示は、PCB上のチップ間RF通信及びオンPCB誘電体導波路(on-PCB dielectric waveguide)に関する。
通常、PCB上のチップ間通信には銅トラックが使用される。しかしながら、銅トラックのデータ伝送の帯域幅は制限される。更に、データ転送速度が高くなるほど消費エネルギーが増える。また、銅トラックがチップ間で並列構成で使用されることがある。これは、データ転送速度を高め、低周波数と高周波数でのチャネル損失の差を回避することがあるが、消費電力が更に多くなることがある。
また、並列銅トラックはフットプリントが大きくなる原因になり、その結果、大きい回路基板の使用が必要になる。したがって、並列銅トラックを使用してケーシングを小型でスマートな形にすることは困難なことがある。
あるいは、1対の銅トラックを使用して並列−直列変換を行うこともできる。しかしながら、この選択肢は、高データ転送速度用途で電力消費を更に多くする。
一般に、本開示は、PCB上にPCB上のIC間のRF通信のための誘電体導波路(WG)を作成することに関する。これは、WGが、ベースバンド銅バスに置き換わることができ、したがってPCBがより小さいか及び/又はより安価になり得るという利点を有することがある。WGは、PCB上に印刷、型押し、切断又は事前製作されてもよい。
本開示の特定の表現では、PCB上のチップ間RF通信を提供する方法が提供され、この方法は、誘電材料から作成された誘電体導波路を提供する段階と、誘電体導波路の結合の各端で、誘電体導波路を少なくとも2つのチップに結合するための結合器を接続する段階とを含む。
本開示を完全に理解し容易に実用化できるようにするため、非限定的な単なる例の実施形態によって、以上の説明によって言及された以下の説明的な図が提供される。
チップ間RF通信を促進するシステムが提供され、このシステムは、既存の銅トラックを有するPCB上で実現可能である。このシステムは、チップ間の銅トラック接続の代わりにPCB上のチップ間RF通信を可能にする。また、PCB上にシステムの誘電体導波路を実装する方法も提供される。
図1に、誘電体導波路22のそれぞれの端32及び34の結合器24,26によって、第1の信号源28が誘電体導波路22を介して第2の信号源30に結合されたシステム20が示されている。信号源20,30は、集積回路又は「チップ」でよい。
オンPCB誘電体導波路は、銅トラックによる伝送よりも高いデータ帯域幅を有する。誘電体導波路は、典型的には、チャネル減衰の少ない高域通過チャネルである。図15は、オンPCB誘電体導波路とマイクロストリップ線(MSL)の伝搬損失を示すグラフである。周波数が高くなるほど大きくなるMSLによる損失と比べて、誘電体導波路の伝搬損失が広範囲の周波数で小さいことに注意されたい。MSLは、高周波数で高い損失を有するが、損失は、MSLの長さが短いときには高周波数で最小になる。これにより、短いMSLと誘電体導波路を組み合わせて、更に広範囲の周波数で伝搬損失を低くすることができる。
図1を参照すると、チップ間RF通信のためのシステム20が提供される。システム20は、PCB上に実装されてもよく、それによりPCB表面は誘電体層でも金属層でもよいことが分かる。したがって、システム20は、PCB上の金属トラックの上に提供されてもよく、誘電体基板の上に提供されてもよい。システム20は、チップ間通信のために従来の銅バスに置き換わることができる。
システム20は、誘電材料から作成された誘電体導波路22を有する。誘電材料は、例えばPTFE、PTFEとセラミックの複合材料から選択される。図2を参照すると、誘電体導波路22の断面形状の幾つかの例が示される。誘電体導波路22は、例えば、四辺形(図2(a))、円形(図2(b))、半円形(図2(c))、楕円形(図2(d))、及び多角形(図2(e))などのような断面を有することができる。断面形状が、誘電体導波路22の形成に使用される工程によって決定されてもよいことを理解されたい。更に、断面形状は、誘電体導波路22をPCB表面に付着することを可能にしなければならない。
システム20は、また、誘電体導波路22の各端32,34に結合器24,26を有する。各結合器24,26は、誘電体導波路22を信号源28,30に結合する。信号源28,30は、半導体チップでよい。誘電材料の固有インピーダンスは、結合器24,26の出力インピーダンスに整合される。結合器24,26と誘電材料のインピーダンスは、例えば50オームでよい。これらのインピーダンスは整合されなければならない。結合器24,26と誘電体導波路22の誘電材料は、実質的に類似の高域通過周波数応答を有する。誘電体導波路22は、遮断周波数が誘電体導波路22の断面積に依存する高域通過特性を有する。
図3と図4を参照すると、各結合器24,26は、2つの金属層60,62と、2つの金属層60,62の間に配置されたPCB基板64とを有する。図3に表示された結合器24,26の寸法は、単に説明的なものであり、限定的なものと理解されるべきでない。結合器24,26は、PCB上の別個のモジュール又はICチップの一部分でよい。したがって、結合器24,26をPCB製造後に追加することができる。
結合器24,26のPCB基板64の第1の面61にある第1の金属層60は、図3(b)に示されたような平面図で見たとき、多角形(非対称五角形で示されたように)の形でよい。第1の金属層60は、信号源28,30の接点に結合されたMSLと、平面ホーンアンテナ68への移行部分とを有する。平面ホーンアンテナ68も、高域通過特性を有する。平面ホーンアンテナ68の2つの金属経路のスパニング角度は、平面ホーンアンテナ68を誘電体導波路22と整合させるときに望ましい、誘電体導波路22と同一の遮断周波数を得るように制御されなければならない。第1の金属層60のMSL66から遠くにある遠位縁72は、結合器24,26の平面ホーン状伝送領域を指すことがある。
PCB基板64の第2の面63にある第2の金属層62(図3(c)に示す)は、結合器24,26の接地板として働き、第1の金属層60と重ならない。第1の金属層60と第2の金属層62に使用される金属には、例えば銅が挙げられる。誘電体導波路22は、図18と図19に示されたように結合器24,26に結合され、それにより、誘電体導波路22は、結合器24,26上に配置するための重なり部分19を有する。
図8を参照すると、結合器24,26と共に誘電体導波路22を有するPCB64の概略図が示される。図8のポート1とポート2がそれぞれ信号源1(28)と信号源2(30)からのものであることを理解されたい。図9は、PCB64の伝搬損失をシミュレートしたグラフを示す。線「P21」は、線「P31」と比較したポート1からポート2での伝搬損失をシミュレートしたグラフであり、線「P31」は、(誘電体導波路22なし)ポート1からポート3での低レベルのRF信号受信を示す。図15に示された設定に基づく図16に示されたような初期シミュレーション結果から、PCB64上に誘電体導波路22がない状態でポート2とポート3での伝搬損失が類似していることが分かり、誘電体導波路22が伝搬損失を最小にすることは明らかである。
図10を参照すると、結合器25,27と共に手描きの誘電体導波路23を有するPCB65の平面図の写真が示される。図11は、PCB65の実際の伝搬損失のグラフを示す。線「ポート5」は、線「ポート6」と比較して、ポート4からポート5でより高レベルのRF信号受信を示し、線「ポート6」は、ポート4からポート6(誘電体導波路23なし)でより低レベルのRF信号受信を示す。誘電体導波路23での伝搬モードは、誘電体導波路23のサイズと結合器25,27をタイプに依存する。例えば、平面ホーン結合器は、WG内でTEモード伝搬になる。
伝搬損失を最小にする他に、システム20を使用することによって、電磁干渉が最小になり、またチップ間通信に関しては銅トラックの使用と比較して消費電力が減少することを理解されたい。
図5〜図7を参照すると、PCB上に誘電体導波路22を形成する複数の方法が示される。図5は、誘電体導波路22を構成する「印刷」法70を示す。「印刷」法70は、PCB(72)上に溶融誘電材料の誘電体導波路22を配置し、誘電材料(74)のチャネル22を固体化することを含む。誘電材料は、例えば、PTFE、PTFEとセラミックの複合材料などから選択される。「印刷」法70が、様々な信号源を接続するために誘電体導波路22の経路を容易に変更することができるので、低コストで汎用性であることを理解されたい。更に、誘電体導波路22を任意のPCB上の既存の銅トラック上に形成することができる。「印刷」法70は、図14(a)に図示される。
図6は、誘電体導波路22を形成する「射出型押し(injection stamping)」法80を示す。「射出型押し」法80は、溶融誘電材料を、誘電体導波路22(82)を形成するための射出成形金型に射出し、次に誘電材料をPCB(84)に、所望の断面形状と適切な密度を保証するのに十分な圧力で型押しする工程を含む。更に、チャネル22を任意のPCB上の既存の銅トラック上に形成することもできる。「射出型押し」法80は、図14(b)に図示される。
図7は、誘電体導波路22を形成する「切断」法90である。「切断」法90は、誘電材料層をPCB(92)に接着し、誘電材料層(94)から誘電体導波路22を切り出し、誘電材料層(96)の余分な部分を除去することを含む。更に、誘電体導波路22は、任意のPCB上の既存の銅トラック上に形成することもできる。「切断」法90は、図14(c)に図示される。
PCB上に誘電体導波路22を接着又は取り付けることによってPCB上に誘電体導波路22を形成することもでき、誘電体導波路22は事前製作される。事前製作された誘電体導波路22は、例えば射出成形、真空成形及び圧縮成形を使用して形成されてもよい。誘電体導波路22を接着又は取り付けるこの方法は、図14(d)に図示される。
システム20が使用されるとき、これにより使用する銅が少なくなることに注意されたい。単一の誘電体導波路が、複数の銅トラックに置き換わることができる。これにより、結合器に銅の使用が検討されるときでも、誘電体導波路の使用は、複数の銅トラックの使用より経済的である。
同一の測定縮尺を有する図12と図13に示されたように、図12は、チップ間通信のための複数の銅トラックを使用するPCB基板を示し、図13は、システム20を使用することにより図12に示されたものと同じ機能を備えたPCB基板を示す。図13のPCBの寸法は、図12のPCBと比べて小さいことは明らかである。したがって、システム20の使用により、PCBのフットプリントが小さくなることが明らかである。集積回路チップと導波路の寸法がPCBのサイズにも影響を与えることを理解されたい。
また、誘電体導波路22を除去するか再構成することもでき、また誘電体導波路22を既存の銅トラックの上に形成してもよいので、誘電体導波路22を形成する方法が、PCBの構成の柔軟性を可能にすることに注意されたい。また、以上の方法は、PCB上に複数の銅トラックを実装するよりコストが少ない。
以上の説明では例示的な実施形態について述べたが、当業者は、本開示から逸脱することなく設計、構成及び/又は操作の詳細の多くの変形を行えることを理解するであろう。
22 誘電体導波路
24 結合器1
26 結合器2
28 信号源1
30 信号源2
24 結合器1
26 結合器2
28 信号源1
30 信号源2
Claims (8)
- PCB上にチップ間RF通信を提供する方法であって、
誘電材料で作成された誘電体導波路を提供する段階と、
前記誘電体導波路の各端に、前記誘電体導波路を少なくとも2つのチップに結合するための結合器を接続する段階とを含む方法。 - 前記誘電体は、四辺形、円形、半円形、楕円形、及び多角形からなる群から選択された断面形状を有する、請求項1に記載の方法。
- 前記誘電体導波路を提供する段階が、印刷、射出型押し、及びエッチングからなる群から選択された工程を含む、請求項1又は2に記載の方法。
- 前記結合器が、
チップの接点に接続するMSLと、
前記MSLから前記誘電体導波路まで移行する平面ホーンアンテナとを有する、請求項1〜3のいずれか一項に記載の方法。 - 前記誘電体導波路を提供する段階が、
前記結合器間の前記PCB上に液体又は半液体誘電体材料を印刷する段階と、
前記液体又は半液体誘電体材料を前記誘電体導波路に固体化させる段階とを含む、請求項1〜4のいずれか一項に記載の方法。 - 前記誘電体導波路を提供する段階が、
誘電材料を型に射出する段階と、
前記誘電材料を前記型から前記結合器間の前記PCBに型押しする段階とを含む、請求項1〜4のいずれか一項に記載の方法。 - 前記誘電体導波路を提供する段階が、
前記誘電材料層を前記PCBに付着させる段階と、
前記誘電体層の余分な部分を切断する段階と、
前記余分な部分を除去する段階とを含む、請求項1〜4のいずれか一項に記載の方法。 - 前記誘電体導波路を提供する段階が、
事前製作された誘電体導波路を提供する段階と、
前記事前製作された導波路を前記結合器間の前記PCBに取り付ける段階とを含む、請求項1〜4のいずれか一項に記載の方法。
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US6750827B2 (en) * | 2002-05-08 | 2004-06-15 | Waveband Corporation | Dielectric waveguide antenna with improved input wave coupler |
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EP2000836A1 (en) * | 2007-06-07 | 2008-12-10 | Interuniversitair Microelektronica Centrum | Method and system for a grating multiplexer with optical waveguide coupling |
JP2010245905A (ja) * | 2009-04-07 | 2010-10-28 | Sony Corp | 送信装置および通信システム |
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- 2012-08-17 CN CN2012102947312A patent/CN102956946A/zh active Pending
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Also Published As
Publication number | Publication date |
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CN102956946A (zh) | 2013-03-06 |
US20130104387A1 (en) | 2013-05-02 |
SG188012A1 (en) | 2013-03-28 |
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