CN102956946A - Pcb上的电介质波导 - Google Patents

Pcb上的电介质波导 Download PDF

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CN102956946A
CN102956946A CN2012102947312A CN201210294731A CN102956946A CN 102956946 A CN102956946 A CN 102956946A CN 2012102947312 A CN2012102947312 A CN 2012102947312A CN 201210294731 A CN201210294731 A CN 201210294731A CN 102956946 A CN102956946 A CN 102956946A
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dielectric waveguide
pcb
dielectric
coupler
chip
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马逾钢
杨庆炳
増田久
张亚琼
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Sony Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
    • H01P11/003—Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/16—Dielectric waveguides, i.e. without a longitudinal conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
    • H01P11/006—Manufacturing dielectric waveguides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0274—Optical details, e.g. printed circuits comprising integral optical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/12—Coupling devices having more than two ports
    • H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/12—Coupling devices having more than two ports
    • H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
    • H01P5/188—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers the guides being dielectric waveguides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P7/00—Resonators of the waveguide type
    • H01P7/08—Strip line resonators
    • H01P7/082—Microstripline resonators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P7/00—Resonators of the waveguide type
    • H01P7/08—Strip line resonators
    • H01P7/086—Coplanar waveguide resonators
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1327—Moulding over PCB locally or completely
    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49016—Antenna or wave energy "plumbing" making
    • Y10T29/49018—Antenna or wave energy "plumbing" making with other electrical component

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Abstract

本发明提供了一种PCB上的电介质波导。提供了一种涉及制造用于PCB上的各个IC之间的RF通信的PCB上的电介质波导(WG)的方法。WG能够取代基带铜总线，因此，PCB能够更小和/或更便宜。WG可印刷、压印、切割或预制到PCB上。

Description

PCB上的电介质波导
技术领域
本发明涉及PCB上的芯片到芯片的RF通信和一种PCB上的电介质波导。
背景技术
铜轨道典型地用于PCB上的芯片到芯片的通信。然而，对于数据传输，铜轨道的带宽受到限制。此外，当数据传输速率增加时，耗费的能量增加。铜轨道也可以按照并行结构应用在芯片之间。这可增加数据传输速率并避免在低频和高频的信道损失差，但功耗可能甚至更高。
并行铜轨道还导致大的覆盖区，需要使用大的电路板。因此，使用并行铜轨道可能难以具有紧凑而光滑的壳体。
另一方面，也能够使用一对铜轨道执行并串转换。然而，对于高数据传输速率应用，这种替换方案仍然受高功耗问题的困扰。
发明内容
概括而言，本发明涉及制造用于PCB上的各个集成电路（IC）之间的RF通信的PCB上的电介质波导(WG)。这可具有这样的优点：WG能够取代基带铜总线，因此，PCB能够更小和/或更便宜。WG可印刷、压印、切割或预制在PCB上。
在本发明的特定表达中，提供了一种用于在PCB上提供芯片到芯片的RF通信的方法，该方法包括：
提供由电介质材料制成的电介质波导；以及
把在电介质波导的每一端的、用于耦合电介质波导的耦合器连接到至少两个芯片。
附图说明
为了确保充分地理解本发明并容易地实施本发明，作为非限制性例子提供了实施例、由前面的描述参考的下面的说明性附图。
图1是用于实施例的芯片到芯片的RF通信的系统的示意图；
图2(a)至(e)是本发明的电介质波导的截面形状的例子的示图；
图3(a)至(c)是图1中的耦合器的平面图图像；
图4是图3的耦合器的示意性侧视图；
图5是形成电介质波导的第一方法的处理流程图；
图6是形成电介质波导的第二方法的处理流程图；
图7是形成电介质波导的第三方法的处理流程图；
图8是具有电介质波导的PCB的示意图；
图9是图8的PCB的模拟的传播损失的曲线图；
图10是具有手绘的电介质波导的PCB的照片；
图11是图10的PCB的实际传播损失的图表；
图12是使用铜轨道的PCB的图像；
图13是使用本发明的系统的PCB的图像；
图14(a)至(d)是形成电介质波导的例子的示图；
图15是显示PCB上的电介质波导和微带线(MSL)的传播损失的曲线图；
图16是没有任何电介质波导的PCB的示意图；
图17是图16的PCB的模拟的传播损失的曲线图；
图18是与电介质波导耦合的图1中的耦合器的平面图图像；和
图19是与电介质波导耦合的图1中的耦合器的侧视图图像。
具体实施方式
本发明提供了一种促进芯片到芯片的RF通信的系统，由此该系统可实现在具有已有铜轨道的PCB上。该系统能够替代芯片之间的铜轨道连接在PCB上实现芯片到芯片的RF通信。还提供了在PCB上包括该系统的电介质波导的方法。
系统20显示在图1中，具有第一信号源28，利用位于电介质波导22的相应末端32、34的耦合器24、26，第一信号源28经电介质波导22连接到第二信号源30。源20、30可以是集成电路或“芯片”。
与经铜轨道的传输相比，PCB上的电介质波导具有更高的数据带宽。电介质波导典型地是具有低信道衰减的高通信道。图15是显示PCB上的电介质波导和微带线(MSL)的传播损失的曲线图。应该注意的是，随着频率增加时，与MSL的损失增加相比，对于宽频率范围，电介质波导的传播损失低。虽然MSL在高频具有高损失，但当MSL的长度很小时，损失在高频处被最小化。因此，可以组合短MSL和电介质波导并且仍然在宽频率范围上具有低传播损失。
参照图1，提供了用于芯片到芯片的RF通信的系统20。可以理解，系统20可以被包括在PCB上，由此PCB表面可以是电介质层或金属层。如此，系统20能够布置在PCB上的金属导轨或电介质基底上方。系统20可取代用于芯片到芯片的通信的常规铜总线。
系统20包括由电介质材料制成的电介质波导22。例如，可从PTFE或PTFE和陶瓷的复合材料中选择电介质材料。参照图2，显示了电介质波导22的截面形状的一些例子。电介质波导22可具有像是例如四边形(图2(a))、圆形(图2(b))、半圆形(图2(c))、椭圆形(图2(d))和多边形(图2(e))的截面形状。应该理解，截面形状可由用于形成电介质波导22的工艺确定。另外，截面形状应该允许电介质波导22粘附于PCB表面。
系统20还包括位于电介质波导22的每一端32、34的耦合器24、26。每个耦合器24、26把电介质波导22耦合到信号源28、30。信号源28、30可以是半导体芯片。电介质材料的固有阻抗与耦合器24、26的输出阻抗匹配。耦合器24、26和电介质材料的阻抗可以是例如50ohm。它们的阻抗应该匹配。耦合器24、26和电介质波导22的电介质材料具有基本上相似的高通频率响应。电介质波导22具有高通特性，并且截止频率取决于电介质波导22的横截面面积。
参照图3和图4，每个耦合器24、26包括两个金属层60、62和位于这两个金属层60、62之间的PCB基底64。应该理解，图3中表示的耦合器24、26的尺寸仅是说明性的并且不应该解释为限制性的。耦合器24、26可以是PCB上的分立模块或者IC芯片的一部分。因此，能够在制造PCB之后增加耦合器24、26。
当如图3(b)中所示按照平面图观看时，位于耦合器24、26的PCB基底64的第一面61的第一金属层60可具有多边形形状的形式(示出了不对称的五边形)。第一金属层60包括MSL，其耦合到信号源28、30的触点，并转变到平面喇叭天线68。平面喇叭天线68也是高通的。应该控制平面喇叭天线68的两个金属路径的跨角（spanning angle），以获得与电介质波导22相同的截止频率，当使平面喇叭天线68与电介质波导22匹配时希望实现这一点。第一金属层60的远离MSL 66的远边缘72可表示耦合器24、26的平面喇叭状传输区域。
位于PCB基底64的第二面63的第二金属层62(如图3(c)中所示)用作耦合器24、26的接地板，并且不与第一金属层60重叠。用于第一金属层60和第二金属层62的金属可包括例如铜。电介质波导22以如图18和19中所示的方式耦合到耦合器24、26，由此电介质波导22包括用于放置在耦合器24、26上的重叠部分19。
参照图8，显示了具有电介质波导22并具有耦合器24、26的PCB 64的示意图。应该理解，图8中的端口1和端口2分别来自信号源1(28)和信号源2(30)。图9显示PCB 64的模拟的传播损失的图表。与显示来自端口1的在端口3的较低水平的RF信号接收(没有电介质波导22)的线“P31”相比，线“P21”显示来自端口1的在端口2的较高水平的RF信号接收。因为基于图15中显示的设置的如图16中所示的早前模拟结果已显示在端口2和端口3的传播损失与在PCB 64上没有电介质波导22的情况下相似，所以很明显地，电介质波导22使传播损失最小化。
参照图10，显示了具有手绘的电介质波导23并具有耦合器25、27的PCB 65的平面图的照片。图11显示PCB 65的实际传播损失的图表。与显示来自端口4的在端口6的较低水平的RF信号接收(没有电介质波导23)的线“端口6”相比，线“端口5”显示来自端口4的在端口5的较高水平的RF信号接收。在电介质波导23中的传播的模式取决于电介质波导23的尺寸和耦合器25、27的类型。例如，平面喇叭耦合器在WG中导致TE模式传播。
除了使传播损失最小化之外，还应该理解，与使用铜轨道进行芯片到芯片的通信相比，使用系统20可以使电磁干扰最小化并且降低功耗。
参照图5至7，显示了用于在PCB上形成电介质波导22的多种方法。图5显示用于形成电介质波导22的“印刷”方法70。“印刷”方法70包括：在PCB上铺设熔化的电介质材料的电介质波导22(72)；以及使电介质材料的通道22凝固(74)。例如，可从PTFE、PTFE和陶瓷的复合材料等中选择电介质材料。应该理解，“印刷”方法70成本低并且通用，因为电介质波导22的路径可容易地改变以把各种信号源连接在一起。另外，电介质波导22还能够形成在任何PCB上的已有铜轨道上。“印刷”方法70在图14(a)中以图形方式表示。
图6显示用于形成电介质波导22的“注射压印”方法80的处理过程。“注射压印”方法80包括：把熔化的电介质材料注射到注模（injection mold）中，注模用于形成电介质波导22(82)；随后，利用足够的压力把电介质材料压印到PCB(84)以确保所希望的截面形状和合适的密度。另外，通道22还能够形成在任何PCB上的已有铜轨道上。“注射压印”方法80在图14(b)中以图形方式表示。
图7显示用于形成电介质波导22的“切割”方法90的处理过程。“切割”方法90包括：把一层电介质材料粘附于PCB(92)；从该电介质材料层切割电介质波导22(94)；以及去除该层电介质材料的多余部分(96)。另外，电介质波导22还能够形成在任何PCB上的已有铜轨道上。“切割”方法90在图14(c)中以图形方式表示。
也可以通过在PCB上粘附或安装电介质波导22而形成PCB上的电介质波导22，由此预制电介质波导22。可使用例如注射模塑、真空成型和压缩模塑形成预制电介质波导22。粘附或安装电介质波导22的这种方法在图14(d)中以图形方式表示。
应该注意的是，当使用系统20时，相应地使用较少的铜。单个电介质波导能够取代多个铜轨道。因此，即使当考虑到对于耦合器使用铜时，使用电介质波导也比使用多个铜轨道经济。
如具有相同测量比例的图11和12中所示，图11显示使用多个铜轨道进行芯片到芯片的通信的PCB板，而图12显示使用系统20的与图11中显示的PCB板具有相同功能的PCB板。与图11中的PCB相比，图12中的PCB的更紧凑的尺寸是很明显的。如此，很明显地，使用系统20导致PCB上的更小的覆盖区。应该理解，IC芯片和波导尺寸也影响PCB的尺寸。
还应该注意的是，用于形成电介质波导22的方法能够实现PCB的结构的灵活性，因为能够去除或重新构造电介质波导22，并且电介质波导22可形成在已有铜轨道上方。与在PCB上包括多个铜轨道相比，前述方法也具有较低成本。
尽管前面的描述已描述示例性实施例，但相关领域技术人员将会理解，在不脱离本发明的情况下，可以做出设计、构造和/或操作的细节上的许多修改。

Claims (8)

1.一种用于在PCB上提供芯片到芯片的RF通信的方法，该方法包括：
提供由电介质材料制成的电介质波导；以及
把位于电介质波导的每一端的、用于耦合电介质波导的耦合器连接到至少两个芯片。
2.如权利要求1所述的方法，其中所述电介质具有从包括以下各项的组选择的截面形状：四边形、圆形、半圆形、椭圆形和多边形。
3.如权利要求1或2所述的方法，其中提供电介质波导的步骤包括从包括以下各项的组选择的处理：印刷、注射成型和压印以及蚀刻。
4.如权利要求1至3中任何一项所述的方法，其中所述耦合器包括：
MSL，连接到芯片的触点；和
平面喇叭天线，从MSL转变到电介质波导。
5.如上述权利要求中任何一项所述的方法，其中提供电介质波导的步骤包括：
在耦合器之间在PCB上印刷液体或半液体电介质材料；以及
使液体或半液体电介质材料固化为电介质波导。
6.如权利要求1-4中任何一项所述的方法，其中提供电介质波导的步骤包括：
把电介质材料注射到模具中；以及
在耦合器之间把电介质材料从模具压印到PCB。
7.如权利要求1-4中任何一项所述的方法，其中提供电介质波导的步骤包括：
把一层电介质材料粘附于PCB；
切割电介质材料的多余部分；以及
去除多余部分。
8.如权利要求1-4中任何一项所述的方法，其中提供电介质波导的步骤包括：
提供预制的电介质波导；以及
在耦合器之间把预制的电介质波导连接到PCB。
CN2012102947312A 2011-08-26 2012-08-17 Pcb上的电介质波导 Pending CN102956946A (zh)

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