JP2013026238A - Mounting base plate, and electronic device - Google Patents

Mounting base plate, and electronic device Download PDF

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Publication number
JP2013026238A
JP2013026238A JP2011156087A JP2011156087A JP2013026238A JP 2013026238 A JP2013026238 A JP 2013026238A JP 2011156087 A JP2011156087 A JP 2011156087A JP 2011156087 A JP2011156087 A JP 2011156087A JP 2013026238 A JP2013026238 A JP 2013026238A
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conductor pin
conductor
mounting substrate
mounting
pin
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JP5855863B2 (en
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Kiyotaka Tsukada
輝代隆 塚田
Masaharu Ono
正治 小野
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Ibiden Co Ltd
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Ibiden Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To enhance connection reliability of a conductor pin of a mounting base plate and an electronic component to be mounted thereon.SOLUTION: The mounting base plate has a first conductor pin, a second conductor pin and a support substrate, the support substrate is connected to one end side of the first and second conductor pins, and an electronic component can be connected electrically to the other end side of the first and second conductor pins. At least the first conductor pin has a side surface composed at least of a first side surface on the other end side, and a second side surface on the one end side, and the first and second side surfaces are connected to swell outward on the intersection P1 thereof.

Description

本発明は、実装用基板、及び電子デバイスに関する。   The present invention relates to a mounting substrate and an electronic device.

放熱性及び実装容易性などを向上するため、導体ピンと、その導体ピンの一端に接続される支持基板と、を有し、上記導体ピンの他端に電子部品を電気的に接続することができるパッケージ(実装用基板)が提案されている(特許文献1参照)。例えば特許文献1に記載される従来のパッケージでは、電子部品が、第1の支持基板と第2の支持基板との間に挟み込まれるように実装される。詳しくは、第1の支持基板は導体ピン(突出電極)を有し、電子部品は第2の支持基板上に設置される。そして、電子部品の電極は、半田を介して、第1の支持基板から突き出る導体ピンと電気的に接続される。   In order to improve heat dissipation and ease of mounting, etc., it has a conductor pin and a support substrate connected to one end of the conductor pin, and an electronic component can be electrically connected to the other end of the conductor pin. A package (mounting substrate) has been proposed (see Patent Document 1). For example, in a conventional package described in Patent Document 1, an electronic component is mounted so as to be sandwiched between a first support substrate and a second support substrate. Specifically, the first support substrate has conductor pins (projecting electrodes), and the electronic component is placed on the second support substrate. And the electrode of an electronic component is electrically connected with the conductor pin which protrudes from a 1st support substrate through solder.

特開2008−60529号公報JP 2008-60529 A

しかしながら、上記特許文献1に記載されるような従来の導体ピンに電子部品を実装する手法(以下、ピンボンディングという)は、接続信頼性の点でまだ改善の余地があると考えられる。   However, it is considered that there is still room for improvement in terms of connection reliability in the conventional method of mounting electronic components on the conductor pins as described in Patent Document 1 (hereinafter referred to as pin bonding).

本発明は、実装用基板の導体ピンと、これに実装される電子部品との接続信頼性を高めることを目的とする。   An object of the present invention is to improve the connection reliability between a conductor pin of a mounting board and an electronic component mounted thereon.

本発明に係る実装用基板は、第1の導体ピンと第2の導体ピンと支持基板とを有し、前記第1の導体ピンと前記第2の導体ピンの一端側に前記支持基板が接続され、前記第1の導体ピンと前記第2の導体ピンの他端側に電子部品を電気的に接続することができる実装用基板であって、少なくとも前記第1の導体ピンは、側面が少なくとも前記他端側の第1の側面と前記一端側の第2の側面とで構成され、前記第1の側面と前記第2の側面とが交線部で、外側に膨らむように構成されている。   The mounting substrate according to the present invention includes a first conductor pin, a second conductor pin, and a support substrate, and the support substrate is connected to one end side of the first conductor pin and the second conductor pin, A mounting substrate capable of electrically connecting an electronic component to the other end side of the first conductor pin and the second conductor pin, wherein at least the first conductor pin has a side surface at least on the other end side The first side surface and the second side surface on the one end side are configured such that the first side surface and the second side surface bulge outward at the intersection.

前記第1の側面と前記第2の側面との前記交線部は、前記第1の導体ピンの外周を周回する曲線に沿って形成された部分を有する、ことが好ましい。   It is preferable that the intersection line portion between the first side surface and the second side surface has a portion formed along a curve that goes around the outer periphery of the first conductor pin.

前記第1の側面と前記第2の側面との前記交線部は、前記第1の導体ピンの外周を周回する、ことが好ましい。   It is preferable that the intersection part of the first side surface and the second side surface circulates around the outer periphery of the first conductor pin.

前記第1の側面は、テーパ状に形成されている、ことが好ましい。   It is preferable that the first side surface is formed in a tapered shape.

前記第1の導体ピンの中心軸を含む断面において、前記第1の側面と前記中心軸のなす角は、5〜20°の範囲にある、ことが好ましい。   In a cross section including the central axis of the first conductor pin, it is preferable that an angle formed by the first side surface and the central axis is in a range of 5 to 20 °.

前記第1の側面は平面であり、前記第2の側面は円柱部分の側面である、ことが好ましい。   Preferably, the first side surface is a flat surface and the second side surface is a side surface of a cylindrical portion.

前記交線部は、前記第1の導体ピンの前記他端側端面から導体ピンの軸方向に0.2mmまでの範囲にある、ことが好ましい。   It is preferable that the intersecting line portion is in a range from the other end side end surface of the first conductor pin to 0.2 mm in the axial direction of the conductor pin.

前記交線部において前記第1の側面と前記第2の側面のなす角度は、89〜170°の範囲にある、ことが好ましい。   It is preferable that an angle formed between the first side surface and the second side surface in the intersecting line portion is in a range of 89 to 170 °.

前記第1の導体ピンの少なくとも前記交線部の周辺は、被覆材で覆われている、ことが好ましい。   It is preferable that at least the periphery of the intersecting line portion of the first conductor pin is covered with a covering material.

前記被覆材の、前記交線部を覆う部分は、部分的に厚くなっている、ことが好ましい。   It is preferable that a portion of the covering material covering the intersecting line portion is partially thickened.

前記被覆材は、前記第1の導体ピンの前記交線部のみを覆っている、ことが好ましい。   It is preferable that the covering material covers only the intersecting line portion of the first conductor pin.

前記被覆材は、電解めっき膜からなる、ことが好ましい。   The covering material is preferably made of an electrolytic plating film.

前記第1の導体ピンは、銅、金、及びそれらの合金のいずれかからなり、前記被覆材は、ニッケル、クロム、及び亜鉛のいずれかからなる、ことが好ましい。   Preferably, the first conductor pin is made of any one of copper, gold, and an alloy thereof, and the covering material is made of any one of nickel, chromium, and zinc.

前記第2の導体ピンは、前記他端側が円柱形状である、ことが好ましい。   The second conductor pin preferably has a cylindrical shape on the other end side.

前記第1の導体ピンは、前記第2の導体ピンよりも細い導体ピンである、ことが好ましい。   It is preferable that the first conductor pin is a conductor pin thinner than the second conductor pin.

前記第1の導体ピンは、複数で構成された第1の導体ピン群を構成し、前記第1の導体ピン群は長さが揃っている、ことが好ましい。   It is preferable that the first conductor pins constitute a plurality of first conductor pin groups, and the first conductor pin groups have the same length.

前記第2の導体ピンは、複数で構成された第2の導体ピン群を構成し、前記第2の導体ピン群は長さが揃っている、ことが好ましい。   Preferably, the second conductor pins constitute a plurality of second conductor pin groups, and the second conductor pin groups have the same length.

前記第1の導体ピン群は、前記第1の導体ピンの太さが揃っている、ことが好ましい。   It is preferable that the first conductor pin group has the same thickness as the first conductor pin.

前記第2の導体ピン群は、前記第2の導体ピンの太さが揃っている、ことが好ましい。   The second conductor pin group preferably has the same thickness as the second conductor pin.

本発明に係る電子デバイスは、前記実装用基板と、前記第1の導体ピンの前記他端側と、前記第2の導体ピンの前記他端側と、に半田を介して電気的に接続された電子部品と、を有する。   The electronic device according to the present invention is electrically connected to the mounting substrate, the other end side of the first conductor pin, and the other end side of the second conductor pin via solder. Electronic components.

前記第1の導体ピンの少なくとも前記交線部は、被覆材で覆われており、前記被覆材は、前記第1の導体ピンを構成する材料よりも、前記半田に対して濡れ性が低い導体からなる、ことが好ましい。   At least the intersection portion of the first conductor pin is covered with a covering material, and the covering material is a conductor having lower wettability with respect to the solder than the material constituting the first conductor pin. It is preferable that it consists of.

前記電子部品はトランジスタであり、前記第1の導体ピンは、前記トランジスタのゲートに電気的に接続される、ことが好ましい。   Preferably, the electronic component is a transistor, and the first conductor pin is electrically connected to the gate of the transistor.

本発明によれば、実装用基板の導体ピンとこれに実装される電子部品との接続箇所に十分な大きさの半田のフィレットが形成されるので、半田に亀裂が入りにくく実装用基板の導体ピンと、これに実装される電子部品との接続信頼性を高めることができる。   According to the present invention, since a sufficiently large solder fillet is formed at the connection portion between the conductor pin of the mounting substrate and the electronic component mounted thereon, the solder pin is less likely to crack and the conductor pin of the mounting substrate The connection reliability with the electronic component mounted thereon can be improved.

本発明の実施形態に係る電子デバイス、及びそれを構成する実装用基板を示す平面図である。It is a top view which shows the electronic device which concerns on embodiment of this invention, and the mounting board | substrate which comprises it. 本発明の実施形態に係る電子デバイス、及びそれを構成する実装用基板を示す断面図である。It is sectional drawing which shows the electronic device which concerns on embodiment of this invention, and the mounting board | substrate which comprises it. 本発明の実施形態に係る実装用基板に用いられる第2の導体ピンを示す図である。It is a figure which shows the 2nd conductor pin used for the mounting board | substrate which concerns on embodiment of this invention. 図3Aに示す第2の導体ピンを挿入端側から見た図である。It is the figure which looked at the 2nd conductor pin shown in Drawing 3A from the insertion end side. 本発明の実施形態に係る実装用基板に用いられる第1の導体ピンを示す図である。It is a figure which shows the 1st conductor pin used for the board | substrate for mounting which concerns on embodiment of this invention. 図4Aに示す第1の導体ピンを挿入端側から見た図である。It is the figure which looked at the 1st conductor pin shown in Drawing 4A from the insertion end side. 本発明の実施形態に係る実装用基板に用いられる第1の導体ピンの実装端近傍を示す図である。It is a figure which shows the mounting end vicinity of the 1st conductor pin used for the mounting board | substrate which concerns on embodiment of this invention. 図5Aに示す第1の導体ピンを実装端側から見た図である。It is the figure which looked at the 1st conductor pin shown in Drawing 5A from the mounting end side. 第1の導体ピンと電子部品との接続部を示す断面図である。It is sectional drawing which shows the connection part of a 1st conductor pin and an electronic component. 本発明の実施形態に係る第1の導体ピンの形状の詳細を示す図である。It is a figure which shows the detail of the shape of the 1st conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る交線部周辺を覆う被覆材を示す図である。It is a figure which shows the coating | covering material which covers the intersection part periphery which concerns on embodiment of this invention. 比較例に係るストレートピンと電子部品との接続部を示す図である。It is a figure which shows the connection part of the straight pin and electronic component which concern on a comparative example. 比較例に係る半田の這い上がりを説明するための図である。It is a figure for demonstrating the creeping of the solder which concerns on a comparative example. 比較例に係るストレートピンについて、半田這い上がりの説明図である。It is explanatory drawing of a solder scoop up about the straight pin which concerns on a comparative example. 本発明の実施形態に係る第1の導体ピンについて、半田這い上がりの説明図である。It is explanatory drawing of solder scooping up about the 1st conductor pin which concerns on embodiment of this invention. 比較例に係るストレートピンと本発明の実施形態に係る第1の導体ピンとの各々について、半田這い上がりを示すグラフである。It is a graph which shows a solder scoop up about each of the straight pin which concerns on a comparative example, and the 1st conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る実装用基板の製造方法について、支持基板を準備する工程を説明するための図である。It is a figure for demonstrating the process of preparing a support substrate about the manufacturing method of the mounting board | substrate which concerns on embodiment of this invention. 本発明の実施形態に係る実装用基板の製造方法について、支持基板に孔を形成する工程を説明するための図である。It is a figure for demonstrating the process of forming a hole in a support substrate about the manufacturing method of the mounting board | substrate which concerns on embodiment of this invention. 本発明の実施形態に係る実装用基板の製造方法について、先端近傍に、軸に平行なストレート側面を有する導体ピンを準備する工程を説明するための図である。It is a figure for demonstrating the process of preparing the conductor pin which has a straight side surface parallel to an axis | shaft near the front-end | tip about the manufacturing method of the mounting board | substrate which concerns on embodiment of this invention. 図11Aに示す導体ピンをプレス加工する工程を説明するための図である。It is a figure for demonstrating the process of pressing the conductor pin shown to FIG. 11A. 図11Bのプレス加工により形成された、先端側に交線部を有する導体ピンを示す図である。It is a figure which shows the conductor pin which has an intersection part in the front end side formed by the press work of FIG. 11B. 本発明の実施形態に係る第2の導体ピンを形成する第2の方法を説明するための図である。It is a figure for demonstrating the 2nd method of forming the 2nd conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る実装用基板の製造方法について、支持基板の孔に導体ピンを挿入する工程を説明するための図である。It is a figure for demonstrating the process of inserting a conductor pin in the hole of a support substrate about the manufacturing method of the mounting board | substrate which concerns on embodiment of this invention. 本発明の実施形態に係る完成した実装用基板を示す図である。It is a figure which shows the completed mounting board | substrate which concerns on embodiment of this invention. 本発明の実施形態に係る実装用基板の製造方法について、基板上に電子部品を設置する工程を説明するための図である。It is a figure for demonstrating the process of installing an electronic component on a board | substrate about the manufacturing method of the mounting board | substrate which concerns on embodiment of this invention. 本発明の実施形態に係る実装用基板の製造方法について、実装用基板の導体ピンに電子部品を実装する工程を説明するための図である。It is a figure for demonstrating the process of mounting an electronic component in the conductor pin of the mounting board | substrate about the manufacturing method of the mounting board | substrate which concerns on embodiment of this invention. 本発明の第1の変形例に係る第1の導体ピンの実装端近傍を示す図である。It is a figure which shows the mounting end vicinity of the 1st conductor pin which concerns on the 1st modification of this invention. 図16Aに示す第1の導体ピンを実装端側から見た図である。It is the figure which looked at the 1st conductor pin shown to FIG. 16A from the mounting end side. 本発明の第1の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 1st modification of this invention. 本発明の第2の変形例に係る第1の導体ピンの実装端近傍を示す図である。It is a figure which shows the mounting end vicinity of the 1st conductor pin which concerns on the 2nd modification of this invention. 図17AのA−A断面図である。It is AA sectional drawing of FIG. 17A. 本発明の第2の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 2nd modification of this invention. 本発明の第3の変形例に係る第1の導体ピンの実装端近傍を示す図である。It is a figure which shows the mounting end vicinity of the 1st conductor pin which concerns on the 3rd modification of this invention. 図18Aに示す第1の導体ピンを実装端側から見た図である。It is the figure which looked at the 1st conductor pin shown to FIG. 18A from the mounting end side. 本発明の第3の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 3rd modification of this invention. 本発明の第4の変形例に係る第1の導体ピンの実装端近傍を示す図である。It is a figure which shows the mounting end vicinity of the 1st conductor pin which concerns on the 4th modification of this invention. 図19AのA−A断面図である。It is AA sectional drawing of FIG. 19A. 本発明の第4の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 4th modification of this invention. 本発明の第5の変形例に係る第1の導体ピンの実装端近傍を示す図である。It is a figure which shows the mounting end vicinity of the 1st conductor pin which concerns on the 5th modification of this invention. 図20AのA−A断面図である。It is AA sectional drawing of FIG. 20A. 本発明の第5の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 5th modification of this invention. 本発明の実施形態に係る部分的にテーパした第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which taper according to embodiment of this invention. 本発明の実施形態に係るテーパ部の側面が曲面である第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin whose side surface of the taper part which concerns on embodiment of this invention is a curved surface. 本発明の実施形態に係る第1の導体ピンの鍔部の側面が階段状になっている一例を示す図である。It is a figure which shows an example in which the side surface of the collar part of the 1st conductor pin which concerns on embodiment of this invention is step shape. 本発明の実施形態に係る第1の導体ピンの側面が凹凸面からなる交線部の一例を示す図である。It is a figure which shows an example of the intersection part from which the side surface of the 1st conductor pin which concerns on embodiment of this invention consists of an uneven surface. 本発明の第3の変形例に係る第1の導体ピンの変形例について、鋭角な交線部を有する第2の導体ピンの一例を示す図である。It is a figure which shows an example of the 2nd conductor pin which has an acute angle intersection part about the modification of the 1st conductor pin which concerns on the 3rd modification of this invention. 本発明の第3の変形例に係る第1の導体ピンの変形例について、鈍角な交線部を有する第2の導体ピンの一例を示す図である。It is a figure which shows an example of the 2nd conductor pin which has an obtuse angle | intersection part about the modification of the 1st conductor pin which concerns on the 3rd modification of this invention. 本発明の第3の変形例に係る第1の導体ピンの変形例について、実装端近傍に、曲面からなる上り坂を有する第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which has the uphill which consists of a curved surface in the vicinity of a mounting end about the modification of the 1st conductor pin which concerns on the 3rd modification of this invention. 本発明の第4の変形例に係る第1の導体ピンが角形の窪み(凹部)を有する一例を示す図である。It is a figure which shows an example in which the 1st conductor pin which concerns on the 4th modification of this invention has a square hollow (recessed part). 本発明の第4の変形例に係る第1の導体ピンの周方向に沿って、異なる形状を有する複数の窪みが形成される一例を示す図である。It is a figure which shows an example in which the several hollow which has a different shape is formed along the circumferential direction of the 1st conductor pin which concerns on the 4th modification of this invention. 本発明の第5の変形例に係る第1の導体ピンが角形の突起(凸部)を有する一例を示す図である。It is a figure which shows an example in which the 1st conductor pin which concerns on the 5th modification of this invention has a square-shaped protrusion (convex part). 本発明の第5の変形例に係る第1の導体ピンの周方向に沿って、異なる形状を有する複数の突起が形成される一例を示す図である。It is a figure which shows an example in which several protrusion which has a different shape is formed along the circumferential direction of the 1st conductor pin which concerns on the 5th modification of this invention. 本発明の実施形態に係る、周方向に沿って、窪み(凹部)及び突起(凸部)を有する第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which has a hollow (concave part) and protrusion (convex part) along the circumferential direction based on embodiment of this invention. 本発明の実施形態に係る、実装端近傍に複数の鍔部を有する第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which has a some collar part near the mounting end based on embodiment of this invention. 本発明の実施形態に係る、実装端近傍に階段状の段差を有する第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which has a step-shaped level | step difference in the mounting end vicinity based on embodiment of this invention. 本発明の実施形態に係る、テーパ部と鍔部との両方を有する第1の導体ピンの第1の例を示す図である。It is a figure which shows the 1st example of the 1st conductor pin which has both a taper part and a collar part based on embodiment of this invention. 本発明の実施形態に係る、テーパ部と鍔部との両方を有する第1の導体ピンの第2の例を示す図である。It is a figure which shows the 2nd example of the 1st conductor pin which has both a taper part and a collar part based on embodiment of this invention. 本発明の実施形態に係る、被覆材(金属膜)により部分的に覆われた第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin partially covered with the coating | covering material (metal film) based on embodiment of this invention. 本発明の実施形態に係る、交線部のみが被覆材(金属膜)で覆われた第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which covered only the intersection part based on embodiment of this invention with the coating | covering material (metal film). 本発明の実施形態に係る、被覆材(金属膜)で覆われていない第1の導体ピンの一例を示す図である。It is a figure which shows an example of the 1st conductor pin which is not covered with the coating | covering material (metal film) based on embodiment of this invention. 本発明の実施形態に係る、鍔部を有さない第1の導体ピンの第1の例を示す図である。It is a figure which shows the 1st example of the 1st conductor pin which does not have a collar part based on embodiment of this invention. 本発明の実施形態に係る、鍔部を有さない第1の導体ピンの第2の例を示す図である。It is a figure which shows the 2nd example of the 1st conductor pin which does not have a collar part based on embodiment of this invention. 本発明の実施形態に係る、曲がった第1の導体ピンの一例を示す図である。It is a figure which shows an example of the bent 1st conductor pin based on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の形状の別例としての正四角形を示す図である。It is a figure which shows the regular tetragon as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の形状の別例としての正六角形を示す図である。It is a figure which shows the regular hexagon as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の形状の別例としての正八角形を示す図である。It is a figure which shows the regular octagon as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の横断面の形状の別例としての楕円を示す図である。It is a figure which shows the ellipse as another example of the shape of the cross section of the cross section of the conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の形状の別例としての十字形を示す図である。It is a figure which shows the cross shape as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の形状の別例としての正多角星形を示す図である。It is a figure which shows the regular polygon star as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention. 本発明の実施形態に係る導体ピンの横断面の形状の別例としての花弁形を示す図である。It is a figure which shows the petal shape as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention. 実装用基板の全ての導体ピンとして、本発明の実施形態に係る導体ピンを適用した一例を示す図である。It is a figure which shows an example which applied the conductor pin which concerns on embodiment of this invention as all the conductor pins of the board | substrate for mounting. 本発明の実施形態に係る導体ピンと支持基板とが連続的に形成された実装用基板の一例を示す図である。It is a figure which shows an example of the board | substrate for mounting in which the conductor pin and support substrate which concern on embodiment of this invention were formed continuously. 本発明の実施形態に係る導体ピンを、複数の支持基板を有する電子デバイスに適用した一例を示す図である。It is a figure which shows an example which applied the conductor pin which concerns on embodiment of this invention to the electronic device which has a some support substrate. 本発明の実施形態に係る導体ピンを有し、配線板を有さない電子デバイスの一例を示す図である。It is a figure which shows an example of the electronic device which has a conductor pin which concerns on embodiment of this invention, and does not have a wiring board.

特許文献1に記載されるような従来のピンボンディングの接続信頼性に関して、ピンボンディングとワイヤボンディングとを比較して説明する。   The connection reliability of conventional pin bonding as described in Patent Document 1 will be described by comparing pin bonding and wire bonding.

ワイヤボンディングでは、電子部品の電極が、ワイヤ(例えばアルミニウム等からなる金属線)と直接接続(溶接)される。ワイヤは柔軟性があるため、例えばパッケージを構成する各材料の熱膨張率差に起因してパッケージに歪み(熱歪み)が生じても、ワイヤは断線しにくい。   In wire bonding, an electrode of an electronic component is directly connected (welded) to a wire (for example, a metal wire made of aluminum or the like). Since the wire is flexible, for example, even if the package is distorted (thermal strain) due to the difference in thermal expansion coefficient between the materials constituting the package, the wire is not easily broken.

これに対し、ピンボンディングでは、電子部品の電極が、半田を介して、導体ピンと電気的に接続される。ワイヤに比べて導体ピンは硬いため、こうした構造では、温度上昇に伴って導体ピンと電子部品との接続部分にかかる熱応力が大きくなると考えられる。このため導体ピンと電子部品との接続部分の半田に亀裂が入り易くなり、接続信頼性が低下し易くなる。   On the other hand, in pin bonding, an electrode of an electronic component is electrically connected to a conductor pin via solder. Since the conductor pin is harder than the wire, in such a structure, it is considered that the thermal stress applied to the connection portion between the conductor pin and the electronic component increases as the temperature rises. For this reason, the solder at the connection portion between the conductor pin and the electronic component is easily cracked, and the connection reliability is easily lowered.

本発明は、実装用基板の導体ピンと、これに実装される電子部品との接続信頼性を高めることができる。   The present invention can improve the connection reliability between a conductor pin of a mounting board and an electronic component mounted thereon.

以下、本発明の実施形態について説明する。なお、図中、矢印Z1、Z2は、それぞれ支持基板の主面(表裏面)の法線方向、すなわち支持基板の厚み方向を指す。一方、矢印X1、X2及びY1、Y2は、それぞれ支持基板の厚み方向に直交する方向(支持基板の主面に平行な方向)を指す。支持基板の主面は、X−Y平面となる。また、支持基板の側面は、X−Z平面又はY−Z平面となる。   Hereinafter, embodiments of the present invention will be described. In the figure, arrows Z1 and Z2 respectively indicate the normal direction of the main surface (front and back surfaces) of the support substrate, that is, the thickness direction of the support substrate. On the other hand, arrows X1, X2 and Y1, Y2 indicate directions perpendicular to the thickness direction of the support substrate (directions parallel to the main surface of the support substrate). The main surface of the support substrate is an XY plane. The side surface of the support substrate is an XZ plane or a YZ plane.

導体ピンに関しては、導体ピンの一端から他端にかけて、各断面(横断面)の重心(断面が円であればその円の中心)を通る線を軸とする。軸に直交する断面(例えばX−Y平面)を、横断面という。また、軸に平行な断面(例えばX−Z平面又はY−Z平面)を、縦断面という。本実施形態では、軸が、導体ピンの長手方向の直線になる。導体ピンの長手方向は、挿入方向(例えばZ方向)に相当する。ただし、軸は必ずしも直線であるとは限らない(例えば図34中の3つの直線から構成される軸を参照)。   With respect to the conductor pin, the axis passing through the center of gravity (or the center of the circle if the section is a circle) from one end to the other end of the conductor pin is used as the axis. A cross section perpendicular to the axis (for example, an XY plane) is referred to as a transverse cross section. A section parallel to the axis (for example, an XZ plane or a YZ plane) is referred to as a longitudinal section. In this embodiment, the axis is a straight line in the longitudinal direction of the conductor pin. The longitudinal direction of the conductor pin corresponds to the insertion direction (for example, the Z direction). However, the axis is not necessarily a straight line (see, for example, an axis composed of three straight lines in FIG. 34).

周方向とは、横断面の輪郭に沿った方向を意味し(図4B中の方向C1参照)、横断面の輪郭が円以外の場合にも同様である。径方向とは、横断面の輪郭の任意の一点から軸に向かう方向を意味し(図4B中の方向C2参照)、横断面の輪郭が円以外の場合にも同様である。径方向のうち、導体ピンの軸から離れる側を外側といい、導体ピンの軸に近づく側を内側という。また、軸に平行であることをストレートという。   The circumferential direction means a direction along the outline of the cross section (see direction C1 in FIG. 4B), and the same applies when the outline of the cross section is other than a circle. The radial direction means a direction from an arbitrary point of the outline of the cross section toward the axis (see direction C2 in FIG. 4B), and the same applies to the case where the outline of the cross section is other than a circle. Of the radial direction, the side away from the conductor pin axis is referred to as the outer side, and the side closer to the conductor pin axis is referred to as the inner side. Also, being parallel to the axis is called straight.

「挿入」には、孔径に比して十分細い部材を孔に差し込むことのほか、部材を孔に嵌入又は螺入することなども含まれる。   “Insertion” includes not only inserting a member sufficiently thin compared to the hole diameter into the hole but also inserting or screwing the member into the hole.

「接続」には、継ぎ目がある場合のほか、継ぎ目がない場合も含まれる。継ぎ目がある場合とは、例えば別々に形成された2つの物体が接着剤等で接合されている場合をいう。継ぎ目がない場合とは、例えば2つの部分が連続的(一体的)に形成され、それらの間に何も介在しない場合をいう。   “Connection” includes not only a case where there is a seam but also a case where there is no seam. The case where there is a seam means, for example, a case where two separately formed objects are joined with an adhesive or the like. The case where there is no seam means, for example, a case where two parts are formed continuously (integrally) and nothing is interposed between them.

めっきには、電解めっき等の湿式めっきのほか、PVD(Physical Vapor Deposition)又はCVD(Chemical Vapor Deposition)等の乾式めっきも含まれる。   In addition to wet plating such as electrolytic plating, the plating includes dry plating such as PVD (Physical Vapor Deposition) or CVD (Chemical Vapor Deposition).

孔又は柱体(突起)の「幅」は、特に指定がなければ、円の場合には直径を意味し、円以外の場合には√(4×断面積/π)を意味する。   Unless otherwise specified, the “width” of a hole or a column (projection) means a diameter in the case of a circle and means √ (4 × cross-sectional area / π) otherwise.

本明細書中、導体ピンとは、特にことわりがない限り、第1の導体ピンのことを指すが、さらに第2の導体ピンに適用しても良い。   In this specification, unless otherwise specified, the conductor pin refers to the first conductor pin, but may be applied to the second conductor pin.

図1は、本発明の実施形態に係る電子デバイス、及びそれを構成する実装用基板を示す平面図であり、図2は、本発明の実施形態に係る電子デバイス、及びそれを構成する実装用基板を示す断面図である。   FIG. 1 is a plan view showing an electronic device according to an embodiment of the present invention and a mounting substrate constituting the electronic device, and FIG. 2 is an electronic device according to an embodiment of the present invention and for mounting constituting the electronic device. It is sectional drawing which shows a board | substrate.

本実施形態の電子デバイス100は、図1及び図2に示すように、実装用基板100aと、配線板1000と、電子部品である半導体チップ201及び202と、を有する。   As shown in FIGS. 1 and 2, the electronic device 100 of this embodiment includes a mounting substrate 100 a, a wiring board 1000, and semiconductor chips 201 and 202 that are electronic components.

本実施形態の実装用基板は、第1の導体ピンと第2の導体ピンと支持基板とを有し、第1の導体ピンと第2の導体ピンの一端側に支持基板が接続され、第1の導体ピンと第2の導体ピンの他端側に電子部品を電気的に接続することができる実装用基板であって、少なくとも第1の導体ピンは、側面が少なくとも他端側の第1の側面と一端側の第2の側面とで構成され、第1の側面と第2とが側面の交線部で、外側に膨らむように構成されている。   The mounting board of the present embodiment has a first conductor pin, a second conductor pin, and a support board, and the support board is connected to one end side of the first conductor pin and the second conductor pin, and the first conductor A mounting substrate capable of electrically connecting an electronic component to the other end side of the pin and the second conductor pin, wherein at least the first conductor pin has at least a first side surface and one end of the other end side. It is comprised by the 2nd side surface of a side, and the 1st side surface and 2nd are comprised so that it may bulge outside at the intersection part of a side surface.

本実施形態の電子デバイスは、本実施形態の実装用基板と、第1の導体ピンの他端側と、第2の導体ピンの他端側と、に半田を介して電気的に接続された電子部品と、を有する。   The electronic device of the present embodiment is electrically connected to the mounting substrate of the present embodiment, the other end side of the first conductor pin, and the other end side of the second conductor pin via solder. And an electronic component.

実装用基板100aは、支持基板2000と、導体ピン群101〜103と、から構成される。支持基板2000は、導体ピン群101〜103の各導体ピンの一端側(Z2側)に接続されている。各導体ピンの他端側(Z1側)には、配線板1000のパッド及び半導体チップ201、202の電極が電気的に接続されている。   The mounting substrate 100a includes a support substrate 2000 and conductor pin groups 101 to 103. The support substrate 2000 is connected to one end side (Z2 side) of each conductor pin of the conductor pin groups 101 to 103. The pads of the wiring board 1000 and the electrodes of the semiconductor chips 201 and 202 are electrically connected to the other end side (Z1 side) of each conductor pin.

本実施形態では、配線板1000が、銅配線を有するプリント配線板である。具体的には、配線板1000は、例えばセラミック基板と、その上に形成された導体層(銅配線)と、から構成される。ただしこれに限定されず、配線板1000は多層配線板であってもよく、配線の材料は銅以外の導体であってもよい。また、配線板1000に代えて、金属板を用いてもよい。半導体チップ201及び202はそれぞれ、FET(Field Effect Transistor)等のトランジスタのようなディスクリート半導体のほか、これらと組み合わせたダーリントントランジスタICなどであってもよい。   In the present embodiment, the wiring board 1000 is a printed wiring board having copper wiring. Specifically, the wiring board 1000 is composed of, for example, a ceramic substrate and a conductor layer (copper wiring) formed thereon. However, the wiring board 1000 may be a multilayer wiring board, and the wiring material may be a conductor other than copper. Further, instead of the wiring board 1000, a metal plate may be used. Each of the semiconductor chips 201 and 202 may be a discrete semiconductor such as a transistor such as a FET (Field Effect Transistor), or a Darlington transistor IC combined with these.

支持基板2000のZ1側の主面は第1面F11であり、支持基板2000のZ2側の主面は第2面F12である。支持基板2000は、第1絶縁層2001と、第2絶縁層2002と、第3絶縁層2003と、から構成される。ここで、第1絶縁層2001は例えば熱可塑性ポリイミドからなり、第2絶縁層2002は例えば熱硬化性ポリイミドからなり、第3絶縁層2003は例えば熱可塑性ポリイミドからなる。ただしこれらに限定されず、支持基板2000の材料は任意である。例えば支持基板2000は、金属板又は樹脂基板であってもよい。   The main surface on the Z1 side of the support substrate 2000 is the first surface F11, and the main surface on the Z2 side of the support substrate 2000 is the second surface F12. The support substrate 2000 includes a first insulating layer 2001, a second insulating layer 2002, and a third insulating layer 2003. Here, the first insulating layer 2001 is made of, for example, thermoplastic polyimide, the second insulating layer 2002 is made of, for example, thermosetting polyimide, and the third insulating layer 2003 is made of, for example, thermoplastic polyimide. However, the material of the support substrate 2000 is not limited to these and is arbitrary. For example, the support substrate 2000 may be a metal plate or a resin substrate.

支持基板2000には、複数(導体ピンに対応した数)の孔2000aが形成されている。孔2000aは、例えばスルーホール(貫通孔)であり、支持基板2000の主面に対して垂直に形成される。導体ピン群101〜103の各導体ピンの一端側(挿入部)は、孔2000aに挿入(例えば嵌入)される。導体ピン群101〜103の各導体ピンの他端側(実装部)は、支持基板2000の第1面F11に対して垂直に突出する。なお、孔2000aの内面に導体膜が形成されていてもよい。また、孔2000aは有底孔であってもよい。有底孔とは、底のある孔のことをいう。   The support substrate 2000 is formed with a plurality of holes 2000a (number corresponding to the conductor pins). The hole 2000 a is, for example, a through hole (through hole), and is formed perpendicular to the main surface of the support substrate 2000. One end side (insertion portion) of each conductor pin of the conductor pin groups 101 to 103 is inserted (for example, inserted) into the hole 2000a. The other end side (mounting portion) of each conductor pin of the conductor pin groups 101 to 103 protrudes perpendicularly to the first surface F11 of the support substrate 2000. A conductor film may be formed on the inner surface of the hole 2000a. The hole 2000a may be a bottomed hole. A bottomed hole means a hole with a bottom.

導体ピン群101、103は、それぞれ1種類の導体ピン101a、103aから構成され、導体ピン群102は、2種類の導体ピン10(第1の導体ピン)及び導体ピン20(第2の導体ピン)から構成される。   The conductor pin groups 101 and 103 are each composed of one kind of conductor pins 101a and 103a, and the conductor pin group 102 is composed of two kinds of conductor pins 10 (first conductor pins) and conductor pins 20 (second conductor pins). ).

本実施形態の第1の導体ピンは、複数で構成された第1の導体ピン群を構成し、第1の導体ピン群は長さが揃っている。   The first conductor pins of the present embodiment constitute a plurality of first conductor pin groups, and the first conductor pin groups have the same length.

本実施形態の第2の導体ピンは、複数で構成された第2の導体ピン群を構成し、第2の導体ピン群は長さが揃っている。   The second conductor pins of the present embodiment constitute a plurality of second conductor pin groups, and the second conductor pin groups have the same length.

本実施形態の第1の導体ピン群は、第1の導体ピンの太さが揃っている。   In the first conductor pin group of the present embodiment, the thickness of the first conductor pin is uniform.

本実施形態の第2の導体ピン群は、第2の導体ピンの太さが揃っている。   In the second conductor pin group of the present embodiment, the thickness of the second conductor pin is uniform.

導体ピン101a、103a、20は、例えば電力系のパッド又は電極(例えばトランジスタのコレクタ電極又はエミッタ電極)に接続される。一方、導体ピン10は、信号系の電極(例えばトランジスタのベース電極又はゲート電極)に接続される。導体ピン群(101a、10、20、103a)ごと、導体ピンの長さが揃っている。導体ピンの長さが揃っているとは、長さが略同一のことをいう。これにより、導体ピンの先端と、電力系のパッド又は電極との間隔が均等になるのでリフローで形成されるハンダのフィレットは類似の形状となり易い。このため、ハンダのフィレット形状のばらつきが小さくなり、導体ピンの先端とパッド又は電極との接続信頼性を高めることができる。   The conductor pins 101a, 103a, and 20 are connected to, for example, a power system pad or electrode (for example, a collector electrode or an emitter electrode of a transistor). On the other hand, the conductor pin 10 is connected to a signal system electrode (for example, a base electrode or a gate electrode of a transistor). The lengths of the conductor pins are aligned for each conductor pin group (101a, 10, 20, 103a). That the lengths of the conductor pins are the same means that the lengths are substantially the same. Thereby, since the space | interval of the front-end | tip of a conductor pin and an electric power system pad or electrode becomes equal, the fillet of the solder formed by reflow tends to become a similar shape. For this reason, the dispersion | variation in the fillet shape of solder becomes small, and the connection reliability of the front-end | tip of a conductor pin and a pad or an electrode can be improved.

また、導体ピン群(101a、10、20、103a)ごと、導体ピンの太さも揃っている。導体ピンの太さが揃っているとは、太さが略同一のことをいう。このため、ハンダのフィレット形状のばらつきが小さくなり、形成されるハンダのフィレットは同一の導体ピン群内では類似の形状となり易く、導体ピンの先端とパッド又は電極との接続信頼性を高めることができる。   Moreover, the thickness of a conductor pin is also uniform for every conductor pin group (101a, 10, 20, 103a). That the thickness of the conductor pin is uniform means that the thickness is substantially the same. For this reason, the variation of the solder fillet shape is reduced, and the formed solder fillet is likely to have a similar shape within the same conductor pin group, thereby improving the connection reliability between the tip of the conductor pin and the pad or electrode. it can.

導体ピン101aは、半田1000aを介して、配線板1000のパッドと電気的に接続される。導体ピン10、20はそれぞれ、半田201aを介して、半導体チップ201の電極と電気的に接続される。導体ピン103aは、半田202aを介して、半導体チップ202の電極と電気的に接続される。半田1000a、201a、202aの材料としては、例えば錫又は錫合金などを用いることができる。   The conductor pin 101a is electrically connected to the pad of the wiring board 1000 through the solder 1000a. Each of the conductor pins 10 and 20 is electrically connected to the electrode of the semiconductor chip 201 via the solder 201a. The conductor pin 103a is electrically connected to the electrode of the semiconductor chip 202 via the solder 202a. As a material of the solder 1000a, 201a, 202a, for example, tin or a tin alloy can be used.

図2中、導体ピン101aと配線板1000との距離は、距離d1であり、導体ピン10、20と半導体チップ201との距離はそれぞれ、距離d20、d2であり、導体ピン103aと半導体チップ202との距離は、距離d3である。本実施形態では、導体ピン群101〜103が、互いに異なる長さの導体ピンを有する。詳しくは、本実施形態において、半導体チップ201、202は、互いに異なる高さを有する。このため、支持基板2000から、配線板1000、半導体チップ201、202までの距離は、互いに異なる。本実施形態では、導体ピン群101〜103の導体ピンの長さが、この距離の違いに対応しており、距離d1、d20、d2、d3が、互いに同等となっている。これにより、半田1000a、201a、202aによる接続層の厚さが均一になるため、リフロー時にいずれの箇所も同様に溶融するので形成されるフィレットは類似の形状となる。このため、ハンダのフィレット形状のばらつきが小さくなり、導体ピンの先端とパッド又は電極との接続信頼性を高めることができる。また、半田1000a、201a、202aの量も均一にすることができるため、半田の量の調整が不要となり、製造工程が簡素になる。距離d1、d20、d2、d3はそれぞれ、例えば10〜50μmの範囲が好ましい。   In FIG. 2, the distance between the conductor pin 101a and the wiring board 1000 is the distance d1, the distance between the conductor pins 10 and 20 and the semiconductor chip 201 is the distance d20 and d2, respectively, and the conductor pin 103a and the semiconductor chip 202. Is a distance d3. In the present embodiment, the conductor pin groups 101 to 103 have conductor pins having different lengths. Specifically, in the present embodiment, the semiconductor chips 201 and 202 have different heights. For this reason, the distances from the support substrate 2000 to the wiring board 1000 and the semiconductor chips 201 and 202 are different from each other. In this embodiment, the lengths of the conductor pins of the conductor pin groups 101 to 103 correspond to this difference in distance, and the distances d1, d20, d2, and d3 are equal to each other. As a result, the thickness of the connection layer made of the solder 1000a, 201a, 202a becomes uniform, so that any portion is similarly melted at the time of reflow, so that the formed fillet has a similar shape. For this reason, the dispersion | variation in the fillet shape of solder becomes small, and the connection reliability of the front-end | tip of a conductor pin and a pad or an electrode can be improved. Further, since the amounts of the solders 1000a, 201a, and 202a can be made uniform, it is not necessary to adjust the amount of solder, and the manufacturing process is simplified. The distances d1, d20, d2, and d3 are each preferably in the range of 10 to 50 μm, for example.

本実施形態では、導体ピン群101〜103が、互いに異なる長さの導体ピンを有することで、支持基板2000と、配線板1000のパッドあるいは半導体チップ201、202との距離にかかわらず、距離d1、d20、d2、d3を均一にすることができる。こうした構造では、支持基板2000と、配線板1000のパッドあるいは半導体チップ201、202との距離に違いがあっても接続できる。そのため、導体ピンの先端の高さを揃えるための導体のスペーサー等を必要としないので、部品点数を減らし、製造工程数が増加しない。   In the present embodiment, since the conductor pin groups 101 to 103 have conductor pins having different lengths, the distance d1 regardless of the distance between the support substrate 2000 and the pads of the wiring board 1000 or the semiconductor chips 201 and 202. , D20, d2, and d3 can be made uniform. In such a structure, connection is possible even if the distance between the support substrate 2000 and the pads of the wiring board 1000 or the semiconductor chips 201 and 202 is different. Therefore, a conductor spacer or the like for aligning the height of the tip of the conductor pin is not required, so the number of parts is reduced and the number of manufacturing steps is not increased.

図3A及び図3Bに、第2の導体ピン20を示し、図4A及び図4Bに、第1の導体ピン10を示す。図3Aは、本発明の実施形態に係る実装用基板に用いられる第2の導体ピンを示す図であり、図3Bは、図3Aに示す第2の導体ピンを挿入端側から見た図である。   3A and 3B show the second conductor pin 20, and FIGS. 4A and 4B show the first conductor pin 10. FIG. FIG. 3A is a diagram illustrating a second conductor pin used in the mounting substrate according to the embodiment of the present invention, and FIG. 3B is a diagram of the second conductor pin illustrated in FIG. 3A as viewed from the insertion end side. is there.

図4Aは、本発明の実施形態に係る実装用基板に用いられる第1の導体ピンを示す図であり、図4Bは、図4Aに示す第1の導体ピンを挿入端側から見た図である。図3B及び図4B中の方向C1は周方向に相当し、図3B及び図4B中の方向C2は径方向に相当する。なお、本実施形態において、導体ピン101a、103aの構造は、寸法以外は、導体ピン20と同じである。   4A is a diagram showing a first conductor pin used in the mounting board according to the embodiment of the present invention, and FIG. 4B is a diagram of the first conductor pin shown in FIG. 4A as viewed from the insertion end side. is there. The direction C1 in FIGS. 3B and 4B corresponds to the circumferential direction, and the direction C2 in FIGS. 3B and 4B corresponds to the radial direction. In the present embodiment, the structure of the conductor pins 101a and 103a is the same as that of the conductor pin 20 except for the dimensions.

導体ピン20は、図3A及び図3Bに示されるように、実装部21と、鍔部22と、挿入部23と、から構成される。導体ピン20の一端は挿入端F2であり、導体ピン20の他端は実装端F1である。導体ピン20は、挿入端F2側から孔2000aに挿入され、実装端F1側で半導体チップ201の電極と接続される。導体ピン20は、円柱状の導体である。実装部21及び挿入部23の形状は、円柱(ストレート形状)である。鍔部22の形状は、円板である。導体ピン20は、例えば銅又は銅合金からなる。上記円板は、実装部及び挿入部の円柱よりも外部に形成されている円柱部分のことをいう。   As shown in FIGS. 3A and 3B, the conductor pin 20 includes a mounting portion 21, a flange portion 22, and an insertion portion 23. One end of the conductor pin 20 is an insertion end F2, and the other end of the conductor pin 20 is a mounting end F1. The conductor pin 20 is inserted into the hole 2000a from the insertion end F2 side, and is connected to the electrode of the semiconductor chip 201 on the mounting end F1 side. The conductor pin 20 is a cylindrical conductor. The shape of the mounting part 21 and the insertion part 23 is a cylinder (straight shape). The shape of the collar part 22 is a disk. The conductor pin 20 is made of, for example, copper or a copper alloy. The said disc means the cylindrical part currently formed rather than the cylinder of the mounting part and the insertion part.

例えば実装部21、鍔部22、挿入部23は、それぞれ直径d121、d122、d123を有する。例えば実装部21の直径d121と挿入部23の直径d123とは、同一である。鍔部22の直径d122は、直径d121、d123の各々よりも大きい。鍔部22の側面は、実装部21及び挿入部23の側面に対して径方向(外側)に突出する。このため、導体ピン20を孔2000aに挿入する際に、鍔部22はストッパとして機能する。すなわち、鍔部22により過剰な挿入が防止される。孔2000aには挿入部23が挿入され、実装部21及び鍔部22は、支持基板2000の第1面F11から突出する。直径d121は、例えば0.25〜0.6mmの範囲にあり、直径d122は、例えば0.6〜1.0mmの範囲にあり、直径d123は、例えば0.25〜0.6mmの範囲にある。   For example, the mounting part 21, the flange part 22, and the insertion part 23 have diameters d121, d122, and d123, respectively. For example, the diameter d121 of the mounting portion 21 and the diameter d123 of the insertion portion 23 are the same. The diameter d122 of the collar portion 22 is larger than each of the diameters d121 and d123. The side surface of the flange portion 22 projects in the radial direction (outside) with respect to the side surfaces of the mounting portion 21 and the insertion portion 23. For this reason, when inserting the conductor pin 20 in the hole 2000a, the collar part 22 functions as a stopper. That is, excessive insertion is prevented by the collar portion 22. The insertion portion 23 is inserted into the hole 2000a, and the mounting portion 21 and the flange portion 22 protrude from the first surface F11 of the support substrate 2000. The diameter d121 is in the range of 0.25 to 0.6 mm, for example, the diameter d122 is in the range of 0.6 to 1.0 mm, and the diameter d123 is in the range of 0.25 to 0.6 mm, for example. .

第1の導体ピン10は、図4A及び図4Bに示されるように、実装部11と、鍔部12と、挿入部13と、から構成される。そして、第1の導体ピン10の表面には、被覆材10aが形成されている。被覆材10aは、第1の導体ピン10全体を覆っている。   As shown in FIGS. 4A and 4B, the first conductor pin 10 includes a mounting portion 11, a flange portion 12, and an insertion portion 13. A covering material 10 a is formed on the surface of the first conductor pin 10. The covering material 10 a covers the entire first conductor pin 10.

第1導体ピン10の一端は挿入端F2であり、第1の導体ピン10の他端は実装端F1である。第1の導体ピン10は、挿入端F2側から孔2000aに挿入され、実装端F1側で半導体チップ201の電極と接続される。第1の導体ピン10は、円柱状の導体である。挿入部13の形状は、円柱(ストレート形状)である。鍔部12の形状は、円柱(ストレート形状)であり、鍔部12の大きさは実装部11及び挿入部13よりも大きい。そして、本実施形態では、実装部11が、実装端F1近傍(実装部11)で、実装端F1に向かうほど細くなるようにテーパ形状をしている。図4A中、長さd114、d115、d116はそれぞれ、実装部11、鍔部12、挿入部13の長さである。例えば長さd114は0.8〜3.0mmの範囲にあり、長さd115は0.1〜0.6mmの範囲にあり、長さd116は0.4〜2.0mmの範囲にある。   One end of the first conductor pin 10 is an insertion end F2, and the other end of the first conductor pin 10 is a mounting end F1. The first conductor pin 10 is inserted into the hole 2000a from the insertion end F2 side, and is connected to the electrode of the semiconductor chip 201 on the mounting end F1 side. The first conductor pin 10 is a cylindrical conductor. The shape of the insertion part 13 is a cylinder (straight shape). The shape of the flange portion 12 is a column (straight shape), and the size of the flange portion 12 is larger than that of the mounting portion 11 and the insertion portion 13. In the present embodiment, the mounting portion 11 is tapered in the vicinity of the mounting end F1 (mounting portion 11) so as to become thinner toward the mounting end F1. In FIG. 4A, lengths d114, d115, and d116 are the lengths of the mounting portion 11, the flange portion 12, and the insertion portion 13, respectively. For example, the length d114 is in the range of 0.8 to 3.0 mm, the length d115 is in the range of 0.1 to 0.6 mm, and the length d116 is in the range of 0.4 to 2.0 mm.

実装部11(ストレート部P12)、鍔部12、挿入部13は、それぞれ直径d111、d112、d113を有する。鍔部12の直径d112は、直径d111、d113の各々よりも大きい。鍔部12の側面は、実装部11及び挿入部13の側面に対して径方向(外側)に突出する。このため、導体ピン10を孔2000aに挿入する際に、鍔部12はストッパとして機能する。すなわち、鍔部12により過剰な挿入が防止される。孔2000aには挿入部13が挿入され、実装部11及び鍔部12は、支持基板2000の第1面F11から突出する。実装部11の直径d111は、0.25〜0.6mmの範囲にあることが好ましい。挿入部13の直径d113は、例えば直径d111と同一である。鍔部12の直径d113は、例えば0.6〜1.0mmである。   The mounting part 11 (straight part P12), the collar part 12, and the insertion part 13 have diameters d111, d112, and d113, respectively. The diameter d112 of the collar portion 12 is larger than each of the diameters d111 and d113. The side surface of the flange portion 12 protrudes in the radial direction (outside) with respect to the side surfaces of the mounting portion 11 and the insertion portion 13. For this reason, when inserting the conductor pin 10 in the hole 2000a, the collar part 12 functions as a stopper. That is, excessive insertion is prevented by the collar portion 12. The insertion portion 13 is inserted into the hole 2000a, and the mounting portion 11 and the flange portion 12 protrude from the first surface F11 of the support substrate 2000. The diameter d111 of the mounting portion 11 is preferably in the range of 0.25 to 0.6 mm. The diameter d113 of the insertion portion 13 is the same as the diameter d111, for example. The diameter d113 of the collar portion 12 is, for example, 0.6 to 1.0 mm.

第1の導体ピン10は、実装端F1近傍の側面F3に、交線部P1を有する。交線部P1は、第1の導体ピン10の外周を周回する。第1の導体ピン10は、側面F3が他端(実装端F1)側の第1の側面F31と一端(挿入端F2)側の第2の側面F32とで構成される。第1の側面F31と第2の側面F32とは、交線部P1で外側に膨らむように接続されている。また、第1の導体ピン10(詳しくは実装部11)は、実装端F1近傍に、実装端F1側から挿入端F2側に向かうほど導体ピン10の軸Cから遠ざかる側面(第1の側面F31)を有するテーパ部P11(上り坂部:テーパー状に形成されている第1の側面)と、第1の導体ピン10の軸Cに平行な側面(第2の側面F32)を有するストレート部P12と、を有する。本実施形態の交線部P1は、実装端F1側から挿入端F2側に向かって、側面F3の傾斜が、第1の導体ピン10の軸Cに対して外側(軸Cから離れる側)への傾斜(テーパ部P11)から、より内側(軸Cに近づく側)への傾斜(ストレート部P12)へと変わる部分である。交線部P1は、テーパ部P11とストレート部P12との境に位置し、テーパ部P11、交線部P1、及びストレート部P12は、実装端F1側から挿入端F2側に向かってこの順で、連続的に形成されている。交線部P1は、テーパの開始位置に形成される。   The first conductor pin 10 has an intersection part P1 on a side surface F3 in the vicinity of the mounting end F1. The intersection line portion P1 goes around the outer periphery of the first conductor pin 10. The first conductor pin 10 includes a first side surface F31 on the side of the other end (mounting end F1) and a second side surface F32 on the side of one end (insertion end F2). The first side face F31 and the second side face F32 are connected so as to swell outward at the intersection line portion P1. In addition, the first conductor pin 10 (specifically, the mounting portion 11) is a side surface (first side surface F31) that moves away from the axis C of the conductor pin 10 toward the insertion end F2 side from the mounting end F1 side in the vicinity of the mounting end F1. ) Having a taper portion P11 (uphill portion: first side surface formed in a tapered shape), and a straight portion P12 having a side surface (second side surface F32) parallel to the axis C of the first conductor pin 10; Have. In the intersection line portion P1 of the present embodiment, the inclination of the side surface F3 is outward from the axis C of the first conductor pin 10 (the side away from the axis C) from the mounting end F1 side to the insertion end F2 side. It is a part which changes from the inclination (taper part P11) to the inclination (straight part P12) to the inner side (side approaching the axis C). The intersection line portion P1 is located at the boundary between the taper portion P11 and the straight portion P12, and the taper portion P11, the intersection line portion P1, and the straight portion P12 are arranged in this order from the mounting end F1 side to the insertion end F2 side. Is formed continuously. The intersection line portion P1 is formed at the taper start position.

図5Aは、本発明の実施形態に係る実装用基板に用いられる第1の導体ピンの実装端近傍を示す図であり、図5Bは、図5Aに示す第1の導体ピンを実装端側から見た図であり、図5Cは第1の導体ピンと電子部品との接続部を示す断面図である。   FIG. 5A is a diagram showing the vicinity of the mounting end of the first conductor pin used in the mounting substrate according to the embodiment of the present invention, and FIG. 5B shows the first conductor pin shown in FIG. 5A from the mounting end side. FIG. 5C is a cross-sectional view showing a connection portion between the first conductor pin and the electronic component.

図6Aは、本発明の実施形態に係る第1の導体ピンの形状の詳細を示す図であり、図6Bは交線部周辺を覆う被覆材を示す図である。図7Aは比較例に係るストレートピンと電子部品との接続部を示す図であり、図7Bは比較例に係る半田の這い上がりを説明するための図である。   FIG. 6A is a diagram illustrating details of the shape of the first conductor pin according to the embodiment of the present invention, and FIG. 6B is a diagram illustrating a covering material that covers the periphery of the intersection line portion. FIG. 7A is a diagram illustrating a connection portion between a straight pin and an electronic component according to a comparative example, and FIG. 7B is a diagram for explaining solder creeping up according to the comparative example.

図8Aは、比較例に係るストレートピンについて、半田這い上がりの説明図であり、図8Bは、本発明の実施形態に係る第1の導体ピンについて、半田這い上がりの説明図である。   FIG. 8A is an explanatory diagram of solder scooping up for a straight pin according to a comparative example, and FIG. 8B is an explanatory diagram of solder scooping up for a first conductor pin according to an embodiment of the present invention.

図9は、比較例に係るストレートピンと本発明の実施形態に係る第1の導体ピンとの各々について、半田這い上がりを示すグラフである。   FIG. 9 is a graph showing the solder creep-up for each of the straight pin according to the comparative example and the first conductor pin according to the embodiment of the present invention.

図5A及び図5Bに、導体ピン10の実装端F1近傍を拡大して示す。図5A中、距離d11は、実装端F1(他端側端面)と交線部P1との距離である。距離d11は、0.2mmの範囲にあることが好ましい。すなわち、交線部P1は、第1の導体ピン10の他端側端面から第1の導体ピン10の軸方向に0.2mmまでの範囲にあることが好ましい。交線部P1がこうした範囲にあれば、後述する半田の這い上がりを抑制し易くなる。   5A and 5B show the vicinity of the mounting end F1 of the conductor pin 10 in an enlarged manner. In FIG. 5A, the distance d11 is a distance between the mounting end F1 (the other end side end surface) and the intersection line portion P1. The distance d11 is preferably in the range of 0.2 mm. That is, the intersecting line portion P <b> 1 is preferably in a range from the other end side end surface of the first conductor pin 10 to 0.2 mm in the axial direction of the first conductor pin 10. If the intersecting line portion P1 is in such a range, it becomes easy to suppress the solder creeping described later.

第1の導体ピン10は、半田201aを介して、半導体チップ201の電極と電気的に接続される。図5Cに、第1の導体ピン10と半導体チップ201との接続部を示す。半田201aは、第1の導体ピン10と半導体チップ201との間に接続層S201を形成するとともに、接続層S201の周囲にフィレットS202を形成する。   The first conductor pin 10 is electrically connected to the electrode of the semiconductor chip 201 through the solder 201a. FIG. 5C shows a connection portion between the first conductor pin 10 and the semiconductor chip 201. The solder 201a forms a connection layer S201 between the first conductor pin 10 and the semiconductor chip 201, and forms a fillet S202 around the connection layer S201.

図6Aに、本発明の実施形態に係る第1の導体ピン10の形状の詳細を示す。本実施形態では、テーパ部P11の側面が斜面(軸Cに対して傾いた平面)になっている。角度θ10は、テーパ部P11の側面の軸Cに対する角度である。すなわち、角度θ10は、導体ピン10の軸C(中心軸)を含む平面において、第1の側面F31と軸Cとのなす角度に相当する。テーパの母線と軸C(中心軸)との角度とも定義できる。角度θ10は、5〜20°の範囲にあることが好ましい。また、交線部P1において第1の側面F31と第2の側面F32とのなす角度θ1は、89〜170°の範囲にあることが好ましい。角度θ10又はθ1がこうした範囲にあれば、必要な導電性を確保しながら、後述する半田の這い上がりを抑制する効果が得られ易くなる。なお、導体ピン10の形状は、図4A〜図6Aに示した形状に限られない(後述の図16A〜図31Bなどに示す形状でもよい)。   FIG. 6A shows details of the shape of the first conductor pin 10 according to the embodiment of the present invention. In the present embodiment, the side surface of the tapered portion P11 is a slope (a plane inclined with respect to the axis C). The angle θ10 is an angle with respect to the axis C of the side surface of the tapered portion P11. That is, the angle θ10 corresponds to an angle formed by the first side face F31 and the axis C on a plane including the axis C (center axis) of the conductor pin 10. It can also be defined as the angle between the tapered generatrix and the axis C (center axis). The angle θ10 is preferably in the range of 5 to 20 °. Moreover, it is preferable that angle (theta) 1 which 1st side surface F31 and 2nd side surface F32 make in the intersection part P1 exists in the range of 89-170 degrees. If the angle θ10 or θ1 is in such a range, it is easy to obtain the effect of suppressing the solder creeping described later while ensuring the necessary conductivity. The shape of the conductor pin 10 is not limited to the shape shown in FIGS. 4A to 6A (the shape shown in FIGS. 16A to 31B described later may be used).

第1の導体ピン10は、例えば銅又は銅合金からなる。被覆材10aは、例えばニッケルからなる。ただしこれに限られず、被覆材10aの材料は任意である。ただし、被覆材10aの材料は、第1の導体ピン10の材料よりも、半田201aに対して濡れ性が低い導体(例えば金属)であることが好ましい。半田に対して濡れ性が低いとは、半田との接触角が大きいことを示す。例えば第1の導体ピン10の材料が銅又は銅合金である場合は、被覆材10aの材料がクロム又は亜鉛などであることが好ましい。第1の導体ピン10表面(厳密に言えば被覆材10a)の半田201aに対する濡れ性を低く(接触角を大きく)することで、半田201aが少し這い上がることによって第1の導体ピン10の表面(被覆材10a)において半田201aと第1の導体ピン10表面とのなす角が、接触角に到達し易くなる。その結果、半田201aの過度の這い上がりを抑制し十分な肉厚のある良好なフィレットを形成することができる(後述の図9参照)。   The first conductor pin 10 is made of, for example, copper or a copper alloy. The covering material 10a is made of nickel, for example. However, it is not restricted to this, The material of the coating | covering material 10a is arbitrary. However, the material of the covering material 10a is preferably a conductor (for example, metal) having lower wettability with respect to the solder 201a than the material of the first conductor pin 10. Low wettability to solder indicates that the contact angle with the solder is large. For example, when the material of the 1st conductor pin 10 is copper or a copper alloy, it is preferable that the material of the coating | covering material 10a is chromium or zinc. By reducing the wettability of the surface of the first conductor pin 10 (strictly speaking, the covering material 10a) to the solder 201a (increasing the contact angle), the surface of the first conductor pin 10 is slightly crawled up. In (covering material 10a), the angle formed by the solder 201a and the surface of the first conductor pin 10 easily reaches the contact angle. As a result, it is possible to suppress an excessive creeping of the solder 201a and to form a good fillet having a sufficient thickness (see FIG. 9 described later).

被覆材10aの、交線部P1を覆う部分は、図6Bに示すように、部分的に厚くなっている。被覆材10aが薄くて交線部P1において下地の導体ピン10(例えば銅)が露出すると、交線部P1において半田201aの接触角が小さくなるため、半田201aの這い上がりを抑制しにくくなる。この点、本実施形態では、被覆材10aの、交線部P1を覆う部分が、部分的に厚くなっているため、交線部P1において下地の導体ピン10が露出しにくくなる。非交線部における被覆材10aの膜厚d10は、例えば3〜20μmの範囲にある。   The portion of the covering material 10a that covers the intersection line portion P1 is partially thick as shown in FIG. 6B. When the covering material 10a is thin and the underlying conductor pin 10 (for example, copper) is exposed at the intersecting line portion P1, the contact angle of the solder 201a becomes small at the intersecting line portion P1, so that it is difficult to suppress the creeping up of the solder 201a. In this regard, in the present embodiment, since the portion of the covering material 10a that covers the intersection line portion P1 is partially thick, the underlying conductor pin 10 is difficult to be exposed at the intersection line portion P1. The film thickness d10 of the covering material 10a at the non-intersecting part is in the range of 3 to 20 μm, for example.

被覆材10aは、電解めっき膜であることが好ましい。交線部P1には電流が集中し易いため、被覆材10aが電解めっき膜であれば、交線部P1における膜厚d12を大きくすることが容易になり(図6B参照)、交線部P1を周囲よりも厚くすることが可能になる。また、例えば、電解メッキ膜を形成後に、均等にエッチング(ソフトエッチング)をすることにより、第1の導体ピン10の交線部P1のみを覆うような被覆材10aの形成も容易になる(後述の図32B参照)。   The covering material 10a is preferably an electrolytic plating film. Since current tends to concentrate on the intersection line P1, if the covering material 10a is an electrolytic plating film, it becomes easy to increase the film thickness d12 in the intersection line P1 (see FIG. 6B). Can be made thicker than the surroundings. Further, for example, by performing uniform etching (soft etching) after forming the electrolytic plating film, it is easy to form the covering material 10a that covers only the intersection line P1 of the first conductor pin 10 (described later). FIG. 32B).

本実施形態では、第1及び第2の導体ピンの挿入端(挿入端F2等)が、露出している。詳しくは、第1及び第2の導体ピンの挿入端が、例えば支持基板2000の第2面F12と一致する。しかしこれに限られず、第1又は第2の導体ピンが支持基板2000を突き抜けてもよいし、第1又は第2の導体ピンの挿入端が支持基板2000の第2面F12に届かなくてもよい。   In the present embodiment, the insertion ends (insertion end F2 and the like) of the first and second conductor pins are exposed. Specifically, the insertion ends of the first and second conductor pins coincide with the second surface F12 of the support substrate 2000, for example. However, the present invention is not limited to this, and the first or second conductor pin may penetrate the support substrate 2000, or the insertion end of the first or second conductor pin may not reach the second surface F12 of the support substrate 2000. Good.

第1又は第2の導体ピン(導体ピン10等)の材料は、銅又は銅合金に限られず、任意である。導体ピンの材料は、例えばアルミニウム、銀、もしくは金等を主成分とする金属、又はその合金であってもよい。第1又は第2の導体ピン(導体ピン10等)の横断面の形状は、円に限られず、任意である(後述の図35A〜図36Cなどであってもよい)。   The material of the first or second conductor pin (conductor pin 10 or the like) is not limited to copper or a copper alloy, and is arbitrary. The material of the conductor pin may be, for example, a metal whose main component is aluminum, silver, or gold, or an alloy thereof. The shape of the cross section of the first or second conductor pin (conductor pin 10 or the like) is not limited to a circle, but is arbitrary (may be described later with reference to FIGS. 35A to 36C).

第1又は第2の導体ピン(導体ピン10等)の寸法も任意である。例えば第2の導体ピンは、流れる電流が大きいものほど、太くすることが好ましい。本実施形態では、信号系の第1の導体ピン10を、電力系の第2の導体ピン20よりも細くしているため、半導体素子の電力系の第2の導体ピン20の断面積の比率を大きくすることができる。このため、第2の導体ピンを太くすることにより、電力系導体ピンからのジュール熱による発熱を小さくすることができる。   The size of the first or second conductor pin (conductor pin 10 or the like) is also arbitrary. For example, the second conductor pin is preferably made thicker as the flowing current is larger. In this embodiment, since the first conductor pin 10 of the signal system is made thinner than the second conductor pin 20 of the power system, the ratio of the cross-sectional area of the second conductor pin 20 of the power system of the semiconductor element Can be increased. For this reason, by making the second conductor pin thick, heat generation due to Joule heat from the power system conductor pin can be reduced.

本実施形態の実装用基板100aによれば、第1の導体ピン10と半導体チップ201との接続部における半田201aの這い上がりを抑制することができる。以下、比較例を用いて、このことについて詳述する。比較例では、交線部P1を有する第1の導体ピン10に代えて、ストレート形状の実装部を有する導体ピン(ストレートピン)を用いる。   According to the mounting substrate 100a of the present embodiment, it is possible to suppress creeping of the solder 201a at the connection portion between the first conductor pin 10 and the semiconductor chip 201. Hereinafter, this will be described in detail using a comparative example. In a comparative example, it replaces with the 1st conductor pin 10 which has the intersection part P1, and uses the conductor pin (straight pin) which has a straight-shaped mounting part.

図7Aは、比較例に係るストレートピンと電子部品との接続部を示す図であり、図7Bは、比較例に係る半田の這い上がりを説明するための図である。図8Aは、比較例に係るストレートピンについて、半田這い上がりの説明図であり、図8Bは、本発明の実施形態に係る第1の導体ピンについて、半田這い上がりの説明図である。   FIG. 7A is a diagram illustrating a connection portion between a straight pin and an electronic component according to a comparative example, and FIG. 7B is a diagram for explaining solder creeping up according to the comparative example. FIG. 8A is an explanatory diagram of solder scooping up for a straight pin according to a comparative example, and FIG. 8B is an explanatory diagram of solder scooping up for a first conductor pin according to an embodiment of the present invention.

図7Aに、比較例に係る導体ピン500と半導体チップ201との接続部を示す。導体ピンと半導体との接続が理想的な場合には、図7Aに示すように、十分な大きさのフィレットS202が形成され、十分な接続強度が得られると考えられる。しかし、半田201aの這い上がりが生じると、図7Bに示すように、フィレットS202が小さくなり易い。この場合、図7B中、半田201aの下端部Dに応力が集中し易くなり、半田201aに亀裂等が生じ易くなる。そのため、導体ピン500と半導体チップ201との接続信頼性が低下し易くなると考えられる。   FIG. 7A shows a connection portion between the conductor pin 500 and the semiconductor chip 201 according to the comparative example. When the connection between the conductor pin and the semiconductor is ideal, as shown in FIG. 7A, it is considered that a sufficiently large fillet S202 is formed and sufficient connection strength can be obtained. However, when the solder 201a creeps up, the fillet S202 tends to be small as shown in FIG. 7B. In this case, in FIG. 7B, stress tends to concentrate on the lower end portion D of the solder 201a, and cracks or the like are likely to occur in the solder 201a. Therefore, it is considered that the connection reliability between the conductor pin 500 and the semiconductor chip 201 is likely to be lowered.

比較例に係る導体ピン500では、図8Aに示すように、半田201aの溶融過程で、位置h0に半田201aの上端がある。このとき、半田201aと導体ピンのテーパ部P21とのなす角はθ21であり、導体ピン500と半田201aとの接触角より大きい。さらに時間が経過すると位置h2に半田201aの上端が上昇することにより、導体ピン500と半田201aとのなす角度θ22が導体ピン500と半田201aとの接触角に到達し、這い上がりが止まる。導体ピン500と半田201aとのなす角度は、導体ピンと500と半導体チップ201との接続が良好な場合には角度θ21であるが、さらに半田201aに這い上がりが発生し、導体ピンと500と半導体チップ201との接続が不十分な時はθ21よりも小さい角度θ22になる。このため、半田の上端の高さを制御しにくく、フィレット形状が悪くなり、半田フィレットに応力が集中し易くなり、半田に亀裂等が生じ易くなる。そのため、導体ピン500と半導体チップとの接続信頼性が低下し易くなると考えられる。   In the conductor pin 500 according to the comparative example, as shown in FIG. 8A, the solder 201a has an upper end at a position h0 in the melting process of the solder 201a. At this time, the angle formed between the solder 201a and the taper portion P21 of the conductor pin is θ21, which is larger than the contact angle between the conductor pin 500 and the solder 201a. When the time further elapses, the upper end of the solder 201a rises to the position h2, whereby the angle θ22 formed between the conductor pin 500 and the solder 201a reaches the contact angle between the conductor pin 500 and the solder 201a, and the scooping up stops. The angle formed between the conductor pin 500 and the solder 201a is the angle θ21 when the connection between the conductor pin 500 and the semiconductor chip 201 is good, but further creeping occurs in the solder 201a. When the connection with 201 is insufficient, the angle θ22 is smaller than θ21. For this reason, it is difficult to control the height of the upper end of the solder, the fillet shape is deteriorated, the stress is easily concentrated on the solder fillet, and the solder is likely to be cracked. Therefore, it is considered that the connection reliability between the conductor pin 500 and the semiconductor chip is likely to decrease.

一方、本実施形態に係る第1の導体ピン10では、図8Bに示すように、半田201aの溶融過程で、位置h0に半田201aの上端がある。このとき、半田201aと第1の導体ピンのテーパ部P11とのなす角はθ11であり、第1の導体ピン10と半田201aとの接触角より大きい。さらに時間が経過すると、半田201aの上端が上昇する。位置h1に半田201aの上端がきて、第1の導体ピンのストレート部P12と半田201aとのなす角θ12が第1の導体ピン10と半田201aとの接触角よりも小さい場合、這い上がりが止まる。この場合、半田201aは、半田のリフローを十分に行っても半田の上端の高さはh1よりも上昇することがなく、半田フィレットが薄くなりにくいので、フィレット形状が良好となる。半田フィレットに部分的な応力集中が起こりにくくなり、半田に亀裂等が生じにくくなる。そのため、第1の導体ピン10と半導体チップとの接続信頼性が得られ易くなると考えられる。   On the other hand, in the first conductor pin 10 according to the present embodiment, as shown in FIG. 8B, the upper end of the solder 201a is at a position h0 in the melting process of the solder 201a. At this time, the angle formed by the solder 201a and the taper portion P11 of the first conductor pin is θ11, which is larger than the contact angle between the first conductor pin 10 and the solder 201a. As time further elapses, the upper end of the solder 201a rises. When the upper end of the solder 201a comes to the position h1 and the angle θ12 formed by the straight portion P12 of the first conductor pin and the solder 201a is smaller than the contact angle between the first conductor pin 10 and the solder 201a, the scooping up stops. . In this case, the solder 201a has a good fillet shape because the height of the upper end of the solder does not rise above h1 even if the solder is sufficiently reflowed, and the solder fillet is difficult to be thinned. It is difficult for partial stress concentration to occur in the solder fillet, and cracks and the like are less likely to occur in the solder. Therefore, it is considered that the connection reliability between the first conductor pin 10 and the semiconductor chip can be easily obtained.

本実施形態に係る第1の導体ピン10と比較例に係る導体ピン500とを比較すると、導体ピン500よりも第1の導体ピン10の方が、半田201aの這い上がり量が小さくすることができると考えられる。以下、図9を参照して、このことについて説明する。   When the first conductor pin 10 according to the present embodiment and the conductor pin 500 according to the comparative example are compared, the first conductor pin 10 may have a smaller amount of solder 201a than the conductor pin 500. It is considered possible. Hereinafter, this will be described with reference to FIG.

図9は、比較例に係るストレートピンと本発明の実施形態に係る第1の導体ピンとの各々について、半田這い上がりを示すグラフである。   FIG. 9 is a graph showing the solder creep-up for each of the straight pin according to the comparative example and the first conductor pin according to the embodiment of the present invention.

図9に示すように、半田201aの這い上がりが進行するほど、すなわち半田201aの上端が高くなるほど、本実施形態の第1の導体ピン10又は比較例の導体ピン500と半田201aとのなす角度は小さくなっていき、接触角θ0(θ22)に到達すると、半田201aの這い上がりが止まると考えられる。   As shown in FIG. 9, the angle formed between the first conductor pin 10 of the present embodiment or the conductor pin 500 of the comparative example and the solder 201a as the solder 201a creeps up, that is, as the upper end of the solder 201a becomes higher. It is considered that when the contact angle θ0 (θ22) is reached, the creeping of the solder 201a stops.

例えば比較例の導体ピン500では、図9のグラフ中に線L2で示されるように、半田201aの這い上がりが進行し、導体ピン500と半田201aの上端の高さが高くなるにつれて、導体ピン500と半田201aとのなす角度が徐々に小さくなり、やがてその角度が接触角θ22に到達すると、半田201aの這い上がりが止まると考えられる。これに対し、本実施形態の第1の導体ピン10では、図9のグラフ中に線L1で示されるように、半田201aの上端が交線部P1に到達するまでは比較例の場合と同様に接触角が小さくなるが、半田201aの上端が交線部P1に到達すると、すなわち半田201aの上端の高さが位置h1になると、第1の導体ピン10と半田201aとのなす角度が急激に小さくなる。これにより、その角度が接触角θ0以下になるので、半田201aの這い上がりが止まる。このように、本実施形態の第1の導体ピン10では、交線部P1を有するので、半田201aの這い上がりが止まり易くなる。このため、本実施形態の第1の導体ピン10によれば、交線部P1の位置により、半導体チップ201実装時における半田201aの上端の位置をコントロールし易くなると考えられる。   For example, in the conductor pin 500 of the comparative example, as shown by the line L2 in the graph of FIG. 9, as the solder 201a scoops up and the height of the upper ends of the conductor pin 500 and the solder 201a increases, the conductor pin 500 increases. It is considered that when the angle formed by 500 and the solder 201a gradually decreases and eventually reaches the contact angle θ22, the creeping of the solder 201a stops. On the other hand, in the first conductor pin 10 of the present embodiment, as shown by the line L1 in the graph of FIG. 9, the same as in the comparative example until the upper end of the solder 201a reaches the intersection line portion P1. However, when the upper end of the solder 201a reaches the intersection part P1, that is, when the height of the upper end of the solder 201a reaches the position h1, the angle formed between the first conductor pin 10 and the solder 201a is abrupt. Becomes smaller. As a result, the angle becomes equal to or smaller than the contact angle θ0, and the creeping of the solder 201a stops. As described above, the first conductor pin 10 of the present embodiment has the intersecting line portion P1, so that the creeping of the solder 201a is easily stopped. For this reason, according to the first conductor pin 10 of the present embodiment, it is considered that the position of the upper end of the solder 201a when the semiconductor chip 201 is mounted can be easily controlled by the position of the intersection line portion P1.

また、本実施形態では、図6A及び図6Bに示すように、第1の導体ピン10の交線部P1の周辺が被覆材10aに覆われる。交線部の周辺とは、例えば交線部から0.1mm以内の範囲のことをいう。被覆材10aは半田201aに対して濡れ性が低い(接触角が大きい)材料からなるため、交線部P1における半田201aの接触角θ0は大きくなる。このため、交線部P1において、半田201aの這い上がりが止まり易くなる。また、本実施形態では、被覆材10aの、交線部P1を覆う部分が、部分的に厚くなり交線部P1を完全に覆っているため、交線部P1において下地の第1の導体ピン10が露出しにくい。また、被覆材10aの厚みを薄くするあるいは電解メッキで被覆材10aを形成した後に、全体を薄くエッチングすることにより、テーパ部P11及びストレート部P12で下地を露出させてもよい。   Moreover, in this embodiment, as shown to FIG. 6A and 6B, the periphery of the intersection part P1 of the 1st conductor pin 10 is covered with the coating | covering material 10a. The periphery of the intersection line means, for example, a range within 0.1 mm from the intersection line. Since the covering material 10a is made of a material that has low wettability with respect to the solder 201a (a large contact angle), the contact angle θ0 of the solder 201a at the intersection P1 is large. For this reason, the creeping of the solder 201a is likely to stop at the intersection line portion P1. Moreover, in this embodiment, since the part which covers the intersection part P1 of the coating | covering material 10a becomes thick partially, and covers the intersection part P1, the 1st conductor pin of the foundation | substrate in the intersection part P1 10 is difficult to be exposed. Alternatively, the base material may be exposed at the taper portion P11 and the straight portion P12 by reducing the thickness of the covering material 10a or forming the covering material 10a by electrolytic plating and then etching the whole thinly.

なお、第1の導体ピン10と半田201aとの接触角θ0は、第1の導体ピン10表面の状態(酸化など)、又は第1の導体ピン10と半田201aとの結晶構造の類似性などによって決まる定数である。半田の材料としては、錫又は錫合金などが用いられる。銅もしくは金、又はそれらの合金は、上記半田材料に対して濡れ性が高く、ニッケル、クロム、又は亜鉛は、上記半田材料に対して濡れ性が低い材料である。このため、第1の導体ピン10の材料として、銅もしくは金、又はそれらの合金を用いる場合には、第1の導体ピン10の交線部P1を、ニッケル、クロム、又は亜鉛からなる被覆材10aで覆うことが好ましい。これにより、第1の導体ピン10の表面(被覆材10a)において半田201aの接触角θ0が大きくなる。その結果、図9で説明したように、半田201aの這い上がりを抑制し易くなる。   Note that the contact angle θ0 between the first conductor pin 10 and the solder 201a is the state of the surface of the first conductor pin 10 (oxidation or the like), the similarity of the crystal structure between the first conductor pin 10 and the solder 201a, or the like. It is a constant determined by. As the solder material, tin or tin alloy is used. Copper, gold, or an alloy thereof has high wettability with respect to the solder material, and nickel, chromium, or zinc is a material with low wettability with respect to the solder material. Therefore, when copper, gold, or an alloy thereof is used as the material of the first conductor pin 10, the intersecting portion P1 of the first conductor pin 10 is coated with nickel, chromium, or zinc. It is preferable to cover with 10a. As a result, the contact angle θ0 of the solder 201a increases on the surface of the first conductor pin 10 (covering material 10a). As a result, as described with reference to FIG. 9, it is easy to suppress the creeping of the solder 201a.

以上説明したように、本実施形態の実装用基板100aによれば、第1の導体ピン10と半導体チップ201との接続部における半田201aの這い上がりを抑制することができる。本実施形態では、半田の這い上がりを抑制するために第1の導体ピン10の実装端F1近傍をテーパさせ、第1の導体ピン10の実装端F1近傍を細く成形した。これにより、交線部P1が形成され、半田201aの這い上がりが抑制されることは前述したとおりである。こうした構造では、実装端F1近傍をテーパさせることで、交線部P1が容易に得られる。ただしこれに限られず、第1の導体ピン10の実装端F1近傍を細くしないで、交線部P1を得るようにしてもよい(後述の図16A〜図17C等に示す形状にしてもよい)。   As described above, according to the mounting substrate 100a of the present embodiment, the solder 201a can be prevented from creeping up at the connection portion between the first conductor pin 10 and the semiconductor chip 201. In this embodiment, the vicinity of the mounting end F <b> 1 of the first conductor pin 10 is tapered and the vicinity of the mounting end F <b> 1 of the first conductor pin 10 is thinly formed in order to prevent the solder from creeping up. As described above, the intersection line portion P1 is thereby formed and the creeping of the solder 201a is suppressed. In such a structure, the intersection line portion P1 can be easily obtained by tapering the vicinity of the mounting end F1. However, the present invention is not limited to this, and the intersecting line portion P1 may be obtained without thinning the vicinity of the mounting end F1 of the first conductor pin 10 (the shape may be shown in FIGS. 16A to 17C described later). .

また、半田201aの這い上がりが抑制されることで、半田201aの這い上がりに起因して半田201aのフィレットS202が薄くなることも抑制される。その結果、半田フィレット形状が良好となり、半田201aにおける応力が集中しにくくなり、半田に亀裂等が生じにくくなる。そのため、第1の導体ピン10と半導体チップ201との接続信頼性が向上すると考えられる。   Further, by suppressing the creeping of the solder 201a, it is possible to suppress the fillet S202 of the solder 201a from being thinned due to the creeping of the solder 201a. As a result, the solder fillet shape is improved, the stress in the solder 201a is less likely to concentrate, and the solder is less likely to crack. Therefore, it is considered that the connection reliability between the first conductor pin 10 and the semiconductor chip 201 is improved.

本実施形態の実装用基板100aでは、導体ピン群101〜103の中で、第1の細い導体ピン10(信号系の導体ピン)のみを、図4Aに示すような、交線部P1を有する形状にしている。細い導体ピンでは半田201aの上端が上昇したとき、フィレットS202が薄くなり易いので、半田フィレット形状が悪くなり、半田に亀裂等が生じ易くなる。そのため、接続層S202の端に応力集中が起き易くなり、第1の細い導体ピンと半導体チップとの接続信頼性が低下する。   In the mounting substrate 100a of the present embodiment, only the first thin conductor pin 10 (signal system conductor pin) among the conductor pin groups 101 to 103 has the intersection portion P1 as shown in FIG. 4A. It is in shape. With a thin conductor pin, when the upper end of the solder 201a rises, the fillet S202 tends to be thin, so that the solder fillet shape is deteriorated, and the solder is likely to be cracked. Therefore, stress concentration tends to occur at the end of the connection layer S202, and the connection reliability between the first thin conductor pin and the semiconductor chip decreases.

本実施形態の電子デバイス100は、例えば図10A〜図15に示すような方法で製造される。   The electronic device 100 of this embodiment is manufactured by a method as shown in FIGS. 10A to 15, for example.

図10Aは、本発明の実施形態に係る実装用基板の製造方法について、支持基板を準備する工程を説明するための図であり、図10B本発明の実施形態に係る実装用基板の製造方法について、支持基板に孔を形成する工程を説明するための図である。   FIG. 10A is a diagram for explaining a step of preparing a support substrate in the method for manufacturing a mounting substrate according to the embodiment of the present invention, and FIG. 10B shows the method for manufacturing the mounting substrate according to the embodiment of the present invention. It is a figure for demonstrating the process of forming a hole in a support substrate.

図11Aは、本発明の実施形態に係る実装用基板の製造方法について、先端近傍に、軸に平行なストレート側面を有する導体ピンを準備する工程を説明するための図であり、図11Bは、図11Aに示す導体ピンをプレス加工する工程を説明するための図であり、図11Cは、図11Bのプレス加工により形成された、先端側に交線部を有する導体ピンを示す図である。   FIG. 11A is a diagram for explaining a step of preparing a conductor pin having a straight side surface parallel to an axis near the tip in the manufacturing method of the mounting substrate according to the embodiment of the present invention. FIG. 11C is a diagram for explaining a process of pressing the conductor pin shown in FIG. 11A, and FIG. 11C is a diagram showing the conductor pin having an intersection portion on the tip side formed by the pressing process of FIG. 11B.

図12は、本発明の実施形態に係る第1の導体ピンを形成する第2の方法を説明するための図である。   FIG. 12 is a view for explaining a second method of forming the first conductor pin according to the embodiment of the present invention.

図13Aは、本発明の実施形態に係る実装用基板の製造方法について、支持基板の孔に導体ピンを挿入する工程を説明するための図であり、図13Bは、本発明の実施形態に係る完成した実装用基板を示す図である。   FIG. 13A is a diagram for explaining a process of inserting a conductor pin into a hole of a support substrate in a method for manufacturing a mounting board according to an embodiment of the present invention, and FIG. 13B relates to the embodiment of the present invention. It is a figure which shows the completed mounting board | substrate.

図14は、本発明の実施形態に係る実装用基板の製造方法について、基板上に電子部品を設置する工程を説明するための図である。   FIG. 14 is a diagram for explaining a process of installing an electronic component on a substrate in the mounting substrate manufacturing method according to the embodiment of the present invention.

図15は、本発明の実施形態に係る実装用基板の製造方法について、実装用基板の導体ピンに電子部品を実装する工程を説明するための図である。   FIG. 15 is a diagram for explaining a process of mounting an electronic component on a conductor pin of a mounting board in the mounting board manufacturing method according to the embodiment of the present invention.

電子デバイス100の製造に際しては、まず、実装用基板100aを製造するとともに、配線板1000に半導体チップ201及び202を実装する。   In manufacturing the electronic device 100, first, the mounting substrate 100 a is manufactured, and the semiconductor chips 201 and 202 are mounted on the wiring board 1000.

実装用基板100aの製造に際しては、まず、図10Aに示すように、支持基板2000を準備する。支持基板2000は、例えば厚さ3μmの熱可塑性ポリイミドからなる第1絶縁層2001と、例えば厚さ50μmの熱硬化性ポリイミドからなる第2絶縁層2002と、例えば厚さ3μmの熱硬化性ポリイミドからなる第3絶縁層2003と、を積層し、その状態で、プレス又は熱処理等により、これらを接着することで、製造する。   In manufacturing the mounting substrate 100a, first, as shown in FIG. 10A, a support substrate 2000 is prepared. The support substrate 2000 is made of, for example, a first insulating layer 2001 made of thermoplastic polyimide having a thickness of 3 μm, a second insulating layer 2002 made of thermosetting polyimide having a thickness of 50 μm, and a thermosetting polyimide having a thickness of 3 μm, for example. The third insulating layer 2003 is stacked, and in this state, these are bonded by pressing or heat treatment.

続けて、図10Bに示すように、支持基板2000に孔2000aを形成する。孔2000aは、導体ピン群101〜103の各導体ピンの取付位置に形成する。孔2000aは、例えばドリル又はレーザにより形成することができる。   Subsequently, as shown in FIG. 10B, holes 2000 a are formed in the support substrate 2000. The holes 2000a are formed at the attachment positions of the respective conductor pins of the conductor pin groups 101 to 103. The hole 2000a can be formed by, for example, a drill or a laser.

また、導体ピン群101〜103の各導体ピンを製造する。以下、導体ピン10の製造方法について詳述する。   Moreover, each conductor pin of the conductor pin groups 101-103 is manufactured. Hereinafter, the manufacturing method of the conductor pin 10 is explained in full detail.

第1の導体ピン10の製造に際しては、まず、例えば図11Aに示すように、導体ピン30を準備する。導体ピン30は、実装部11aと、鍔部12と、挿入部13と、を有する。実装部11aは、テーパ加工する前の実装部11に相当し、ストレート形状を有する。すなわち、導体ピン30は、実装端F1(先端)近傍に、軸Cに平行なストレート側面F30を有する。導体ピン30の製造方法は、任意である。例えばストレート形状の導体を、金型等で変形させたり(例えば絞り成形)、又は加工機等で切削したりすることによって、導体ピン30を製造することができる。あるいは、鋳造によって、導体ピン30を製造してもよい。また、実装部11a、鍔部12、及び挿入部13の少なくとも1つを他のものと分離した状態で形成した後、溶接又は導電性接着材料等により、それらを接合することによって、導体ピン30を製造してもよい。導電性接着材料としては、例えば錫等の半田、銀ロウ等のロウ材、又は導電性ペーストなどを用いることができる。   In manufacturing the first conductor pin 10, first, as shown in FIG. 11A, for example, a conductor pin 30 is prepared. The conductor pin 30 includes a mounting portion 11a, a flange portion 12, and an insertion portion 13. The mounting part 11a corresponds to the mounting part 11 before taper processing, and has a straight shape. That is, the conductor pin 30 has a straight side surface F30 parallel to the axis C in the vicinity of the mounting end F1 (tip). The manufacturing method of the conductor pin 30 is arbitrary. For example, the conductor pin 30 can be manufactured by deforming a straight-shaped conductor with a mold or the like (for example, drawing) or cutting with a processing machine or the like. Alternatively, the conductor pin 30 may be manufactured by casting. In addition, after forming at least one of the mounting portion 11a, the flange portion 12, and the insertion portion 13 in a state separated from the others, the conductor pins 30 are joined by welding or conductive adhesive material or the like. May be manufactured. As the conductive adhesive material, for example, solder such as tin, brazing material such as silver solder, or conductive paste can be used.

続けて、例えば図11Bに示すように、実装部11(特にテーパ部P11)に対応した形状を有する金型3001を準備し、金型3001により導体ピン30をプレス加工する。詳しくは、ストレート側面F30を金型3001でプレス加工することによりストレート側面F30の実装端F1(先端)側をテーパさせる。これにより、導体ピン30の実装部11aがテーパ形状になり、図11Cに示すように、交線部P1を有する第1の導体ピン10が完成する。第1の導体ピン10は、図4A及び図4Bに示すような先端がテーパの形状を有する。こうしたプレス加工によれば、テーパ部P11とストレート部P12とは、連続的(一体的)に形成される。ただしこれに限られず、例えば図12に示すように、導体ピン30とは別に、テーパ部P11に対応した円錐台形状を有する導体30aを製造し、溶接又は導電性接着材料等により、導体ピン30と導体30aとを接合してもよい。こうした方法によっても、実装端F1(実装部11)に、テーパ部P11と、ストレート部P12と、を有する第1の導体ピン10を製造することができる。   Subsequently, for example, as illustrated in FIG. 11B, a mold 3001 having a shape corresponding to the mounting portion 11 (particularly, the tapered portion P11) is prepared, and the conductor pins 30 are pressed by the mold 3001. Specifically, the straight side F30 is pressed with a mold 3001 to taper the mounting end F1 (tip) side of the straight side F30. As a result, the mounting portion 11a of the conductor pin 30 has a tapered shape, and the first conductor pin 10 having the intersection portion P1 is completed as shown in FIG. 11C. The first conductor pin 10 has a tapered tip as shown in FIGS. 4A and 4B. According to such pressing, the taper portion P11 and the straight portion P12 are formed continuously (integrally). However, the present invention is not limited to this. For example, as shown in FIG. 12, a conductor 30a having a truncated cone shape corresponding to the tapered portion P11 is manufactured separately from the conductor pin 30, and the conductor pin 30 is formed by welding or a conductive adhesive material. And the conductor 30a may be joined. Also by such a method, the 1st conductor pin 10 which has the taper part P11 and the straight part P12 in the mounting end F1 (mounting part 11) can be manufactured.

第1の導体ピン10の製造方法は、上記方法に限られず任意である。例えば図4A及び図4Bに示すような形状の反転形状を有する金型を用いてプレス加工することにより、棒状の導体から直接、第1の導体ピン10を形成してもよい。また、鋳造によって、第1の導体ピン10を製造してもよい。   The manufacturing method of the 1st conductor pin 10 is not restricted to the said method, but is arbitrary. For example, you may form the 1st conductor pin 10 directly from a rod-shaped conductor by pressing using the metal mold | die which has the reverse shape of a shape as shown to FIG. 4A and 4B. Further, the first conductor pin 10 may be manufactured by casting.

続けて、第1の導体ピン10の表面に被覆材10aを形成する。被覆材10aは、例えばめっきにより形成することができる。具体的には、例えば第1の導体ピン10全体をめっき液に浸漬することで、電解めっき又は無電解めっき等の湿式めっきにより、第1の導体ピン10全体を覆うように、被覆材10aを形成する。ただしこれに限定されず、被覆材10aは、真空蒸着又はスパッタ等の乾式めっきにより形成してもよい。しかし、被覆材10aの、交線部P1を覆う部分を部分的に厚くするためには、電解めっきで被覆材10aを形成することが好ましい。交線部P1に電流が集中し易いため、電解めっきで被覆材10aを形成すると、交線部P1における被覆材10aの膜厚d12を大きくすることが容易になり(図6B参照)、また、第1の導体ピン10の交線部P1を周囲よりも厚く覆い、周囲では下地の導体ピンの一部を露出させるような被覆材10aの形成も容易になる。さらに、交線部P1の周囲で下地の第1の導体ピン10の一部を露出させるために、エッチングをしても良い。エッチングは均等に進行するので、交線部P1で厚く形成された被覆材10aを残し、交線部P1の周囲で被覆材10aを除去することができる。   Subsequently, a covering material 10 a is formed on the surface of the first conductor pin 10. The covering material 10a can be formed by plating, for example. Specifically, for example, by immersing the entire first conductor pin 10 in a plating solution, the covering material 10a is formed so as to cover the entire first conductor pin 10 by wet plating such as electrolytic plating or electroless plating. Form. However, the present invention is not limited to this, and the covering material 10a may be formed by dry plating such as vacuum deposition or sputtering. However, in order to partially thicken the portion of the covering material 10a that covers the intersection portion P1, it is preferable to form the covering material 10a by electrolytic plating. Since current tends to concentrate on the intersecting line portion P1, forming the coating material 10a by electrolytic plating makes it easy to increase the film thickness d12 of the covering material 10a in the intersecting line portion P1 (see FIG. 6B). It is also easy to form the covering material 10a so as to cover the intersecting line portion P1 of the first conductor pin 10 thicker than the periphery and to expose a part of the underlying conductor pin in the periphery. Further, etching may be performed in order to expose a portion of the underlying first conductor pin 10 around the intersection line portion P1. Since the etching proceeds uniformly, it is possible to leave the covering material 10a formed thick at the intersection line portion P1 and to remove the covering material 10a around the intersection line portion P1.

第1の導体ピン10以外の導体ピンは、例えば導体ピン30の製造方法と同様の方法で製造することができる。   Conductive pins other than the first conductive pin 10 can be manufactured by a method similar to the method for manufacturing the conductive pin 30, for example.

続けて、図13Aに示すように、支持基板2000の第1面F11側から、導体ピン群101〜103の各導体ピンを孔2000aに挿入する。各導体ピンは、例えば支持基板2000の第1面F11に対して垂直となる向きで冶具にセットし、そのままの角度で孔2000aに挿入することが好ましい。各導体ピンは、嵌入しても、挿入後に半田等で固定してもよい。さらには、各導体ピンの嵌入後に、その半田固定部分を樹脂等で補強してもよい。   Subsequently, as shown in FIG. 13A, the conductor pins of the conductor pin groups 101 to 103 are inserted into the holes 2000a from the first surface F11 side of the support substrate 2000. Each conductor pin is preferably set in a jig in a direction perpendicular to the first surface F11 of the support substrate 2000, for example, and inserted into the hole 2000a at an angle as it is. Each conductor pin may be fitted or fixed with solder after insertion. Furthermore, the solder fixing portion may be reinforced with resin or the like after the insertion of each conductor pin.

以上の工程により、図13Bに示すように、本発明の実施形態に係る実装用基板100aが完成する。   Through the above steps, the mounting substrate 100a according to the embodiment of the present invention is completed as shown in FIG. 13B.

実装用基板100aを製造する一方で、配線板1000上には、半導体チップ201及び202を実装する。半導体チップ201及び202は、図14に示すように、配線板1000上の、導体ピン群101〜103の位置に対応した位置に実装する。半導体チップ201及び202は、例えば半田等により、配線板1000上に固定する。これにより、配線板1000のパッドと半導体チップ201及び202の電極とが、互いに電気的に接続される。   While the mounting substrate 100 a is manufactured, the semiconductor chips 201 and 202 are mounted on the wiring board 1000. As shown in FIG. 14, the semiconductor chips 201 and 202 are mounted at positions corresponding to the positions of the conductor pin groups 101 to 103 on the wiring board 1000. The semiconductor chips 201 and 202 are fixed on the wiring board 1000 with, for example, solder. Thereby, the pads of the wiring board 1000 and the electrodes of the semiconductor chips 201 and 202 are electrically connected to each other.

続けて、実装用基板100aに、配線板1000、並びに半導体チップ201及び202を実装する。詳しくは、図15に示すように、配線板1000のパッド上、並びに半導体チップ201及び202の電極上にそれぞれ、半田ペースト(半田1000a、201a、202a)を塗布した後、リフロー等の熱処理により半田ペーストを溶融し、導体ピン群101〜103の各導体ピンを半田1000a、201a、202aで接続する。これにより、導体ピン101aは、半田1000aを介して、配線板1000のパッドと電気的に接続され、導体ピン10、20はそれぞれ、半田201aを介して、半導体チップ201の電極と電気的に接続され、導体ピン103aは、半田202aを介して、半導体チップ202の電極と電気的に接続される。   Subsequently, the wiring board 1000 and the semiconductor chips 201 and 202 are mounted on the mounting substrate 100a. Specifically, as shown in FIG. 15, after applying a solder paste (solder 1000a, 201a, 202a) on the pads of the wiring board 1000 and the electrodes of the semiconductor chips 201 and 202, the solder is subjected to heat treatment such as reflow. The paste is melted, and the conductor pins of the conductor pin groups 101 to 103 are connected by solder 1000a, 201a, 202a. As a result, the conductor pin 101a is electrically connected to the pad of the wiring board 1000 via the solder 1000a, and the conductor pins 10 and 20 are electrically connected to the electrodes of the semiconductor chip 201 via the solder 201a. The conductor pin 103a is electrically connected to the electrode of the semiconductor chip 202 via the solder 202a.

以上の工程により、本発明の実施形態に係る電子デバイス100が完成する。   Through the above steps, the electronic device 100 according to the embodiment of the present invention is completed.

本実施形態の製造方法によれば、低コストで、導体ピンと半導体チップとの接続信頼性の高い電子デバイス100が得られる。   According to the manufacturing method of the present embodiment, the electronic device 100 with high connection reliability between the conductor pin and the semiconductor chip can be obtained at low cost.

本発明は、上記実施形態に限定されない。例えば以下のように変形して実施することもできる。   The present invention is not limited to the above embodiment. For example, the present invention can be modified as follows.

例えば第1の導体ピン10の実装部11の形状を、図16A〜図31Bに示すような形状にしてもよい。以下、図4A及び図4Bに示した第1の導体ピン10との相違点を中心に、これらの変形例について説明する。   For example, the shape of the mounting portion 11 of the first conductor pin 10 may be a shape as shown in FIGS. 16A to 31B. Hereinafter, these modifications will be described focusing on differences from the first conductor pin 10 shown in FIGS. 4A and 4B.

本発明の第1の変形例に係る第1の導体ピンを、図16A、16B及び図16Cに示す。図16Aは、本発明の第1の変形例に係る第1の導体ピンの実装端近傍を示す図であり、図16Bは図16Aに示す第1の導体ピンを実装端側から見た図であり、図16Cは、本発明の第1の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。   A first conductor pin according to a first modification of the present invention is shown in FIGS. 16A, 16B and 16C. 16A is a view showing the vicinity of the mounting end of the first conductor pin according to the first modification of the present invention, and FIG. 16B is a view of the first conductor pin shown in FIG. 16A as viewed from the mounting end side. FIG. 16C is a cross-sectional view showing a connection portion between the first conductor pin and the electronic component according to the first modification of the present invention.

この第1の導体ピンは、実装端F1近傍(実装部11)に、実装端F1側から、円柱形状を有する第1実装部P21と、円板形状を有する鍔部P23と、円柱形状を有する第2実装部P22とを、この順で有する。第1実装部P21は鍔部P23の実装端F1側に接続され、第2実装部P22は鍔部P23の挿入端F2(図4A参照)側に接続される。この第1の導体ピンは、鍔部12(図4A参照)とは別に、鍔部P23を有する。鍔部P23の側面は、第1実装部P21及び第2実装部P22の側面に対して径方向(外側)に突出する。鍔部P23の側面は平らではなく、外側へ膨らんでいる。鍔部P23の側面は、他端(実装端F1)側の第1の側面F21と一端(挿入端F2)側の第2の側面F22とで構成され、第1の側面F21と第2の側面F22とは、交線部P2で外側に膨らむように構成されている。交線部P2は、実装端F1側から挿入端F2側に向かって、第1の導体ピンの側面の傾斜が、第1の導体ピンの軸Cに対して外側への傾斜(鍔部P23の側面の上り坂)から、より内側への傾斜(鍔部P23の側面の下り坂)へと変わる部分となる。すなわち、交線部P2は、鍔部P23の膨らんだ側面(曲面)の頂点に形成される。第1の導体ピンは交線部P2で拡幅される。交線部P2は、導体ピンの周方向に沿って形成され、詳しくは導体ピンの全周に連続的に形成される。こうした第1の導体ピンでも、上記本発明の実施形態の第1の導体ピン10と同様、交線部P2により、半田201aの這い上がりが止まり易くなる。図16Cに示すように、半田201aの這い上がりは、特に交線部P2で止まり易いと考えられる。なお、図16A中、距離d21は、実装端F1と交線部P2との距離であり、寸法d22は、鍔部P23の厚みである。距離d21は、0.2〜1.0mmの範囲にあることが好ましい。寸法d22は、0.1〜0.5mmの範囲にあることが好ましい。   This first conductor pin has a first mounting portion P21 having a columnar shape, a flange portion P23 having a disc shape, and a columnar shape in the vicinity of the mounting end F1 (mounting portion 11) from the mounting end F1 side. It has 2nd mounting part P22 in this order. The first mounting portion P21 is connected to the mounting end F1 side of the flange portion P23, and the second mounting portion P22 is connected to the insertion end F2 (see FIG. 4A) side of the flange portion P23. The first conductor pin has a flange portion P23 separately from the flange portion 12 (see FIG. 4A). The side surface of the flange portion P23 projects in the radial direction (outside) with respect to the side surfaces of the first mounting portion P21 and the second mounting portion P22. The side surface of the collar portion P23 is not flat and bulges outward. The side surface of the flange portion P23 includes a first side surface F21 on the other end (mounting end F1) side and a second side surface F22 on the one end (insertion end F2) side, and the first side surface F21 and the second side surface. F22 is configured to swell outward at the intersection P2. The intersection line portion P2 has an inclination of the side surface of the first conductor pin toward the insertion end F2 side from the mounting end F1 side toward the outer side with respect to the axis C of the first conductor pin (of the flange portion P23). It becomes a portion that changes from an upward slope on the side surface to an inward slope (down slope on the side surface of the flange P23). That is, the intersection line portion P2 is formed at the apex of the swelled side surface (curved surface) of the flange portion P23. The first conductor pin is widened at the intersection line portion P2. The intersecting line portion P2 is formed along the circumferential direction of the conductor pin, and specifically, continuously formed on the entire circumference of the conductor pin. Even in such a first conductor pin, similarly to the first conductor pin 10 of the embodiment of the present invention, the creeping of the solder 201a is easily stopped by the intersection line portion P2. As shown in FIG. 16C, it is considered that the creeping of the solder 201a is likely to stop particularly at the intersection part P2. In FIG. 16A, the distance d21 is the distance between the mounting end F1 and the intersection line portion P2, and the dimension d22 is the thickness of the flange portion P23. The distance d21 is preferably in the range of 0.2 to 1.0 mm. The dimension d22 is preferably in the range of 0.1 to 0.5 mm.

本発明の第2の変形例に係る第1の導体ピンを、図17A、図17B及び図17Cに示す。図17Aは、本発明の第2の変形例に係る第1の導体ピンの実装端近傍を示す図であり、図17Bは、図17AのA−A断面図であり、図17Cは、本発明の第2の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。   A first conductor pin according to a second modification of the present invention is shown in FIGS. 17A, 17B and 17C. 17A is a view showing the vicinity of the mounting end of the first conductor pin according to the second modification of the present invention, FIG. 17B is a cross-sectional view taken along the line AA of FIG. 17A, and FIG. 17C is the present invention. It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 2nd modification of this.

この第1の導体ピンは、実装端F1近傍(実装部11)に、実装端F1側から、第1実装部P31と、第3実装部P33と、第2実装部P32とを、この順で有する。第1実装部P31は第3実装部P33の実装端F1側に接続され、第2実装部P32は第3実装部P33の挿入端F2(図4A参照)側に接続される。第1〜第3実装部P31〜P33はそれぞれ、円柱形状を有する。ただし、第3実装部P33の幅(径)は、第1実装部P31、第2実装部P32のいずれの幅よりも小さい。このため、第3実装部P33の側面は、第1実装部P31及び第2実装部P32の側面に対して径方向(内側)に窪む。この例において、第2実装部P32の実装端F1側の端面(第1の側面F31)と第3実装部P33の側面とは90°の角度をなし、交線部P3は、第2実装部P32の端面と第2実装部P32の側面(第2の側面F32)との角に形成される。すなわち、交線部P3は、実装端F1側から挿入端F2側に向かって、第1の導体ピンの側面の傾斜が、第1の導体ピンの軸Cに対して外側への傾斜(90°の上り坂)から、より内側への傾斜(ストレート)へと変わる部分となる。第1の側面F31は平面であり、第2の側面F32は円柱部分の側面である。第1の導体ピンは、第1の側面F31と第2の側面F32との交線部P3で拡幅される。交線部P3の角度は、90°である。交線部P3は、第1の導体ピンの周方向に沿って外側に膨らむように形成され、詳しくは第1の導体ピンの全周に連続的に形成される。こうした第1の導体ピンでも、上記本発明の実施形態の導体ピン10と同様、交線部P3により、半田201aの這い上がりが止まり易くなる。図17Cに示すように、半田201aの這い上がりは、特に交線部P3で止まり易いと考えられる。なお、図17A中、距離d31は、実装端F1と交線部P3との距離であり、寸法d32は、第3実装部P33の厚みである。距離d31は、0.2〜1.0mmの範囲にあることが好ましい。寸法d32は、0.2〜0.5mmの範囲にあることが好ましい。   The first conductor pins are arranged in the order of the first mounting portion P31, the third mounting portion P33, and the second mounting portion P32 from the mounting end F1 side in the vicinity of the mounting end F1 (mounting portion 11). Have. The first mounting portion P31 is connected to the mounting end F1 side of the third mounting portion P33, and the second mounting portion P32 is connected to the insertion end F2 (see FIG. 4A) side of the third mounting portion P33. Each of the first to third mounting portions P31 to P33 has a cylindrical shape. However, the width (diameter) of the third mounting portion P33 is smaller than any width of the first mounting portion P31 and the second mounting portion P32. For this reason, the side surface of the third mounting portion P33 is recessed in the radial direction (inner side) with respect to the side surfaces of the first mounting portion P31 and the second mounting portion P32. In this example, the end surface (first side surface F31) on the mounting end F1 side of the second mounting portion P32 and the side surface of the third mounting portion P33 form an angle of 90 °, and the intersection portion P3 is the second mounting portion. It is formed at the corner between the end surface of P32 and the side surface (second side surface F32) of the second mounting portion P32. That is, the intersection line portion P3 has an inclination of the side surface of the first conductor pin toward the insertion end F2 side from the mounting end F1 side to the outside with respect to the axis C of the first conductor pin (90 °). It is a part that changes from an uphill slope to a more inward slope (straight). The first side surface F31 is a flat surface, and the second side surface F32 is a side surface of the cylindrical portion. The first conductor pin is widened at the intersection P3 between the first side face F31 and the second side face F32. The angle of the intersection line portion P3 is 90 °. The intersecting line portion P3 is formed so as to bulge outward along the circumferential direction of the first conductor pin. Specifically, it is continuously formed on the entire circumference of the first conductor pin. Even in such a first conductor pin, like the conductor pin 10 of the embodiment of the present invention, the creeping of the solder 201a is easily stopped by the intersecting line portion P3. As shown in FIG. 17C, it is considered that the creeping up of the solder 201a is likely to stop particularly at the intersection portion P3. In FIG. 17A, the distance d31 is the distance between the mounting end F1 and the intersection line portion P3, and the dimension d32 is the thickness of the third mounting portion P33. The distance d31 is preferably in the range of 0.2 to 1.0 mm. The dimension d32 is preferably in the range of 0.2 to 0.5 mm.

本発明の第3の変形例に係る導体ピンを、図18A、図18B及び図18Cに示す。図18Aは、本発明の第3の変形例に係る第1の導体ピンの実装端近傍を示す図であり、図18Bは、図18Aに示す第1の導体ピンを実装端側から見た図であり、図18Cは、本発明の第3の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。   A conductor pin according to a third modification of the present invention is shown in FIGS. 18A, 18B and 18C. 18A is a view showing the vicinity of the mounting end of the first conductor pin according to the third modification of the present invention, and FIG. 18B is a view of the first conductor pin shown in FIG. 18A as viewed from the mounting end side. FIG. 18C is a cross-sectional view showing a connection portion between the first conductor pin and the electronic component according to the third modification of the present invention.

この第1の導体ピンは、実装端F1近傍(実装部11)に、実装端F1側から、第1実装部P41と、第2実装部P42とを、この順で有する。第1実装部P41は第2実装部P42の実装端F1側に接続される。第1実装部P41及び第2実装部P42はそれぞれ、円柱形状を有する。ただし、第1実装部P41の幅(径)は、第2実装部P42の幅よりも小さい。このため、第1実装部P41の側面は、第2実装部P42の側面に対して径方向(内側)に窪む。この例において、第2実装部P42の実装端F1側の端面(第1の側面F41)と第1実装部P41の側面とは90°の角度をなし、交線部P4は、第2実装部P42の端面と第2実装部P42の側面(第2の側面F42)との角に外側に膨らむように形成される。すなわち、交線部P4は、実装端F1側から挿入端F2側に向かって、第1の導体ピンの側面の傾斜が、第1の導体ピンの軸Cに対して外側への傾斜(90°の上り坂)から、より内側への傾斜(ストレート)へと変わる部分となる。第1の導体ピンは交線部P4で拡幅される。交線部P4の角度は、90°である。交線部P4は、第1の導体ピンの周方向に沿って形成され、詳しくは第1の導体ピンの全周に連続的に形成される。こうした第1の導体ピンでも、上記本発明の実施形態の第1の導体ピン10と同様、交線部P4により、半田201aの這い上がりが止まり易くなる。図18Cに示すように、半田201aの這い上がりは、特に交線部P4で止まり易いと考えられる。なお、図18A中、距離d41は、実装端F1と交線部P4との距離である。距離d41は、0.2〜1.0mmの範囲にあることが好ましい。   The first conductor pin has a first mounting portion P41 and a second mounting portion P42 in this order from the mounting end F1 side in the vicinity of the mounting end F1 (mounting portion 11). The first mounting part P41 is connected to the mounting end F1 side of the second mounting part P42. Each of the first mounting portion P41 and the second mounting portion P42 has a cylindrical shape. However, the width (diameter) of the first mounting portion P41 is smaller than the width of the second mounting portion P42. For this reason, the side surface of the first mounting portion P41 is recessed in the radial direction (inner side) with respect to the side surface of the second mounting portion P42. In this example, the end surface (first side surface F41) on the mounting end F1 side of the second mounting portion P42 and the side surface of the first mounting portion P41 form an angle of 90 °, and the intersection portion P4 is the second mounting portion. It is formed so as to bulge outward at the corner between the end surface of P42 and the side surface (second side surface F42) of the second mounting portion P42. That is, the intersection line portion P4 has an inclination of the side surface of the first conductor pin toward the insertion end F2 side from the mounting end F1 side to the outside with respect to the axis C of the first conductor pin (90 °). It is a part that changes from an uphill slope to a more inward slope (straight). The first conductor pin is widened at the intersection line portion P4. The angle of the intersection line portion P4 is 90 °. The intersecting line portion P4 is formed along the circumferential direction of the first conductor pin, and specifically, continuously formed on the entire circumference of the first conductor pin. Even in such a first conductor pin, similarly to the first conductor pin 10 of the embodiment of the present invention, the creeping of the solder 201a is easily stopped by the intersection line portion P4. As shown in FIG. 18C, it is considered that the creeping of the solder 201a is likely to stop particularly at the intersection line portion P4. In FIG. 18A, a distance d41 is a distance between the mounting end F1 and the intersection line portion P4. The distance d41 is preferably in the range of 0.2 to 1.0 mm.

本発明の第4の変形例に係る第1の導体ピンを、図19A、図19B及び図19Cに示す。図19Aは、本発明の第4の変形例に係る第1の導体ピンの実装端近傍を示す図であり、図19Bは、図19AのA−A断面図であり、図19Cは、本発明の第4の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。   A first conductor pin according to a fourth modification of the present invention is shown in FIGS. 19A, 19B and 19C. 19A is a view showing the vicinity of the mounting end of the first conductor pin according to the fourth modification of the present invention, FIG. 19B is a cross-sectional view taken along the line AA of FIG. 19A, and FIG. 19C is the present invention. It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 4th modification of this.

この第1の導体ピンは、実装端F1近傍(実装部11)に、複数の窪みP50を有する。これら窪みP50は、第1の導体ピンの周方向に沿って、任意の間隔(例えば一定の間隔)で形成される。窪みP50の内面は、例えば曲面であり、第1の導体ピンの側面に対して径方向(内側)に窪む。交線部P5は、窪みP50により形成される。詳しくは、窪みP50の内面(第1の側面F51)とその挿入端F2側の第2の側面F52とは、交線部P5で外側に膨らむように構成されている。交線部P5は、実装端F1側から挿入端F2側に向かって、第1の導体ピンの側面の傾斜が、第1の導体ピンの軸Cに対して外側への傾斜(窪みP50内面の上り坂)から、より内側への傾斜(ストレート)へと変わる部分となる。交線部P5は、窪みP50の挿入端F2側の縁に相当する。第1の側面F51と第2の側面F52との交線部P5は、第1の導体ピンの外周を周回する曲線に沿って形成された部分を有する。交線部P5は、第1の導体ピンの周方向に沿って複数、形成される。第1の導体ピンは交線部P5で縮幅される。こうした第1の導体ピンでも、上記本発明の実施形態の導体ピン10と同様、交線部P5により、半田201aの這い上がりが止まり易くなる。図19Cに示すように、半田201aの這い上がりは、特に交線部P5で止まり易いと考えられる。なお、図19A中、距離d51は、実装端F1と交線部P5との距離であり、寸法d52は、窪みP50の幅である。距離d51は、0.2〜1.0mmの範囲にあることが好ましい。寸法d52は、0.1〜0.5mmの範囲にあることが好ましい。   The first conductor pin has a plurality of depressions P50 in the vicinity of the mounting end F1 (mounting portion 11). These depressions P50 are formed at arbitrary intervals (for example, a constant interval) along the circumferential direction of the first conductor pins. The inner surface of the recess P50 is, for example, a curved surface and is recessed in the radial direction (inner side) with respect to the side surface of the first conductor pin. The intersection line portion P5 is formed by the depression P50. Specifically, the inner surface (first side surface F51) of the recess P50 and the second side surface F52 on the insertion end F2 side are configured to swell outward at the intersection P5. The intersection line portion P5 has an inclination of the side surface of the first conductor pin toward the insertion end F2 side from the mounting end F1 side toward the outside with respect to the axis C of the first conductor pin (the inner surface of the depression P50). It becomes a part that changes from an uphill slope to a more inward slope (straight). The intersection line portion P5 corresponds to the edge of the recess P50 on the insertion end F2 side. The intersection part P5 between the first side face F51 and the second side face F52 has a part formed along a curve that goes around the outer periphery of the first conductor pin. A plurality of intersecting line portions P5 are formed along the circumferential direction of the first conductor pins. The first conductor pin is reduced in width at the intersection part P5. Even in such a first conductor pin, as in the conductor pin 10 of the above-described embodiment of the present invention, the creeping of the solder 201a is easily stopped by the intersection line portion P5. As shown in FIG. 19C, it is considered that the creeping of the solder 201a is likely to stop particularly at the intersection line portion P5. In FIG. 19A, the distance d51 is the distance between the mounting end F1 and the intersection line portion P5, and the dimension d52 is the width of the recess P50. The distance d51 is preferably in the range of 0.2 to 1.0 mm. The dimension d52 is preferably in the range of 0.1 to 0.5 mm.

本発明の第5の変形例に係る第1の導体ピンを、図20A、図20B及び図20Cに示す。図20Aは、本発明の第5の変形例に係る第1の導体ピンの実装端近傍を示す図であり、図20Bは、図20AのA−A断面図であり、図20Cは、本発明の第5の変形例に係る第1の導体ピンと電子部品との接続部を示す断面図である。   A first conductor pin according to a fifth modification of the present invention is shown in FIGS. 20A, 20B and 20C. 20A is a view showing the vicinity of the mounting end of the first conductor pin according to the fifth modification of the present invention, FIG. 20B is a cross-sectional view taken along the line AA of FIG. 20A, and FIG. 20C is the present invention. It is sectional drawing which shows the connection part of the 1st conductor pin and electronic component which concern on the 5th modification of this.

この第1の導体ピンは、実装端F1近傍(実装部11)に、複数の凸部P60を有する。これら凸部P60は、第1の導体ピンの周方向に沿って、任意の間隔(例えば一定の間隔)で形成される。凸部P60の凸面は、例えば曲面であり、第1の導体ピンの側面に対して径方向(外側)に突出する。交線部P6は、凸部P60により形成される。詳しくは、凸部P60の凸面は、他端(実装端F1)側の第1の側面F61と一端(挿入端F2)側の第2の側面F62とで構成され、第1の側面F61と第2の側面F62とは、交線部P6で外側に膨らむように構成されている。交線部P6は、実装端F1側から挿入端F2側に向かって、第1の導体ピンの側面の傾斜が、第1の導体ピンの軸Cに対して外側への傾斜(凸部P60の凸面の上り坂)から、より内側への傾斜(凸部P60の凸面の下り坂)へと変わる部分となる。交線部P6は、凸部P60の頂点に相当する。第1の側面F61と第2の側面F62との交線部P6は、第1の導体ピンの外周を周回する曲線に沿って形成された部分を有する。交線部P6は、第1の導体ピンの周方向に沿って複数、形成される。第1の導体ピンは交線部P6で拡幅される。こうした第1の導体ピンでも、上記本発明の実施形態の第1の導体ピン10と同様、交線部P6により、半田201aの這い上がりが止まり易くなる。図20Cに示すように、半田201aの這い上がりは、特に交線部P6で止まり易いと考えられる。なお、図20A中、距離d61は、実装端F1と交線部P6との距離であり、寸法d62は、凸部P60の幅である。距離d61は、0.2〜1.0mmの範囲にあることが好ましい。寸法d62は、0.1〜0.5mmの範囲にあることが好ましい。   The first conductor pin has a plurality of convex portions P60 in the vicinity of the mounting end F1 (mounting portion 11). These convex portions P60 are formed at an arbitrary interval (for example, a constant interval) along the circumferential direction of the first conductor pin. The convex surface of the convex part P60 is a curved surface, for example, and protrudes in the radial direction (outside) with respect to the side surface of the first conductor pin. The intersection part P6 is formed by the convex part P60. Specifically, the convex surface of the convex portion P60 is composed of a first side surface F61 on the other end (mounting end F1) side and a second side surface F62 on the one end (insertion end F2) side. The second side surface F62 is configured to bulge outward at the intersection line portion P6. The intersection line portion P6 has an inclination of the side surface of the first conductor pin toward the insertion end F2 side from the mounting end F1 side toward the outside with respect to the axis C of the first conductor pin (the protrusion P60 It is a portion that changes from an upward slope on the convex surface to an inward slope (downhill on the convex surface of the convex portion P60). The intersection line portion P6 corresponds to the apex of the convex portion P60. The intersection part P6 between the first side face F61 and the second side face F62 has a portion formed along a curve that goes around the outer periphery of the first conductor pin. A plurality of intersecting line portions P6 are formed along the circumferential direction of the first conductor pins. The first conductor pin is widened at the intersection line portion P6. Even in such a first conductor pin, like the first conductor pin 10 of the embodiment of the present invention, the creeping of the solder 201a is easily stopped by the intersection line portion P6. As shown in FIG. 20C, it is considered that the creeping of the solder 201a is likely to stop particularly at the intersecting line portion P6. In FIG. 20A, the distance d61 is the distance between the mounting end F1 and the intersection line portion P6, and the dimension d62 is the width of the convex portion P60. The distance d61 is preferably in the range of 0.2 to 1.0 mm. The dimension d62 is preferably in the range of 0.1 to 0.5 mm.

図21は、本発明の実施形態に係る部分的にテーパした第1の導体ピンの一例を示す図である。図22は、本発明の実施形態に係る、テーパ部の側面が曲面である第1の導体ピンの一例を示す図である。図23は、本発明の実施形態に係る第1の導体ピンの鍔部の側面が階段状になっている一例を示す図である。図24は、本発明の実施形態に係る第1の導体ピンの側面が凹凸面からなる交線部の一例を示す図である。図25Aは、本発明の第3の変形例に係る第1の導体ピンの変形例について、鋭角な交線部を有する第1の導体ピンの一例を示す図であり、図25Bは、本発明の第3の変形例に係る第1の導体ピンの変形例について、鈍角な交線部を有する第1の導体ピンの一例を示す図であり、図25Cは、本発明の第3の変形例に係る第1の導体ピンの変形例について、実装端近傍に、曲面からなる上り坂を有する第1の導体ピンの一例を示す図である。図26Aは、本発明の第4の変形例に係る第1の導体ピンが角形の窪み(凹部)を有する一例を示す図であり、図26Bは、本発明の第4の変形例に係る第1の導体ピンの周方向に沿って、異なる形状を有する複数の窪みが形成される一例を示す図である。図27Aは、本発明の第5の変形例に係る第1の導体ピンが角形の突起(凸部)を有する一例を示す図であり、図27Bは、本発明の第5の変形例に係る第1の導体ピンの周方向に沿って、異なる形状を有する複数の突起が形成される一例を示す図である。図28は、本発明の実施形態に係る、周方向に沿って、窪み(凹部)及び突起(凸部)を有する第1の導体ピンの一例を示す図である。図29は、本発明の実施形態に係る、実装端近傍に複数の鍔部を有する第1の導体ピンの一例を示す図である。図30は、本発明の実施形態に係る、実装端近傍に階段状の段差を有する第1の導体ピンの一例を示す図である。図31Aは、本発明の実施形態に係る、テーパ部と鍔部との両方を有する第1の導体ピンの第1の例を示す図であり、図31Bは、本発明の実施形態に係る、テーパ部と鍔部との両方を有する第1の導体ピンの第2の例を示す図である。図32Aは、本発明の実施形態に係る、被覆材(金属膜)により部分的に覆われた第1の導体ピンの一例を示す図であり、図32Bは、本発明の実施形態に係る、交線部のみが被覆材(金属膜)で覆われた第1の導体ピンの一例を示す図であり、図32Cは、本発明の実施形態に係る、被覆材(金属膜)で覆われていない第1の導体ピンの一例を示す図である。図33Aは、本発明の実施形態に係る、鍔部を有さない第1の導体ピンの第1の例を示す図であり、図33Bは、本発明の実施形態に係る、鍔部を有さない第1の導体ピンの第2の例を示す図である。図34は、本発明の実施形態に係る、曲がった第1の導体ピンの一例を示す図である。   FIG. 21 is a diagram illustrating an example of a first taper pin that is partially tapered according to the embodiment of the present invention. FIG. 22 is a diagram illustrating an example of a first conductor pin according to an embodiment of the present invention in which the side surface of the tapered portion is a curved surface. FIG. 23 is a diagram illustrating an example in which the side surface of the flange portion of the first conductor pin according to the embodiment of the present invention is stepped. FIG. 24 is a diagram illustrating an example of an intersection portion in which the side surface of the first conductor pin according to the embodiment of the present invention is an uneven surface. FIG. 25A is a diagram showing an example of a first conductor pin having an acute intersection line portion in a modification of the first conductor pin according to the third modification of the present invention, and FIG. 25B shows the present invention. It is a figure which shows an example of the 1st conductor pin which has an obtuse angle | corner line part about the modification of the 1st conductor pin which concerns on the 3rd modification of this, FIG. 25C is the 3rd modification of this invention It is a figure which shows an example of the 1st conductor pin which has the uphill which consists of a curved surface in the vicinity of a mounting end about the modification of the 1st conductor pin which concerns on this. FIG. 26A is a diagram showing an example in which a first conductor pin according to a fourth modification of the present invention has a square depression (concave), and FIG. 26B shows a fourth modification according to the fourth modification of the present invention. It is a figure which shows an example in which the several hollow which has a different shape is formed along the circumferential direction of one conductor pin. FIG. 27A is a diagram illustrating an example in which the first conductor pin according to the fifth modification of the present invention has a square protrusion (projection), and FIG. 27B relates to the fifth modification of the present invention. It is a figure which shows an example in which several protrusion which has a different shape is formed along the circumferential direction of a 1st conductor pin. FIG. 28 is a diagram illustrating an example of a first conductor pin having a recess (concave portion) and a protrusion (convex portion) along the circumferential direction according to the embodiment of the present invention. FIG. 29 is a diagram illustrating an example of a first conductor pin having a plurality of flange portions in the vicinity of the mounting end according to the embodiment of the present invention. FIG. 30 is a diagram illustrating an example of a first conductor pin having a stepped step near the mounting end according to the embodiment of the present invention. FIG. 31A is a diagram showing a first example of a first conductor pin having both a tapered portion and a flange portion according to an embodiment of the present invention, and FIG. 31B is a diagram according to an embodiment of the present invention. It is a figure which shows the 2nd example of the 1st conductor pin which has both a taper part and a collar part. FIG. 32A is a diagram illustrating an example of a first conductor pin partially covered with a coating material (metal film) according to the embodiment of the present invention, and FIG. 32B is a diagram according to the embodiment of the present invention. It is a figure which shows an example of the 1st conductor pin with which only the intersection part was covered with the coating | covering material (metal film), FIG. 32C is covered with the coating | covering material (metal film) based on embodiment of this invention. It is a figure which shows an example of the 1st conductor pin which is not. FIG. 33A is a diagram showing a first example of a first conductor pin that does not have a flange according to an embodiment of the present invention, and FIG. 33B has a flange according to an embodiment of the present invention. It is a figure which shows the 2nd example of the 1st conductor pin which is not. FIG. 34 is a diagram illustrating an example of a bent first conductor pin according to an embodiment of the present invention.

上記本発明の実施形態では、第1の導体ピン10の全周がテーパする例を示したが(図5B参照)、これに限定されず、例えば図21(図5Bに対応する図)に示すように、部分的にテーパした第1の導体ピンであってもよい。図21の例では、それぞれテーパの開始位置に形成される2つの交線部P1が、互いに対向するように形成される。   In the embodiment of the present invention, an example in which the entire circumference of the first conductor pin 10 is tapered (see FIG. 5B) is shown, but the present invention is not limited to this, and for example, shown in FIG. 21 (a diagram corresponding to FIG. 5B). As such, the first conductor pin may be partially tapered. In the example of FIG. 21, the two intersecting line portions P1 formed at the taper start positions are formed so as to face each other.

上記本発明の実施形態では、テーパ部P11の側面が斜面(軸Cに対して傾いた平面)である例を示したが(図6参照)、これに限定されず、例えば図22に示すように、テーパ部P11の側面が曲面である第1の導体ピンであってもよい。   In the embodiment of the present invention, the example in which the side surface of the taper portion P11 is a slope (a plane inclined with respect to the axis C) has been shown (see FIG. 6). Moreover, the 1st conductor pin whose side surface of the taper part P11 is a curved surface may be sufficient.

上記第1の変形例に係る第1の導体ピン(図16A、図16B)の鍔部P23は、湾曲した側面を有するが、これに限定されず、例えば図23に示すように、鍔部P23は階段状の側面を有していてもよい。   The flange portion P23 of the first conductor pin (FIG. 16A, FIG. 16B) according to the first modification has a curved side surface, but is not limited to this, for example, as shown in FIG. 23, the flange portion P23. May have stepped side surfaces.

また、例えば図24に示すように、凹凸面F5からなる交線部P24を有する第1の導体ピンであってもよい。凹凸面F5は、例えば複数の薄い鍔部P23(図16A、図16B)が積層した場合と同様のかたちになる。   Further, for example, as shown in FIG. 24, it may be a first conductor pin having an intersecting line portion P24 formed of an uneven surface F5. The uneven surface F5 has the same shape as when a plurality of thin flanges P23 (FIGS. 16A and 16B) are stacked, for example.

上記本発明の第2、第3の変形例に係る第1の導体ピン(図17A〜図18B)の交線部P3、P4の角度は90°としたが、これに限定されず、例えば図25Aに示すように、交線部P4の角度は鋭角であってもよく、例えば図25Bに示すように、交線部P4の角度は鈍角であってもよい。また、第2実装部P42の実装端F1側の端面(第1の側面F41)は平面に限られず、例えば図25Cに示すように、曲面であってもよい。ここでは交線部P4についての本発明の変形例を例示したが、交線部P3についても同様である。   Although the angle of the intersecting line portions P3 and P4 of the first conductor pins (FIGS. 17A to 18B) according to the second and third modified examples of the present invention is 90 °, the angle is not limited to this. As shown in 25A, the angle of the intersection line portion P4 may be an acute angle. For example, as shown in FIG. 25B, the angle of the intersection line portion P4 may be an obtuse angle. Further, the end surface (first side surface F41) on the mounting end F1 side of the second mounting portion P42 is not limited to a flat surface, and may be a curved surface as shown in FIG. 25C, for example. Here, the modification of the present invention for the intersection line portion P4 is illustrated, but the same applies to the intersection line portion P3.

本発明の第4の変形例に係る第1の導体ピン(図19A、図19B)において、窪みP50(凹部)の形状は任意である。例えば窪みP50の形状は、図26A(図19Bに対応する断面図)に示すように、角形であってもよい。また、図26B(図19Bに対応する断面図)に示すように、第1の導体ピンの周方向に沿って、異なる形状を有する複数の窪みP50が形成されてもよい。   In the first conductor pin (FIGS. 19A and 19B) according to the fourth modification of the present invention, the shape of the recess P50 (recess) is arbitrary. For example, the shape of the recess P50 may be a square as shown in FIG. 26A (cross-sectional view corresponding to FIG. 19B). Moreover, as shown in FIG. 26B (cross-sectional view corresponding to FIG. 19B), a plurality of recesses P50 having different shapes may be formed along the circumferential direction of the first conductor pin.

本発明の第5の変形例に係る第1の導体ピン(図20A、図20B)において、凸部P60(突起)の形状は任意である。例えば凸部P60の形状は、図27A(図20Bに対応する断面図)に示すように、角形であってもよい。また、図27B(図20Bに対応する断面図)に示すように、第1の導体ピンの周方向に沿って、異なる形状を有する複数の凸部P60が形成されてもよい。   In the first conductor pin (FIGS. 20A and 20B) according to the fifth modification of the present invention, the shape of the convex portion P60 (protrusion) is arbitrary. For example, the shape of the convex part P60 may be a square as shown in FIG. 27A (cross-sectional view corresponding to FIG. 20B). Moreover, as shown in FIG. 27B (cross-sectional view corresponding to FIG. 20B), a plurality of convex portions P60 having different shapes may be formed along the circumferential direction of the first conductor pin.

また、図28(図19B、図20Bに対応する断面図)に示すように、第1の導体ピンの周方向に沿って、窪みP50(凹部)及び凸部P60(突起)の両方が形成されていてもよい。   Further, as shown in FIG. 28 (cross-sectional views corresponding to FIGS. 19B and 20B), both the recess P50 (concave portion) and the convex portion P60 (projection) are formed along the circumferential direction of the first conductor pin. It may be.

上記本発明の第1の変形例に係る第1の導体ピン(図16A、図16B)では、鍔部P23の数を1つとしたが、これに限定されず、例えば図29に示すように、実装端F1近傍(実装部11)に、複数(例えば2つ)の鍔部P23を有する第1の導体ピンであってもよい。   In the first conductor pin (FIG. 16A, FIG. 16B) according to the first modified example of the present invention, the number of the flange portions P23 is one, but is not limited to this, for example, as shown in FIG. It may be a first conductor pin having a plurality of (for example, two) flanges P23 in the vicinity of the mounting end F1 (the mounting portion 11).

上記本発明の第3の変形例に係る第1の導体ピン(図18A、図18B)では、段差の数を1つとしたが、これに限定されず、例えば図30に示すように、実装端F1近傍(実装部11)に、階段状の複数(例えば2つ)の段差を有する第1の導体ピンであってもよい。   In the first conductor pin (FIGS. 18A and 18B) according to the third modification of the present invention, the number of steps is one, but the present invention is not limited to this. For example, as shown in FIG. It may be a first conductor pin having a plurality of steps (for example, two steps) in the vicinity of F1 (mounting portion 11).

上記本発明の実施形態に係る第1の導体ピンの形状と本発明の第1〜第5の変形例に係る第1の導体ピンの形状とは、任意に組み合わせることができる。例えば図31A、図31Bに示すように、テーパ部P11と鍔部P23とを有する導体ピンであってもよい。   The shape of the first conductor pin according to the embodiment of the present invention and the shape of the first conductor pin according to the first to fifth modifications of the present invention can be arbitrarily combined. For example, as shown to FIG. 31A and FIG. 31B, the conductor pin which has the taper part P11 and the collar part P23 may be sufficient.

図16A〜図31Bに示す第1の導体ピンも、前述した上記本発明の実施形態に係る第1の導体ピン10の製造方法に準ずる方法によって、製造することができる。第1の導体ピンの各部は、連続的(一体的)に形成してもよいが、別々に形成した後、互いに接合するようにしてもよい。両者を比較すると、強度の面では、連続的に形成した第1の導体ピンの方が高い強度を有する傾向にある一方、加工の面では、接合した第1の導体ピンの方が、複雑形状に対応し易いと考えられる。   The first conductor pins shown in FIGS. 16A to 31B can also be manufactured by a method similar to the method for manufacturing the first conductor pins 10 according to the embodiment of the present invention described above. Each part of the first conductor pin may be formed continuously (integrally), or may be formed separately and then joined together. When both are compared, the first conductor pin formed continuously tends to have higher strength in terms of strength, while the first conductor pin joined has a more complicated shape in terms of processing. It is thought that it is easy to cope with.

上記本発明の実施形態では、被覆材10aが第1の導体ピン10の全体を覆っている例を示したが(図4A参照)、これに限定されず、例えば図32Aに示すように、実装部11の一部(例えばテーパ部P11)だけが被覆材10aで覆われた第1の導体ピン10であってもよい。この場合、被覆材10aがバリア層となり、高温にさらされた際に、第1の導体ピン10の金属(例えば銅)が半田側に溶出することにより、第1の導体ピンにボイド(空泡)が形成されにくく、ボイドを起点とした亀裂が発生しにくくなるため、接続不良となることを防止することができる。バリア層とは、例えばNi、Cr、亜鉛めっきのことをいう。   In the embodiment of the present invention, the covering material 10a covers the entire first conductor pin 10 (see FIG. 4A). However, the present invention is not limited to this. For example, as shown in FIG. Only a part of the part 11 (for example, the taper part P11) may be the first conductor pin 10 covered with the covering material 10a. In this case, when the covering material 10a becomes a barrier layer and is exposed to a high temperature, the metal (for example, copper) of the first conductor pin 10 elutes to the solder side, thereby causing a void (air bubble) in the first conductor pin. ) Are not easily formed, and cracks starting from voids are less likely to occur, so that connection failure can be prevented. The barrier layer refers to, for example, Ni, Cr, or zinc plating.

また、例えば図32Bに示すように、交線部P1のみが被覆材10aで覆われる第1の導体ピン10であってもよい。   Further, for example, as shown in FIG. 32B, the first conductor pin 10 in which only the intersection line portion P1 is covered with the covering material 10a may be used.

なお、部分的に第1の導体ピン10を被覆材10aで覆う方法は任意である。例えば電解めっき等により、第1の導体ピン10の全体を被覆材10aで覆った後、不要な被覆材10aをエッチングしてもよいし、あるいは第1の導体ピン10の必要な部分にだけ、被覆材10aをめっきしてもよい。   In addition, the method of partially covering the first conductor pin 10 with the covering material 10a is arbitrary. For example, after covering the entire first conductor pin 10 with the covering material 10a by electrolytic plating or the like, the unnecessary covering material 10a may be etched, or only in a necessary portion of the first conductor pin 10 The covering material 10a may be plated.

さらには、例えば図32Cに示すように、被覆材10aで覆われていない第1の導体ピン10であってもよい。   Furthermore, for example, as shown in FIG. 32C, the first conductor pin 10 that is not covered with the covering material 10a may be used.

上記本発明の実施形態では、実装部11と、鍔部12と、挿入部13と、から構成される第1の導体ピン10を例示したが(図4A参照)、これに限定されず、例えば図33A、図33Bに示すように、鍔部12を有さない第1の導体ピン10であってもよい。   In the embodiment of the present invention, the first conductor pin 10 configured by the mounting portion 11, the flange portion 12, and the insertion portion 13 is exemplified (see FIG. 4A). As shown in FIG. 33A and FIG. 33B, the first conductor pin 10 that does not have the flange 12 may be used.

図33Aに示す第1の導体ピン10は、実装端F1近傍に、実装端F1側から挿入端F2側に向かうほど第1の導体ピン10の軸Cから遠ざかる側面を有するテーパ部P11(上り坂部)と、第1の導体ピン10の軸Cに平行な側面を有するストレート部P14と、を有する。交線部P1は、テーパ部P11とストレート部P14との境に位置し、テーパ部P11と、交線部P1と、ストレート部P14とは、実装端F1側から挿入端F2側に向かってこの順で、連続的に形成されている。   The first conductor pin 10 shown in FIG. 33A has a tapered portion P11 (uphill portion) having a side surface that is further away from the axis C of the first conductor pin 10 toward the insertion end F2 side from the mounting end F1 side in the vicinity of the mounting end F1. ) And a straight portion P14 having a side surface parallel to the axis C of the first conductor pin 10. The intersection line portion P1 is located at the boundary between the taper portion P11 and the straight portion P14. The taper portion P11, the intersection line portion P1, and the straight portion P14 are moved from the mounting end F1 side toward the insertion end F2 side. In order, they are formed continuously.

図33Bに示す第1の導体ピン10は、実装端F1近傍に、実装端F1側から挿入端F2側に向かうほど第1の導体ピン10の軸Cから遠ざかる側面を有するテーパ部P11(上り坂部)と、実装端F1側から挿入端F2側に向かうほど第1の導体ピン10の軸Cに近づく側面を有するテーパ部P15(下り坂部)と、を有する。交線部P1は、テーパ部P11とテーパ部P15との境に位置し、テーパ部P11と、交線部P1と、テーパ部P15とは、実装端F1側から挿入端F2側に向かってこの順で、連続的に形成されている。   The first conductor pin 10 shown in FIG. 33B has a tapered portion P11 (uphill portion) having a side surface that is further away from the axis C of the first conductor pin 10 toward the insertion end F2 side from the mounting end F1 side in the vicinity of the mounting end F1. ) And a tapered portion P15 (downhill portion) having a side surface that approaches the axis C of the first conductor pin 10 from the mounting end F1 side toward the insertion end F2 side. The intersection line portion P1 is located at the boundary between the taper portion P11 and the taper portion P15, and the taper portion P11, the intersection line portion P1, and the taper portion P15 are moved from the mounting end F1 side toward the insertion end F2 side. In order, they are formed continuously.

上記本発明の実施形態では、直線状の導体ピン10を例示したが(図4A参照)、これに限定されず、例えば図34に示すように、導体ピン10は曲がっていてもよい。図34の例では、導体ピン10がクランク状に折れ曲がっている。ただしこれに限定されず、導体ピン10は、例えばL字状又はU字状等に曲がっていてもよい。   In the embodiment of the present invention, the linear conductor pin 10 is exemplified (see FIG. 4A), but the present invention is not limited to this, and the conductor pin 10 may be bent, for example, as shown in FIG. In the example of FIG. 34, the conductor pin 10 is bent in a crank shape. However, the present invention is not limited to this, and the conductor pin 10 may be bent, for example, in an L shape or a U shape.

図35Aは、本発明の実施形態に係る導体ピンの横断面の形状の別例としての正四角形を示す図であり、図35Bは、本発明の実施形態に係る導体ピンの横断面の形状の別例としての正六角形を示す図であり、図35Cは、本発明の実施形態に係る導体ピンの横断面の形状の別例としての正八角形を示す図であり、図35Dは、本発明の実施形態に係る導体ピンの横断面の横断面の形状の別例としての楕円を示す図である。図36Aは、本発明の実施形態に係る導体ピンの横断面の形状の別例としての十字形を示す図であり、図36Bは、本発明の実施形態に係る導体ピンの横断面の形状の別例としての正多角星形を示す図であり、図36Cは、本発明の実施形態に係る導体ピンの横断面の形状の別例としての花弁形を示す図である。   FIG. 35A is a diagram showing a regular square as another example of the cross-sectional shape of the conductor pin according to the embodiment of the present invention, and FIG. 35B is a cross-sectional shape of the conductor pin according to the embodiment of the present invention. FIG. 35C is a diagram showing a regular hexagon as another example, FIG. 35C is a diagram showing a regular octagon as another example of the shape of the cross section of the conductor pin according to the embodiment of the present invention, and FIG. 35D is a diagram of the present invention. It is a figure which shows the ellipse as another example of the shape of the cross section of the cross section of the conductor pin which concerns on embodiment. FIG. 36A is a diagram showing a cross shape as another example of the shape of the cross-section of the conductor pin according to the embodiment of the present invention, and FIG. 36B shows the shape of the cross-section of the conductor pin according to the embodiment of the present invention. It is a figure which shows the regular polygon star as another example, and FIG. 36C is a figure which shows the petal shape as another example of the shape of the cross section of the conductor pin which concerns on embodiment of this invention.

導体ピン群101〜103の各導体ピン(第1の導体ピン10等)の横断面(X−Y平面)の形状は、円(真円)に限られず任意であり、例えば図35A、図35B、図35Cに示すように、正四角形、正六角形、又は正八角形等の正多角形であってもよい。なお、多角形の角の形状は任意であり、例えば直角でも、鋭角でも、鈍角でも、丸みを帯びていてもよい。ただし、熱応力の集中を防止する上では、角が丸みを帯びていた方が好ましい。   The shape of the cross section (XY plane) of each conductor pin (first conductor pin 10 or the like) of the conductor pin groups 101 to 103 is not limited to a circle (perfect circle), and is arbitrary, for example, FIG. 35A and FIG. As shown in FIG. 35C, it may be a regular polygon such as a regular square, a regular hexagon, or a regular octagon. In addition, the shape of the polygonal corner is arbitrary, and may be, for example, a right angle, an acute angle, an obtuse angle, or rounded. However, in order to prevent concentration of thermal stress, it is preferable that the corners are rounded.

また、図35Dに示すように、導体ピンの横断面の形状は、楕円であってもよい。また、長方形又は三角形等であってもよい。   Further, as shown in FIG. 35D, the shape of the cross section of the conductor pin may be an ellipse. Moreover, a rectangle or a triangle etc. may be sufficient.

また、図36A〜図36Cに示すように、十字形、正多角星形、又は花弁(コスモス)形など、中心から放射状に直線を引いた形(複数の羽根を放射状に配置した形)であってもよい。   In addition, as shown in FIGS. 36A to 36C, it is a shape in which a straight line is drawn radially from the center (a shape in which a plurality of blades are arranged radially), such as a cross shape, a regular polygonal star shape, or a petal (cosmos) shape. May be.

導体ピンの横断面の形状は、上記形状を組み合わせた(複合した)形状であってもよい。   The shape of the cross section of the conductor pin may be a combination (composite) of the above shapes.

図37は、実装用基板の全ての導体ピンとして、本発明の実施形態に係る導体ピンを適用した一例を示す図である。図38は、本発明の実施形態に係る導体ピンと支持基板とが連続的に形成された実装用基板の一例を示す図である。図39は、本発明の実施形態に係る導体ピンを、複数の支持基板を有する電子デバイスに適用した一例を示す図である。図40は、本発明の実施形態に係る導体ピンを有し、配線板を有さない電子デバイスの一例を示す図である。   FIG. 37 is a diagram showing an example in which the conductor pins according to the embodiment of the present invention are applied as all the conductor pins of the mounting substrate. FIG. 38 is a diagram showing an example of a mounting substrate in which conductor pins and a support substrate according to the embodiment of the present invention are continuously formed. FIG. 39 is a diagram illustrating an example in which the conductor pin according to the embodiment of the present invention is applied to an electronic device having a plurality of support substrates. FIG. 40 is a diagram illustrating an example of an electronic device that includes the conductor pin according to the embodiment of the present invention and does not include the wiring board.

上記本発明の実施形態では、複数の導体ピンのうち、一部の導体ピン(第1の導体ピン10)のみが、実装端F1近傍の側面に交線部P1を有する例を示したが(図2、図4A参照)、これに限定されず、例えば図37に示すように、全ての導体ピンが、図4A及び図4Bに示したような形状を有し、各導体ピンの実装端F1近傍の側面に、交線部P1が形成されていてもよい。   In the embodiment of the present invention, an example in which only a part of the plurality of conductor pins (first conductor pin 10) has the intersection portion P1 on the side surface near the mounting end F1 is shown ( For example, as shown in FIG. 37, all the conductor pins have shapes as shown in FIGS. 4A and 4B, and the mounting ends F1 of the respective conductor pins are used. An intersection line portion P1 may be formed on the side surface in the vicinity.

導体ピン群101〜103の各導体ピン(第1の導体ピン10等)と支持基板2000との接続態様は任意である。上記実施形態では、導体ピン群101〜103の各導体ピン(導体ピン10等)と、支持基板2000とを別々に形成した後、互いに接合するようにしたが(図2参照)、これに限定されず、例えば金属板を加工することにより、図38に示すように、支持基板2000と各導体ピンとを連続的(一体的)に形成してもよい。こうすることにより、支持基板2000にピン挿入用の孔2000aを形成する工程等が必要なくなるため、工程数を削減することが可能となる。また、例えば支持基板2000の主面に各導体ピンの端面が接合されていてもよい。こうした接続方法によっても、孔2000aの形成が不要になる。   A connection mode between each of the conductor pins (first conductor pin 10 and the like) of the conductor pin groups 101 to 103 and the support substrate 2000 is arbitrary. In the above embodiment, the conductor pins (conductor pins 10 and the like) of the conductor pin groups 101 to 103 and the support substrate 2000 are separately formed and then joined to each other (see FIG. 2). Instead, for example, by processing a metal plate, the support substrate 2000 and each conductor pin may be formed continuously (integrally) as shown in FIG. By doing so, the process of forming the pin insertion hole 2000a in the support substrate 2000 is not necessary, and the number of processes can be reduced. For example, the end surface of each conductor pin may be joined to the main surface of the support substrate 2000. Even with such a connection method, the formation of the hole 2000a becomes unnecessary.

上記実施形態では、導体ピン群101〜103の各導体ピンと接続される支持基板2000の数を1つとしたが(図2参照)、これに限定されず、例えば図39に示すように、支持基板2000とは別に、支持基板3000を用意し、これらに実装される配線板1000及び半導体チップ201、202を、支持基板2000、3000の間に挟み込むようにしてもよい。図39の例では、支持基板2000に導体ピン群101、102の各導体ピンが接続され、支持基板3000に導体ピン群103の各導体ピンが接続されている。   In the above embodiment, the number of the support substrate 2000 connected to each conductor pin of the conductor pin groups 101 to 103 is one (see FIG. 2), but is not limited to this, for example, as shown in FIG. Apart from 2000, a support substrate 3000 may be prepared, and the wiring board 1000 and the semiconductor chips 201 and 202 mounted thereon may be sandwiched between the support substrates 2000 and 3000. In the example of FIG. 39, the conductor pins of the conductor pin groups 101 and 102 are connected to the support substrate 2000, and the conductor pins of the conductor pin group 103 are connected to the support substrate 3000.

例えば図40に示すように、配線板1000を有さない電子デバイス100であってもよい。   For example, as shown in FIG. 40, the electronic device 100 which does not have the wiring board 1000 may be sufficient.

また、例えば導体ピンの軽量化や材料削減等を図るために、不要な部分を削ったり空洞を形成したりしてもよい。   Further, for example, in order to reduce the weight of the conductor pin and reduce the material, unnecessary portions may be cut or a cavity may be formed.

本発明の製造方法は、上記本発明の実施形態で示した内容及び順序に限定されるものではなく、本発明の趣旨を逸脱しない範囲において任意に内容及び順序を変更することができる。また、用途等に応じて、必要ない工程を割愛してもよい。   The production method of the present invention is not limited to the contents and order shown in the embodiment of the present invention, and the contents and order can be arbitrarily changed without departing from the gist of the present invention. Moreover, you may omit the process which is not required according to a use etc.

上記本発明の実施形態及びその他の変形例は、任意に組み合わせることができる。用途等に応じて適切な組み合わせを選ぶことが好ましい。   The above embodiment of the present invention and other modifications can be arbitrarily combined. It is preferable to select an appropriate combination according to the application.

10 導体ピン(第1の導体ピン)
10a 被覆材
11 実装部
11a 実装部
12 鍔部
13 挿入部
20 導体ピン(第2の導体ピン)
21 実装部
22 鍔部
23 挿入部
30 導体ピン
30a 導体
100 電子デバイス
100a 実装用基板
101〜103 導体ピン群
101a、103a 導体ピン
201、202 半導体チップ
201a、202a 半田
500 導体ピン
1000 配線板
1000a 半田
2000 支持基板
2000a 孔
2001 第1絶縁層
2002 第2絶縁層
2003 第3絶縁層
3000 支持基板
3001 金型
C 軸
F1 実装端
F2 挿入端
F3 側面
F5 凹凸面
P1〜P6 交線部
F11 第1面
F12 第2面
F30 ストレート側面
F31 第1の側面
F32 第2の側面
F41 第1の側面
F42 第2の側面
P11 テーパ部
P12 ストレート部
P14 ストレート部
P15 テーパ部
P21 第1実装部
P22 第2実装部
P23 鍔部
P24 交線部
P31 第1実装部
P32 第2実装部
P33 第3実装部
P41 第1実装部
P42 第2実装部
P50 窪み
P60 凸部
S201 接続層
S202 フィレット
10 Conductor pin (first conductor pin)
10a Covering material 11 Mounting portion 11a Mounting portion 12 Gutter portion 13 Insertion portion 20 Conductor pin (second conductor pin)
DESCRIPTION OF SYMBOLS 21 Mounting part 22 Cage part 23 Insertion part 30 Conductor pin 30a Conductor 100 Electronic device 100a Mounting board 101-103 Conductor pin group 101a, 103a Conductor pin 201, 202 Semiconductor chip 201a, 202a Solder 500 Conductor pin 1000 Wiring board 1000a Solder 2000 Support substrate 2000a Hole 2001 First insulating layer 2002 Second insulating layer 2003 Third insulating layer 3000 Support substrate 3001 Mold C-axis F1 Mounting end F2 Insertion end F3 Side surface F5 Concavity and convexity P1 to P6 Intersection F11 First surface F12 First 2nd surface F30 Straight side surface F31 1st side surface F32 2nd side surface F41 1st side surface F42 2nd side surface P11 Tapered part P12 Straight part P14 Straight part P15 Tapered part P21 1st mounting part P22 2nd mounting part P23 2nd part P2 4 intersection part P31 1st mounting part P32 2nd mounting part P33 3rd mounting part P41 1st mounting part P42 2nd mounting part P50 hollow P60 convex part S201 connection layer S202 fillet

Claims (22)

第1の導体ピンと第2の導体ピンと支持基板とを有し、前記第1の導体ピンと前記第2の導体ピンの一端側に前記支持基板が接続され、前記第1の導体ピンと前記第2の導体ピンの他端側に電子部品を電気的に接続することができる実装用基板であって、
少なくとも前記第1の導体ピンは、側面が少なくとも前記他端側の第1の側面と前記一端側の第2の側面とで構成され、前記第1の側面と前記第2の側面とが交線部で、外側に膨らむように構成されている、
ことを特徴とする実装用基板。
A first conductor pin; a second conductor pin; and a support substrate; the support substrate is connected to one end of the first conductor pin and the second conductor pin; and the first conductor pin and the second conductor pin A mounting board capable of electrically connecting an electronic component to the other end of the conductor pin,
At least the first conductor pin has a side surface constituted by at least a first side surface on the other end side and a second side surface on the one end side, and the first side surface and the second side surface intersect each other. Configured to bulge outward at the part,
A mounting board characterized by that.
前記第1の側面と前記第2の側面との前記交線部は、前記第1の導体ピンの外周を周回する曲線に沿って形成された部分を有する、
ことを特徴とする請求項1に記載の実装用基板。
The intersection line portion between the first side surface and the second side surface has a portion formed along a curve that goes around the outer periphery of the first conductor pin.
The mounting substrate according to claim 1.
前記第1の側面と前記第2の側面との前記交線部は、前記第1の導体ピンの外周を周回する、
ことを特徴とする請求項2に記載の実装用基板。
The intersecting line portion between the first side surface and the second side surface goes around the outer periphery of the first conductor pin,
The mounting substrate according to claim 2.
前記第1の側面は、テーパ状に形成されている、
ことを特徴とする請求項1乃至3のいずれか一項に記載の実装用基板。
The first side surface is formed in a tapered shape,
The mounting substrate according to any one of claims 1 to 3.
前記第1の導体ピンの中心軸を含む断面において、前記第1の側面と前記中心軸のなす角は、5〜20°の範囲にある、
ことを特徴とする請求項4に記載の実装用基板。
In a cross section including the central axis of the first conductor pin, an angle formed by the first side surface and the central axis is in a range of 5 to 20 °.
The mounting substrate according to claim 4.
前記第1の側面は平面であり、前記第2の側面は円柱部分の側面である、
ことを特徴とする請求項1に記載の実装用基板。
The first side surface is a plane, and the second side surface is a side surface of a cylindrical portion.
The mounting substrate according to claim 1.
前記交線部は、前記第1の導体ピンの前記他端側端面から導体ピンの軸方向に0.2mmまでの範囲にある、
ことを特徴とする請求項1乃至6のいずれか一項に記載の実装用基板。
The intersecting line portion is in a range from the other end side end surface of the first conductor pin to 0.2 mm in the axial direction of the conductor pin.
The mounting substrate according to claim 1, wherein:
前記交線部において前記第1の側面と前記第2の側面のなす角度は、89〜170°の範囲にある、
ことを特徴とする請求項6又は7に記載の実装用基板。
The angle formed by the first side surface and the second side surface in the intersecting line portion is in a range of 89 to 170 °.
The mounting substrate according to claim 6 or 7, wherein
前記第1の導体ピンの少なくとも前記交線部の周辺は、被覆材で覆われている、
ことを特徴とする請求項1乃至8のいずれか一項に記載の実装用基板。
The periphery of at least the intersecting line portion of the first conductor pin is covered with a covering material,
The mounting substrate according to claim 1, wherein the mounting substrate is a mounting substrate.
前記被覆材の、前記交線部を覆う部分は、部分的に厚くなっている、
ことを特徴とする請求項9に記載の実装用基板。
The portion of the covering material that covers the intersecting line portion is partially thick.
The mounting substrate according to claim 9.
前記被覆材は、前記第1の導体ピンの前記交線部のみを覆っている、
ことを特徴とする請求項9又は10に記載の実装用基板。
The covering material covers only the intersecting line portion of the first conductor pin,
The mounting substrate according to claim 9 or 10, wherein:
前記被覆材は、電解めっき膜からなる、
ことを特徴とする請求項9乃至11のいずれか一項に記載の実装用基板。
The covering material is made of an electrolytic plating film.
The mounting substrate according to claim 9, wherein the mounting substrate is a mounting substrate.
前記第1の導体ピンは、銅、金、及びそれらの合金のいずれかからなり、
前記被覆材は、ニッケル、クロム、及び亜鉛のいずれかからなる、
ことを特徴とする請求項9乃至12のいずれか一項に記載の実装用基板。
The first conductor pin is made of any one of copper, gold, and alloys thereof,
The covering material is made of any of nickel, chromium, and zinc.
The mounting substrate according to claim 9, wherein the mounting substrate is a mounting substrate.
前記第2の導体ピンは、前記他端側が円柱形状である、
ことを特徴とする請求項1乃至13のいずれか一項に記載の実装用基板。
The second conductor pin has a cylindrical shape on the other end side.
The mounting substrate according to claim 1, wherein the mounting substrate is a mounting substrate.
前記第1の導体ピンは、前記第2の導体ピンよりも細い導体ピンである、
ことを特徴とする請求項14に記載の実装用基板。
The first conductor pin is a conductor pin thinner than the second conductor pin.
The mounting substrate according to claim 14.
前記第1の導体ピンは、複数で構成された第1の導体ピン群を構成し、
前記第1の導体ピン群は長さが揃っている、
ことを特徴とする請求項1乃至15のいずれか一項に記載の実装用基板。
The first conductor pins constitute a plurality of first conductor pin groups composed of a plurality of conductor pins,
The first conductor pin group has a uniform length,
The mounting substrate according to any one of claims 1 to 15, wherein
前記第2の導体ピンは、複数で構成された第2の導体ピン群を構成し、
前記第2の導体ピン群は長さが揃っている、
ことを特徴とする請求項1乃至16のいずれか一項に記載の実装用基板。
The second conductor pins constitute a plurality of second conductor pin groups composed of a plurality,
The second conductor pin group has the same length,
The mounting substrate according to claim 1, wherein the mounting substrate is a mounting substrate.
前記第1の導体ピン群は、前記第1の導体ピンの太さが揃っている、
ことを特徴とする請求項16に記載の実装用基板。
In the first conductor pin group, the thickness of the first conductor pin is uniform.
The mounting substrate according to claim 16.
前記第2の導体ピン群は、前記第2の導体ピンの太さが揃っている、
ことを特徴とする請求項17に記載の実装用基板。
The second conductor pin group has the same thickness as the second conductor pin.
The mounting substrate according to claim 17.
請求項1乃至19のいずれか一項に記載の実装用基板と、
前記第1の導体ピンの前記他端側と、前記第2の導体ピンの前記他端側と、に半田を介して電気的に接続された電子部品と、
を有する、
ことを特徴とする電子デバイス。
A mounting substrate according to any one of claims 1 to 19,
An electronic component electrically connected to the other end side of the first conductor pin and the other end side of the second conductor pin via solder;
Having
An electronic device characterized by that.
前記第1の導体ピンの少なくとも前記交線部は、被覆材で覆われており、
前記被覆材は、前記第1の導体ピンを構成する材料よりも、前記半田に対して濡れ性が低い導体からなる、
ことを特徴とする請求項20に記載の電子デバイス。
At least the intersecting portion of the first conductor pin is covered with a covering material;
The covering material is made of a conductor having lower wettability to the solder than the material constituting the first conductor pin.
The electronic device according to claim 20.
前記電子部品はトランジスタであり、
前記第1の導体ピンは、前記トランジスタのゲートに電気的に接続される、
ことを特徴とする請求項20又は21に記載の電子デバイス。
The electronic component is a transistor;
The first conductor pin is electrically connected to a gate of the transistor;
The electronic device according to claim 20 or 21, wherein
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