JP2014038993A - Core substrate and printed circuit board using the same - Google Patents

Core substrate and printed circuit board using the same Download PDF

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Publication number
JP2014038993A
JP2014038993A JP2012209320A JP2012209320A JP2014038993A JP 2014038993 A JP2014038993 A JP 2014038993A JP 2012209320 A JP2012209320 A JP 2012209320A JP 2012209320 A JP2012209320 A JP 2012209320A JP 2014038993 A JP2014038993 A JP 2014038993A
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Prior art keywords
core substrate
circuit board
printed circuit
members
insulating
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Yong Zhi Kim
ジ キム・ヨン
Kyoung Ro Yoon
ロ ユン・キュン
Joung Gul Ryu
ギョル リュ・ジョン
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4608Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated comprising an electrically conductive base or core
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09681Mesh conductors, e.g. as a ground plane

Abstract

PROBLEM TO BE SOLVED: To provide a core substrate which reduces distortion occurring during manufacturing processes and adjusts the degree of the distortion for each portion of a printed circuit board, and to provide the printed circuit board which uses the core substrate.SOLUTION: A core substrate 100 includes: at least one or more connection members 101 which are formed therein; multiple heat radiation members 103 which are formed being divided from each other and located adjacent to the connection members 101; and insulation members 105 formed between the multiple heat radiation members 103 which are formed being divided from each other and between the connection member 101 and the heat radiation member 103.

Description

本発明はコア基板及びこれを用いたプリント回路基板に関する。   The present invention relates to a core substrate and a printed circuit board using the same.

電子部品の小型化、高密度化、薄型化に伴い、半導体パッケージ基板に対する薄型化、高機能化の研究が活発に進められている。   As electronic components become smaller, denser, and thinner, research on thinner and higher-functionality semiconductor package substrates has been actively promoted.

特に、多数の半導体チップを一つの基板にスタックして実装する技術(MCP;Multi Chip Package)あるいはチップが実装された多数の基板をスタックする技術(POP;Package On Package)を具現するためには、チップと類似した水準の熱膨張挙動を有し、且つチップの実装後の歪み特性に優れた基板の開発が必要になった。   In particular, in order to implement a technology for stacking and mounting a large number of semiconductor chips on one substrate (MCP; Multi Chip Package) or a technology for stacking a large number of substrates on which chips are mounted (POP; Package On Package) Therefore, it is necessary to develop a substrate having a thermal expansion behavior similar to that of a chip and having excellent distortion characteristics after mounting the chip.

また、近年チップの高性能化に伴う動作速度の増加により、発熱の問題が深刻になっており、これによる基板の歪み問題に対する対策もまた至急必要な状態である。   In recent years, the problem of heat generation has become serious due to an increase in the operation speed accompanying the improvement in performance of the chip, and measures against the distortion problem of the substrate due to this are also in urgent need.

従って、基板上にチップを実装した後、チップの駆動によって発生する熱を外部に効果的に放出するために、熱伝導度に優れたメタルコアを挿入した基板を製造するようになった。   Therefore, after mounting the chip on the substrate, in order to effectively release the heat generated by driving the chip to the outside, a substrate having a metal core with excellent thermal conductivity inserted is manufactured.

しかし、前記メタルコアが挿入された基板を使用することにより、チップの駆動によって発生する熱を外部に効果的に放出することで、チップから発生する熱による基板の歪みを減少させることはできるが、メタルコアが挿入された基板の製造中に加えられる熱又は圧力に対する内側のメタルコアと、積層形成されるビルドアップ層との熱ひずみの差によって基板に歪みが生じる問題がある。   However, by using the substrate in which the metal core is inserted, it is possible to reduce the distortion of the substrate due to the heat generated from the chip by effectively releasing the heat generated by driving the chip to the outside. There is a problem that the substrate is distorted due to the difference in thermal strain between the inner metal core and the build-up layer formed by lamination with respect to heat or pressure applied during the manufacture of the substrate in which the metal core is inserted.

一方、米国特許第6828224号明細書には、従来技術によるメタルコアが挿入された基板構造についての開示がされている。   On the other hand, US Pat. No. 6,828,224 discloses a substrate structure in which a metal core according to the prior art is inserted.

特開2003−031719号公報JP 2003-031719 A

本発明の一つの目的は、製造工程中に発生する歪みを減少させることができるコア基板及びこれを用いたプリント回路基板を提供することにある。   One object of the present invention is to provide a core substrate and a printed circuit board using the same that can reduce distortion generated during the manufacturing process.

本発明の他の目的は、プリント回路基板の部分ごとに歪みの程度を調節できるコア基板及びこれを用いたプリント回路基板を提供することにある。   Another object of the present invention is to provide a core substrate capable of adjusting the degree of distortion for each portion of the printed circuit board and a printed circuit board using the core substrate.

本実施例によるコア基板は、少なくとも一つ以上形成された接続部材と、前記接続部材と隣接して複数個に分割形成された放熱部材と、この複数個に分割形成された放熱部材同士の間及び前記接続部材と前記放熱部材との間に形成された絶縁部材と、を含む。   The core substrate according to the present embodiment includes at least one or more connecting members, a plurality of heat dissipating members adjacent to the connecting members, and a plurality of heat dissipating members divided between the plurality of heat dissipating members. And an insulating member formed between the connecting member and the heat radiating member.

この際、前記接続部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができる。   In this case, the connecting member is at least any selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. Or one.

また、前記放熱部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができる。   The heat dissipation member is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. It can be one.

また、前記コア基板の厚さは30μm以下とすることができる。   The core substrate may have a thickness of 30 μm or less.

また、前記絶縁部材は格子状に形成され、前記放熱部材は前記格子状内に前記絶縁部材と接するように形成することができる。   The insulating member may be formed in a lattice shape, and the heat dissipation member may be formed in the lattice shape so as to be in contact with the insulating member.

また、前記放熱部材は格子状に形成され、前記絶縁部材は前記格子状内に前記放熱部材と接するように形成することができる。   The heat dissipating member may be formed in a lattice shape, and the insulating member may be formed in the lattice shape so as to be in contact with the heat dissipating member.

また、前記複数個の放熱部材はそれぞれ円柱状に形成することができる。   Further, each of the plurality of heat radiating members can be formed in a columnar shape.

また、本実施例によるプリント回路基板は、少なくとも一つ以上形成された接続部材と、前記接続部材と隣接して位置し、複数個に分割形成された放熱部材と、前記複数個に分割形成された放熱部材同士の間及び前記接続部材と前記放熱部材との間に形成された絶縁部材と、からなるコア基板と、前記コア基板上に形成された絶縁層と、前記絶縁層上に形成された回路パターンと、前記絶縁層に形成され、前記接続部材と前記回路パターンとを電気的に連結する第1ビアと、を含む。   In addition, the printed circuit board according to the present embodiment includes at least one connecting member, a heat dissipating member that is positioned adjacent to the connecting member, and is divided into a plurality of parts, and is divided into the plurality. An insulating member formed between the heat dissipating members and between the connecting member and the heat dissipating member, a core substrate formed on the core substrate, and an insulating layer formed on the insulating layer. And a first via formed in the insulating layer and electrically connecting the connection member and the circuit pattern.

この際、前記接続部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができる。   In this case, the connecting member is at least any selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. Or one.

また、前記放熱部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができる。   The heat dissipation member is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. It can be one.

また、前記コア基板の厚さは30μm以下とすることができる。   The core substrate may have a thickness of 30 μm or less.

また、前記絶縁層上に形成され、前記回路パターンの一部を露出させる開口部を有するソルダレジスト層をさらに含むことができる。   In addition, the semiconductor device may further include a solder resist layer formed on the insulating layer and having an opening that exposes a part of the circuit pattern.

また、前記開口部によって露出された回路パターン上に形成された表面処理層を、さらに含むことができる。   In addition, a surface treatment layer formed on the circuit pattern exposed through the opening may be further included.

また、前記コア基板に厚さ方向に組み込まれ、一面に電極が形成された電子部品と、前記回路パターンと前記電極とを電気的に連結する第2ビアと、をさらに含むことができる。   The electronic device may further include an electronic component that is incorporated in the core substrate in a thickness direction and has an electrode formed on one surface thereof, and a second via that electrically connects the circuit pattern and the electrode.

本発明によれば、プリント回路基板の内部に挿入されるコア基板中に放熱機能を果たす放熱部材を複数個に分割形成することで、外部から加えられる熱と圧力に対する放熱部材の残留応力を分散させ、プリント回路基板に生じる歪みを減少させることができる効果がある。   According to the present invention, by dissipating a plurality of heat dissipating members that perform a heat dissipating function in the core substrate inserted into the printed circuit board, the residual stress of the heat dissipating member is dispersed with respect to heat and pressure applied from the outside The distortion generated in the printed circuit board can be reduced.

また、本発明によれば、プリント回路基板全体に対して領域ごとに異なる放熱部材の分割数を適用することで、各領域別の歪みの程度を調節することができ、プリント回路基板の製造工程中に発生する様々な歪みの形態に対応することができる効果がある。   In addition, according to the present invention, the degree of distortion for each region can be adjusted by applying a different number of heat dissipation members for each region to the entire printed circuit board, and the printed circuit board manufacturing process There is an effect that it is possible to cope with various forms of distortion occurring in the inside.

本発明の一実施例によるコア基板の構造を示す断面図である。It is sectional drawing which shows the structure of the core board | substrate by one Example of this invention. 本発明の一実施例によるコア基板の放熱部材及び絶縁部材のパターン形状を図示した平面図である。3 is a plan view illustrating pattern shapes of a heat dissipation member and an insulating member of a core substrate according to an embodiment of the present invention. 本発明の一実施例によるプリント回路基板の構造を示す断面図である。1 is a cross-sectional view illustrating a structure of a printed circuit board according to an embodiment of the present invention. 図3のプリント回路基板に電子部品が組み込まれた(embedded)構造を示す断面図である。FIG. 4 is a cross-sectional view illustrating a structure in which an electronic component is embedded in the printed circuit board of FIG. 3.

本発明の目的、特定の利点及び新規の特徴は添付図面に係る以下の詳細な説明及び好ましい実施例によってさらに明らかになるであろう。本明細書において、各図面の構成要素に参照番号を付け加えるに際し、同一の構成要素に限っては、たとえ相違する図面に示されても、できるだけ同一の番号を付けるようにしていることに留意しなければならない。また、「一面」、「他面」、「第1」、「第2」などの用語は、一つの構成要素を他の構成要素から区別するために用いられるものであり、構成要素が前記用語によって限定されるものではない。以下、本発明を説明するにあたり、本発明の要旨を不明瞭にする可能性がある公知技術についての詳細な説明は省略する。   Objects, specific advantages and novel features of the present invention will become more apparent from the following detailed description and preferred embodiments with reference to the accompanying drawings. In this specification, when adding reference numerals to the components of each drawing, it is noted that the same components are given the same number as much as possible even if they are shown in different drawings. There must be. The terms “one side”, “other side”, “first”, “second” and the like are used to distinguish one component from another component, and the component is the term It is not limited by. Hereinafter, in describing the present invention, detailed descriptions of known techniques that may obscure the subject matter of the present invention are omitted.

以下、添付図面を参照して本発明の好ましい実施例を詳細に説明する。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

コア基板
図1は本発明の一実施例によるコア基板の構造を示す断面図であり、図2は図1のコア基板における放熱部材及び絶縁部材形状を図示した平面図である。
Core Substrate FIG. 1 is a cross-sectional view illustrating a structure of a core substrate according to an embodiment of the present invention, and FIG. 2 is a plan view illustrating shapes of heat dissipation members and insulating members in the core substrate of FIG.

図1を参照すると、本実施例によるコア基板100は、接続部材101と、前記接続部材101と隣接して形成され、複数個に分割形成された放熱部材103と、前記複数個に分割形成された放熱部材103同士の間及び前記接続部材101と放熱部材103との間に形成された絶縁部材105と、を含むことができる。   Referring to FIG. 1, a core substrate 100 according to the present embodiment is formed with a connection member 101, a heat dissipation member 103 formed adjacent to the connection member 101 and divided into a plurality, and the plurality of divisions. Insulating members 105 formed between the heat dissipation members 103 and between the connecting member 101 and the heat dissipation member 103 can be included.

本実施例において、接続部材101は、図3に図示したように、後続工程によりコア基板100上に形成される絶縁層201に形成される第1ビア203と電気的に連結され、回路パターン205の層間接続のためのブリッジ機能を果たすものである。   In this embodiment, as shown in FIG. 3, the connection member 101 is electrically connected to the first via 203 formed in the insulating layer 201 formed on the core substrate 100 in the subsequent process, and the circuit pattern 205 is connected. It serves as a bridge function for the interlayer connection.

本実施例において、接続部材101は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができるが、特にこれに限定されるものではない。   In this embodiment, the connection member 101 is selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. Although it can be at least any one, it is not specifically limited to this.

本実施例において、放熱部材103は、図1のように、接続部材101に隣接して形成されるが、複数個に分割することができる。   In this embodiment, the heat radiating member 103 is formed adjacent to the connecting member 101 as shown in FIG. 1, but can be divided into a plurality of parts.

ここで、放熱部材103は、上述した接続部材101と同様に、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができるが、特にこれに限定されるものではない。   Here, the heat radiating member 103 is copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof in the same manner as the connecting member 101 described above. It can be at least one selected from the group consisting of, but is not particularly limited to this.

従来技術によるコア基板の放熱部材は、本発明のように分割形成されていない。これに起因して、従来コア基板を用いてプリント回路基板を製造する際、製品に加えられる熱又は圧力に対する放熱部材の残留応力によってプリント回路基板に歪みが生じ得る。   The heat dissipation member of the core substrate according to the prior art is not divided and formed as in the present invention. For this reason, when a printed circuit board is manufactured using a conventional core substrate, the printed circuit board may be distorted by the residual stress of the heat dissipation member with respect to heat or pressure applied to the product.

即ち、プリント回路基板の製造時に、製品には熱又は圧力が加えられ得るが、メタルからなるコア基板と、絶縁材及びメタルからなるビルドアップ層との間の熱ひずみが互いに異なる結果、製造されるプリント回路基板に歪みが生じる。   That is, when a printed circuit board is manufactured, heat or pressure may be applied to the product, but the product is manufactured as a result of different thermal strains between the core substrate made of metal and the build-up layer made of insulating material and metal. The printed circuit board is distorted.

従って、本実施例のように、熱ひずみが相対的に大きいメタルからなる放熱部材103を複数個に分割し、放熱部材103同士の間に熱ひずみが相対的に小さい絶縁部材105を形成することで、従来、一箇所に集中する残留応力を、コア基板100全体に分散することができる。   Therefore, as in this embodiment, the heat radiating member 103 made of a metal having a relatively large thermal strain is divided into a plurality of parts, and the insulating member 105 having a relatively small thermal strain is formed between the heat radiating members 103. Therefore, conventionally, residual stress concentrated in one place can be dispersed throughout the core substrate 100.

このように、コア基板100の一箇所に集中した残留応力を分散させることで、後続工程により形成されるプリント回路基板のひずみ挙動の程度を調節することができる。   In this way, by dispersing the residual stress concentrated on one location of the core substrate 100, the degree of strain behavior of the printed circuit board formed by the subsequent process can be adjusted.

この際、放熱部材103の分割数は、状況に応じて調節することができる。   At this time, the number of divisions of the heat dissipation member 103 can be adjusted according to the situation.

例えば、プリント回路基板200を全体的に平坦に形成するために、歪みの程度を最小化すべき領域と最大化すべき領域が存在する場合、該領域に位置する放熱部材103の分割数を適宜調節することで、領域別の歪みの程度を最小化又は最大化することができる。   For example, in order to form the printed circuit board 200 to be flat as a whole, when there are a region where the degree of distortion should be minimized and a region where the degree of distortion exists, the number of divisions of the heat radiation member 103 located in the region is appropriately adjusted. Thus, the degree of distortion for each region can be minimized or maximized.

また、上述したように、単純に領域別に放熱部材103の分割数を調節することもでき、又は、領域別に放熱部材103と絶縁部材105の面積を調節することもまた可能であると言える。   Further, as described above, it can be said that the number of divisions of the heat dissipation member 103 can be simply adjusted for each region, or the areas of the heat dissipation member 103 and the insulating member 105 can be adjusted for each region.

また、本実施例によるコア基板100は、複数個に分割形成された各放熱部材103同士の間及び放熱部材103と接続部材101との間に形成された絶縁部材105を含むことができる。   In addition, the core substrate 100 according to the present embodiment may include an insulating member 105 formed between the heat radiating members 103 divided into a plurality of pieces and between the heat radiating member 103 and the connecting member 101.

前記絶縁部材105を介して複数個に分割形成された各放熱部材103、放熱部材103と接続部材101を電気的に絶縁することができる。   Each heat dissipating member 103 divided into a plurality of parts via the insulating member 105, the heat dissipating member 103 and the connecting member 101 can be electrically insulated.

このような絶縁部材105は、メタルコアの一部をエッチングして貫通孔(不図示)を形成し、絶縁材を前記貫通孔(不図示)に充填することで形成することができるが、これは一つの実施例に過ぎず、その方法は特にこれに限定されるものではない。   The insulating member 105 can be formed by etching a part of the metal core to form a through hole (not shown) and filling the through hole (not shown) with an insulating material. This is only one example, and the method is not particularly limited to this.

この際、図2(a)に図示したように、放熱部材103は格子状に形成され、絶縁部材105は、前記格子状内に放熱部材103と接するように形成することができる。   At this time, as shown in FIG. 2A, the heat dissipating member 103 is formed in a lattice shape, and the insulating member 105 can be formed in contact with the heat dissipating member 103 in the lattice shape.

又は、図2(b)に図示したように、上述した形状とは反対に、絶縁部材105が格子状に形成され、放熱部材103は、前記格子状内に絶縁部材105と接するように形成することができる。   Alternatively, as illustrated in FIG. 2B, the insulating member 105 is formed in a lattice shape, and the heat dissipating member 103 is formed in contact with the insulating member 105 in the lattice shape, contrary to the shape described above. be able to.

又は、図2(c)に図示したように、複数個の放熱部材103を、それぞれ円柱状をなし、絶縁部材105に離隔するように形成することができる。   Alternatively, as illustrated in FIG. 2C, the plurality of heat radiating members 103 can each be formed in a columnar shape and separated from the insulating member 105.

本実施例によるコア基板100の放熱部材103及び絶縁部材105の形状は、上述した例に限定されず、様々な形態に具現できることは勿論である。   Of course, the shapes of the heat dissipating member 103 and the insulating member 105 of the core substrate 100 according to the present embodiment are not limited to the above-described examples, and can be embodied in various forms.

ここで、絶縁部材105としては、樹脂絶縁材を用いることが可能である。前記樹脂絶縁材としては、エポキシ樹脂のような熱硬化性樹脂、ポリイミドのような熱可塑性樹脂、又はこれらにガラス繊維又は無機フィラーのような補強材が含浸された樹脂、例えば、プリプレグを用いることができ、また熱硬化性樹脂及び/又は光硬化性樹脂などを用いることができるが、特にこれに限定されるものではない。   Here, as the insulating member 105, a resin insulating material can be used. As the resin insulating material, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a resin impregnated with a reinforcing material such as glass fiber or inorganic filler, for example, a prepreg is used. In addition, a thermosetting resin and / or a photocurable resin can be used, but it is not particularly limited thereto.

本実施例において、コア基板100の厚さは30μm以下とすることができるが、特にこれに限定されるものではない。   In the present embodiment, the thickness of the core substrate 100 can be 30 μm or less, but is not particularly limited thereto.

これは、最近薄板化しつつあるプリント回路基板において、その内部に挿入されるコア基板の厚さもまた薄くなることが好ましいためであり、万一、コア基板の厚さが従来と同一であり、コア基板上に形成されたビルドアップ層のみが薄板化されると、コア基板の熱ひずみがビルドアップ層の熱ひずみよりはるかに大きくなり、プリント回路基板に歪みが生じ得るためである。   This is because the thickness of the core substrate inserted into the printed circuit board that has been thinned recently is also preferably reduced. In the unlikely event that the thickness of the core board is the same as the conventional one, This is because when only the buildup layer formed on the substrate is thinned, the thermal strain of the core substrate becomes much larger than the thermal strain of the buildup layer, and the printed circuit board may be distorted.

プリント回路基板
図3は、本発明の一実施例によるプリント回路基板の構造を示す断面図である。
Printed Circuit Board FIG. 3 is a cross-sectional view illustrating the structure of a printed circuit board according to an embodiment of the present invention.

図3を参照すると、本実施例によるプリント回路基板200は、接続部材101と、前記接続部材101と隣接して位置して複数個に分割形成された放熱部材103と、この複数個に分割形成された放熱部材103同士の間及び前記接続部材101と前記放熱部材103との間に形成された絶縁部材105と、からなるコア基板100、並びに、コア基板100上に形成された絶縁層201と、絶縁層201上に形成された回路パターン205と、絶縁層201に形成され、前記接続部材101と前記回路パターン205とを電気的に連結する第1ビア203、を含むことができる。   Referring to FIG. 3, the printed circuit board 200 according to the present embodiment includes a connection member 101, a heat dissipating member 103 positioned adjacent to the connection member 101 and divided into a plurality of pieces, and the plurality of divided members. A core substrate 100 composed of insulating members 105 formed between the heat dissipation members 103 and between the connection member 101 and the heat dissipation member 103, and an insulating layer 201 formed on the core substrate 100. The circuit pattern 205 formed on the insulating layer 201 and the first via 203 formed on the insulating layer 201 and electrically connecting the connection member 101 and the circuit pattern 205 may be included.

また、図面上に示されてはいないが、コア基板100上には絶縁層201との接着信頼性を向上させるための表面処理層(不図示)を形成することができる。この際、前記表面処理層(不図示)は、酸化被膜層、Cuスパッタ(sputter)又は銅めっき層とすることができるが、特にこれに限定されるものではない。   Although not shown in the drawing, a surface treatment layer (not shown) for improving the adhesion reliability with the insulating layer 201 can be formed on the core substrate 100. At this time, the surface treatment layer (not shown) may be an oxide film layer, a Cu sputter, or a copper plating layer, but is not particularly limited thereto.

本実施例において、コア基板100は、図3に示したように、半導体チップを実装するためのプリント回路基板200内に挿入され、実装される半導体チップの作動時に半導体チップから発生する熱を外部に放出することでプリント回路基板200の歪みを防止することができる。   In the present embodiment, as shown in FIG. 3, the core substrate 100 is inserted into the printed circuit board 200 for mounting the semiconductor chip, and heat generated from the semiconductor chip during the operation of the mounted semiconductor chip is externally applied. The distortion of the printed circuit board 200 can be prevented.

本実施例において、コア基板100は、少なくとも一つ以上形成された接続部材101と、接続部材101に隣接して複数個に分割形成された放熱部材103と、複数個に分割形成された放熱部材103同士の間及び接続部材101と放熱部材103との間に形成された絶縁部材105と、からなることができる。   In this embodiment, the core substrate 100 includes at least one connecting member 101, a plurality of heat dissipating members 103 adjacent to the connecting member 101, and a plurality of heat dissipating members. And an insulating member 105 formed between the connecting members 101 and the heat dissipating member 103.

ここで、接続部材101は、絶縁層201に形成される第1ビア203と電気的に連結されることで、回路パターン205の層間の接続のためのブリッジとしての機能を果たすことができる。   Here, the connection member 101 can function as a bridge for connection between the layers of the circuit pattern 205 by being electrically connected to the first via 203 formed in the insulating layer 201.

また、接続部材101は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができるが、特にこれに限定されるものではない。   The connecting member 101 is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. Although it can be one, it is not limited to this.

また、放熱部材103は、以降にプリント回路基板200上に実装される半導体チップ(不図示)の駆動時に、半導体チップ(不図示)から発生する熱を効果的に放出する機能を果たす。   In addition, the heat radiating member 103 functions to effectively release heat generated from the semiconductor chip (not shown) when the semiconductor chip (not shown) mounted on the printed circuit board 200 is driven thereafter.

本実施例において、放熱部材103は、前記接続部材101と同様に、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つとすることができるが、特にこれに限定されるものではない。   In this embodiment, the heat radiating member 103 is made of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and the like, like the connecting member 101. Although it can be set to at least one selected from the group consisting of alloys, it is not particularly limited to this.

本実施例において、放熱部材103は、図3に示したように、接続部材101に隣接して形成されるが、複数個に分割することができる。   In this embodiment, the heat dissipating member 103 is formed adjacent to the connecting member 101 as shown in FIG. 3, but can be divided into a plurality of parts.

従来技術によるコア基板の放熱部材は、本発明のように分割形成されない。そのため、従来、コア基板を用いてプリント回路基板を製造する際、製品に加えられる熱又は圧力に対する放熱部材の残留応力によってプリント回路基板に歪みが生じ得る。   The heat dissipating member of the core substrate according to the prior art is not divided and formed as in the present invention. Therefore, conventionally, when a printed circuit board is manufactured using a core substrate, the printed circuit board may be distorted by the residual stress of the heat dissipation member with respect to heat or pressure applied to the product.

即ち、プリント回路基板の製造時に、製品には熱又は圧力が加えられ得るが、メタルからなるコア基板と、絶縁材及びメタルからなるビルドアップ層との間の熱ひずみが互いに異なり、製造されるプリント回路基板には歪みが生じる。   That is, when the printed circuit board is manufactured, heat or pressure can be applied to the product, but the thermal strain between the core substrate made of metal and the build-up layer made of insulating material and metal is different and manufactured. The printed circuit board is distorted.

これにより、本実施例のように、熱ひずみが相対的に大きいメタルからなる放熱部材103を複数個に分割し、放熱部材103同士の間に、熱ひずみが相対的に小さい絶縁部材105を形成することで、従来の一箇所に集中する残留応力を、コア基板100全体に分散させることができる。   Thus, as in this embodiment, the heat radiating member 103 made of metal having relatively large thermal strain is divided into a plurality of parts, and the insulating member 105 having relatively small thermal strain is formed between the heat radiating members 103. By doing so, the residual stress concentrated in one conventional location can be dispersed throughout the core substrate 100.

このように、コア基板100の一箇所に集中した残留応力を分散させることで、後続工程により形成されるプリント回路基板のひずみ挙動の程度を調節することができる。   In this way, by dispersing the residual stress concentrated on one location of the core substrate 100, the degree of strain behavior of the printed circuit board formed by the subsequent process can be adjusted.

この際、放熱部材103の分割数は、状況に応じて調節することができる。   At this time, the number of divisions of the heat dissipation member 103 can be adjusted according to the situation.

例えば、プリント回路基板200を全体的に平坦に形成するために歪みの程度を最小化すべき領域と最大化すべき領域とが存在する場合、該領域に位置する放熱部材103の分割数を適宜調節することで、領域別の歪みの程度を最小化又は最大化することができる。   For example, when there are a region where the degree of distortion should be minimized and a region where the degree of distortion exists in order to form the printed circuit board 200 as a whole flat, the number of divisions of the heat radiation member 103 located in the region is appropriately adjusted. Thus, the degree of distortion for each region can be minimized or maximized.

また、上述したように、単純に領域別で放熱部材103の分割数を調節することもでき、又は、領域別に放熱部材103及び絶縁部材105の面積を調節することもまた可能であると言える。   Further, as described above, it can be said that the number of divisions of the heat dissipation member 103 can be simply adjusted for each region, or the areas of the heat dissipation member 103 and the insulating member 105 can be adjusted for each region.

本実施例では各放熱部材103同士の間だけでなく、放熱部材103と接続部材101との間にも絶縁部材105が形成され、放熱部材103と接続部材101とを電気的に絶縁させる。   In this embodiment, an insulating member 105 is formed not only between the heat radiating members 103 but also between the heat radiating member 103 and the connecting member 101, and the heat radiating member 103 and the connecting member 101 are electrically insulated.

このような絶縁部材105は、メタルコアの一部をエッチングして貫通孔(不図示)を形成し、絶縁材を前記貫通孔(不図示)に充填することで形成することができるが、これは一つの実施例に過ぎず、その方法は特にこれに限定されるものではない。   The insulating member 105 can be formed by etching a part of the metal core to form a through hole (not shown) and filling the through hole (not shown) with an insulating material. This is only one example, and the method is not particularly limited to this.

この際、図2(a)に示したように、放熱部材103は格子状に形成され、絶縁部材105は前記格子状内に放熱部材103と接するように形成することができる。   At this time, as shown in FIG. 2A, the heat dissipating member 103 is formed in a lattice shape, and the insulating member 105 can be formed in contact with the heat dissipating member 103 in the lattice shape.

又は、図2(b)に示したように、上述した形状とは反対に、絶縁部材105が格子状に形成され、放熱部材103は前記格子状内に絶縁部材105と接するように形成することができる。   Alternatively, as shown in FIG. 2B, the insulating member 105 is formed in a lattice shape, and the heat dissipating member 103 is formed in contact with the insulating member 105 in the lattice shape, contrary to the shape described above. Can do.

又は、図2(c)に示したように、複数個の放熱部材103がそれぞれ円柱状をなし、絶縁部材105に離隔して形成されることができる。   Alternatively, as shown in FIG. 2C, the plurality of heat radiating members 103 may each be formed in a columnar shape and separated from the insulating member 105.

本実施例によるコア基板100の放熱部材103、及び絶縁部材105の形状は、上述した例に限定されるものではなく、様々な形態に具現することができることは言うまでもない。   Needless to say, the shapes of the heat dissipating member 103 and the insulating member 105 of the core substrate 100 according to the present embodiment are not limited to the above-described examples, and can be embodied in various forms.

ここで、絶縁部材105としては樹脂絶縁材が用いることができる。前記樹脂絶縁材としてはエポキシ樹脂のような熱硬化性樹脂、ポリイミドのような熱可塑性樹脂、又はこれらにガラス繊維又は無機フィラーのような補強材が含浸された樹脂、例えば、プリプレグが用いることができ、また熱硬化性樹脂及び/又は光硬化性樹脂などを用いることができるが、特にこれに限定されるものではない。   Here, a resin insulating material can be used as the insulating member 105. As the resin insulating material, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a resin impregnated with a reinforcing material such as glass fiber or an inorganic filler, for example, a prepreg is used. In addition, a thermosetting resin and / or a photocurable resin can be used, but is not particularly limited thereto.

本実施例において、コア基板100の厚さは30μm以下とすることができるが、特にこれに限定されるものではない。   In the present embodiment, the thickness of the core substrate 100 can be 30 μm or less, but is not particularly limited thereto.

これは、最近薄板化しつつあるプリント回路基板において、その内部に挿入されるコア基板の厚さもまた薄いことが好ましいためであり、万一、コア基板の厚さが従来と同一であり、コア基板上に形成されたビルドアップ層のみが薄板化されると、コア基板の熱ひずみがビルドアップ層の熱ひずみよりはるかに大きいため、プリント回路基板に歪みが発生し得るためである。   This is because the thickness of the core substrate inserted into the printed circuit board, which is being thinned recently, is also preferably thin. This is because when only the build-up layer formed thereon is thinned, the printed circuit board may be distorted because the thermal strain of the core substrate is much larger than the thermal strain of the build-up layer.

本実施例によるプリント回路基板200は、コア基板100上に形成された絶縁層201、及びこの絶縁層201に形成された第1ビア203と回路パターン205をさらに含むことができる。   The printed circuit board 200 according to the present embodiment may further include an insulating layer 201 formed on the core substrate 100, and a first via 203 and a circuit pattern 205 formed in the insulating layer 201.

図3では、コア基板100の両面にそれぞれ絶縁層201、第1ビア203及び回路パターン205を含むビルドアップ層が形成されることを示しているが、特にこれに限定されるものではなく、コア基板100の一面のみにビルドアップ層を形成することもまた可能であると言える。   FIG. 3 shows that build-up layers each including the insulating layer 201, the first via 203, and the circuit pattern 205 are formed on both surfaces of the core substrate 100. However, the present invention is not limited to this. It can also be said that it is possible to form a build-up layer only on one side of the substrate 100.

また、本実施例では、コア基板100の両面にそれぞれ1層のビルドアップ層が形成されることを示しているが、2層以上のビルドアップ層を形成することもまた可能であると言える。   Further, in this embodiment, it is shown that one build-up layer is formed on each side of the core substrate 100, but it can be said that it is also possible to form two or more build-up layers.

ここで、絶縁層201は、上述した絶縁部材105と同様に、樹脂絶縁材を用いることができるが、特にこれに限定されるものではない。   Here, as with the insulating member 105 described above, a resin insulating material can be used for the insulating layer 201, but the insulating layer 201 is not particularly limited thereto.

本実施例において、絶縁層201に、第1ビア203及び回路パターン205を形成する過程は、次の通りである。   In this embodiment, the process of forming the first via 203 and the circuit pattern 205 in the insulating layer 201 is as follows.

絶縁層201のうちコア基板100の接続部材101に対応する位置にビアホール(不図示)を加工した後、前記ビアホール(不図示)の内壁を含み絶縁層201上にシード層(不図示)を形成し、前記シード層(不図示)上に回路パターン205形成用の開口部を有するメッキレジストパターン(不図示)を形成する。   After processing a via hole (not shown) at a position corresponding to the connecting member 101 of the core substrate 100 in the insulating layer 201, a seed layer (not shown) is formed on the insulating layer 201 including the inner wall of the via hole (not shown). A plating resist pattern (not shown) having an opening for forming a circuit pattern 205 is formed on the seed layer (not shown).

その後、メッキ工程を実施して、前記回路パターン205の形成用の開口部にメッキ層を形成し、前記メッキレジストパターン(不図示)を除去した後、露出されたシード層(不図示)を除去することで、第1ビア203及び回路パターン205を形成することができる。   Thereafter, a plating process is performed to form a plating layer in the opening for forming the circuit pattern 205. After removing the plating resist pattern (not shown), the exposed seed layer (not shown) is removed. Thus, the first via 203 and the circuit pattern 205 can be formed.

ここで、前記シード層及びメッキ層は、それぞれ無電解メッキ法及び電解メッキ法により形成することができ、前記ビアホールの加工及びメッキレジストパターンに形成は既に当業界において公知の技術であるため、その詳細な説明は省略する。   Here, the seed layer and the plating layer can be formed by an electroless plating method and an electrolytic plating method, respectively, and the processing of the via hole and the formation of a plating resist pattern are already known in the art. Detailed description is omitted.

また、本実施例によるプリント回路基板200は絶縁層201上に形成され、回路パターン205の、例えば、パッド(pad)になる部分を露出させる開口部210aを有するソルダレジスト層210をさらに含むことができる。   The printed circuit board 200 according to the present embodiment further includes a solder resist layer 210 having an opening 210a that is formed on the insulating layer 201 and exposes a portion of the circuit pattern 205 that becomes, for example, a pad. it can.

ソルダレジスト層210は、最外層回路を保護する保護層の機能を果たし、電気的な絶縁のために形成されるものである。前記ソルダレジスト層210は、当業界において公知であり、例えば、ソルダレジストインク、ソルダレジストフィルム又はカプセル化剤などで構成することができるが、特にこれに限定されるものではない。   The solder resist layer 210 functions as a protective layer that protects the outermost layer circuit, and is formed for electrical insulation. The solder resist layer 210 is known in the art, and may be composed of, for example, a solder resist ink, a solder resist film, or an encapsulating agent, but is not particularly limited thereto.

また、本実施例によるプリント回路基板200は、ソルダレジスト層210の開口部210aによって露出した回路パターン205上に形成された表面処理層(不図示)をさらに含むことができる。   Further, the printed circuit board 200 according to the present embodiment may further include a surface treatment layer (not shown) formed on the circuit pattern 205 exposed through the opening 210a of the solder resist layer 210.

前記表面処理層(不図示)は、回路パターン205の酸化防止及び以降に接続される半導体チップバンプとの結合力を高めるために形成されるものであって、当業界において公知のものであれば特に限定されず、例えば、電解金メッキ(Electro Gold Plating)、無電解金メッキ(Immersion Gold Plating)、OSP(Organic Solderability Preservative)、又は無電解スズメッキ(Immersion Tin Plating)、無電解銀メッキ(Immersion Silver Plating)、ENIG(Electroless Nickel and immersion gold;無電解ニッケルメッキ/置換金メッキ)、DIGメッキ(Direct Immersion Gold Plating)、HASL(Hot Air Solder Levelling)などによって形成することができる。   The surface treatment layer (not shown) is formed in order to prevent the circuit pattern 205 from being oxidized and to increase the bonding strength with the semiconductor chip bumps to be connected thereafter. There is no particular limitation, for example, electrolytic gold plating, electroless gold plating, OSP (Organic Solderability Preservative), or electroless tin plating (Immersion Tin Plating), electroless silver plating I , ENIG (Electroless Nickel and immersion gold; electroless nickel plating / displacement gold plating), DIG plating (D It can be formed by direct immersion gold plating (HA) or HASL (hot air solder leveling).

一方、図4には、電子部品が組み込まれた(embedded)プリント回路基板の構造を示す。   On the other hand, FIG. 4 shows the structure of a printed circuit board in which electronic components are embedded.

ここで、前記プリント回路基板は、図3に示したプリント回路基板と同一の構造を有するため、図3のプリント回路基板に対応する同一の構成に対する説明は省略する。   Here, since the printed circuit board has the same structure as the printed circuit board shown in FIG. 3, the description of the same configuration corresponding to the printed circuit board of FIG. 3 is omitted.

図4を参照すると、本実施例によるプリント回路基板300は、図3に示すプリント回路基板200のコア基板100に厚さ方向に組み込まれた(embedded)電子部品310を、さらに含むことができる。   Referring to FIG. 4, the printed circuit board 300 according to the present embodiment may further include an electronic component 310 that is embedded in the thickness direction of the core substrate 100 of the printed circuit board 200 illustrated in FIG. 3.

この際、電子部品310の一面には、回路パターン205に連結される電極311を形成することができ、絶縁層201には、回路パターン205と電子部品310の電極311とを電気的に連結する第2ビア313を形成することができる。   At this time, an electrode 311 connected to the circuit pattern 205 can be formed on one surface of the electronic component 310, and the circuit pattern 205 and the electrode 311 of the electronic component 310 are electrically connected to the insulating layer 201. A second via 313 can be formed.

また、コア基板100に組み込まれた(embedded)電子部品310と接続部材101との間の放熱部材103は、図4に示すように、二つ以上に分割することができるが、特にこれに限定されるものではない。   Further, the heat dissipating member 103 between the electronic component 310 embedded in the core substrate 100 and the connecting member 101 can be divided into two or more as shown in FIG. Is not to be done.

以上、本発明を具体的な実施例に基づいて詳細に説明したが、これは本発明を具体的に説明するためのものであり、本発明はこれに限定されず、該当分野における通常の知識を有する者であれば、本発明の技術的思想内にての変形や改良が可能であることは明白であろう。   As described above, the present invention has been described in detail based on the specific embodiments. However, the present invention is only for explaining the present invention, and the present invention is not limited thereto. It will be apparent to those skilled in the art that modifications and improvements within the technical idea of the present invention are possible.

本発明の単純な変形乃至変更はいずれも本発明の領域に属するものであり、本発明の具体的な保護範囲は添付の特許請求の範囲により明確になるであろう。   All simple variations and modifications of the present invention belong to the scope of the present invention, and the specific scope of protection of the present invention will be apparent from the appended claims.

100 コア基板
101 接続部材
103 放熱部材
105 絶縁部材
200、300 プリント回路基板
201 絶縁層
203 第1ビア
205 回路パターン
210 ソルダレジスト層
210a 開口部
310 電子部品
311 電極
313 第2ビア
DESCRIPTION OF SYMBOLS 100 Core board | substrate 101 Connection member 103 Heat dissipation member 105 Insulation member 200, 300 Printed circuit board 201 Insulation layer 203 1st via | veer 205 Circuit pattern 210 Solder resist layer 210a Opening part 310 Electronic component 311 Electrode 313 2nd via | veer

Claims (14)

少なくとも一つ以上形成された接続部材と、
前記接続部材と隣接して位置し、複数個に分割形成された放熱部材と、
前記複数個に分割形成された放熱部材同士の間、及び前記接続部材と前記放熱部材との間に形成された絶縁部材と、
を含む、コア基板。
At least one connecting member formed;
A heat dissipating member located adjacent to the connecting member and divided into a plurality of parts;
Insulating members formed between the plurality of heat dissipation members divided and formed between the connection member and the heat dissipation member,
Including a core substrate.
前記接続部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つである、請求項1に記載のコア基板。   The connection member is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. The core substrate according to claim 1, wherein 前記放熱部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つである、請求項1に記載のコア基板。   The heat dissipation member is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. The core substrate according to claim 1, wherein 前記コア基板の厚さは30μm以下である、請求項1に記載のコア基板。   The core substrate according to claim 1, wherein the core substrate has a thickness of 30 μm or less. 前記絶縁部材は格子状に形成され、前記放熱部材は前記格子状内に前記絶縁部材と接するように形成される、請求項1に記載のコア基板。   The core substrate according to claim 1, wherein the insulating member is formed in a lattice shape, and the heat radiating member is formed in contact with the insulating member in the lattice shape. 前記放熱部材は格子状に形成され、前記絶縁部材は前記格子状内に前記放熱部材と接するように形成される、請求項1に記載のコア基板。   The core substrate according to claim 1, wherein the heat radiating member is formed in a lattice shape, and the insulating member is formed in the lattice shape so as to be in contact with the heat radiating member. 前記複数個の放熱部材はそれぞれ円柱状に形成される、請求項1に記載のコア基板。   The core substrate according to claim 1, wherein each of the plurality of heat dissipation members is formed in a columnar shape. 少なくとも一つ以上形成された接続部材、この接続部材に隣接して複数個に分割形成された放熱部材、並びにこの複数個に分割形成された放熱部材同士の間及び前記接続部材と前記放熱部材との間に形成された絶縁部材、からなるコア基板と、
前記コア基板上に形成された絶縁層と、
前記絶縁層上に形成された回路パターンと、
前記絶縁層に形成され、前記接続部材と前記回路パターンとを電気的に連結する第1ビアと、
を含む、プリント回路基板。
At least one or more connecting members formed, a plurality of heat dissipating members adjacent to the connecting member, and between the heat dissipating members divided into a plurality of members, and the connecting member and the heat dissipating member A core substrate made of an insulating member formed between
An insulating layer formed on the core substrate;
A circuit pattern formed on the insulating layer;
A first via formed in the insulating layer and electrically connecting the connection member and the circuit pattern;
Including a printed circuit board.
前記接続部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つである、請求項8に記載のプリント回路基板。   The connection member is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. The printed circuit board according to claim 8, wherein 前記放熱部材は、銅(Cu)、ニッケル(Ni)、タングステン(W)、モリブデン(Mo)、タンタル(Ta)、アルミニウム(Al)及びこれらの合金からなる群から選択される少なくとも何れか一つである、請求項8に記載のプリント回路基板。   The heat dissipation member is at least one selected from the group consisting of copper (Cu), nickel (Ni), tungsten (W), molybdenum (Mo), tantalum (Ta), aluminum (Al), and alloys thereof. The printed circuit board according to claim 8, wherein 前記コア基板の厚さは30μm以下である、請求項8に記載のプリント回路基板。   The printed circuit board according to claim 8, wherein the core board has a thickness of 30 μm or less. 前記絶縁層上に形成され、前記回路パターンの一部を露出させる開口部を有するソルダレジスト層をさらに含む、請求項8に記載のプリント回路基板。   The printed circuit board according to claim 8, further comprising a solder resist layer formed on the insulating layer and having an opening that exposes a part of the circuit pattern. 前記開口部によって露出された回路パターン上に形成された表面処理層をさらに含む、請求項12に記載のプリント回路基板。   The printed circuit board according to claim 12, further comprising a surface treatment layer formed on the circuit pattern exposed by the opening. 前記コア基板に厚さ方向に組み込まれ、一面に電極が形成された電子部品と、
前記回路パターンと前記電極とを電気的に連結する第2ビアと、
をさらに含む、請求項8に記載のプリント回路基板。
An electronic component incorporated in the core substrate in the thickness direction and having electrodes formed on one surface;
A second via that electrically connects the circuit pattern and the electrode;
The printed circuit board according to claim 8, further comprising:
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