JP2012518971A - 低損失増幅器 - Google Patents
低損失増幅器 Download PDFInfo
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Abstract
Description
本出願は、2009年2月25日に出願された米国仮特許出願第61/155,382号(代理人整理番号第157835−0041号)に基づく優先権を主張しその出願日の利益を享受するものであり、そのすべての開示内容は参照により本願明細書に援用したものとする。
Claims (44)
- 入力源信号を受信するための第1の増幅器と、
前記第1の増幅器から下流にある第2の増幅器と、
(i)前記第1の増幅器の出力及び前記第2の増幅器の出力から前記第1の増幅器の入力までの帰還経路、(ii)前記第2の増幅器の前記出力から負荷までの第1の結合経路、並びに(iii)前記第1の増幅器の前記出力から前記負荷までの第2の結合経路を提供する複数のインピーダンス回路網と、
を備え、
前記インピーダンス回路網は全て、抵抗器、コンデンサ、又はそれらの組み合わせの回路網で構成される、増幅器。 - 前記第1の結合経路を提供する第1のインピーダンス回路網は、前記第2の増幅器の前記出力と前記負荷との間に接続される抵抗器を含む、請求項1に記載の増幅器。
- 前記第1の増幅器の前記出力から前記第1の増幅器の前記入力までの第1の帰還経路を提供する、前記複数のインピーダンス回路網のうちの第2のインピーダンス回路網はコンデンサを含む、請求項2に記載の増幅器。
- 前記第2の結合経路を提供する、前記複数のインピーダンス回路網のうちの第3のインピーダンス回路網は、前記第1の増幅器の前記出力と前記負荷との間に並列に接続される抵抗器及びコンデンサを含む、請求項3に記載の増幅器。
- 前記第2の増幅器の前記出力から前記第1の増幅器の前記入力までの第2の帰還経路を提供する、前記複数のインピーダンス回路網のうちの第4のインピーダンス回路網は、直列に接続されるコンデンサ及び抵抗器を含む、請求項4に記載の増幅器。
- 前記負荷から前記第1の増幅器の前記入力までの第3の帰還経路を提供する、前記複数のインピーダンス回路網のうちの第5のインピーダンス回路網はローパスフィルターを含む、請求項1に記載の増幅器。
- 前記第2の増幅器はAB級モード、G級モード又はH級モードにおいて動作する、請求項1に記載の増幅器。
- 前記第1の増幅器はAB級モードにおいて動作する、請求項7に記載の増幅器。
- 前記電力増幅器は、低周波数帯にわたって実質的に一定の周波数応答を有する、請求項1に記載の増幅器。
- 増幅され、負荷に供給されることになる入力信号を受信する第1の増幅器と、
前記第1の増幅器から下流にある第2の増幅器であって、該第2の増幅器は低電力損失モードにおいて動作する、第2の増幅器と、
前記第1の増幅器の出力を前記負荷に結合するフィードフォワード回路網であって、並列に接続されるコンデンサ及び抵抗器を含むフィードフォワード回路網と、
前記第2の増幅器を前記負荷に結合する抵抗器と、
前記第1の増幅器の出力及び前記第2の増幅器の出力のそれぞれから前記第1の増幅器の入力までの複数の負帰還経路と、
を備える、増幅器。 - 前記負荷から前記第1の増幅器の前記入力までのさらなる帰還経路をさらに備える、請求項10に記載の増幅器。
- 前記さらなる帰還経路はローパスフィルターを含み、前記さらなる帰還経路を用いない場合の低い周波数における前記電力増幅器の前記周波数応答を相殺し、それにより、低い周波数にわたって一定の周波数応答を提供する、請求項10に記載の増幅器。
- 前記第2の増幅器はB級モードにおいて動作する、請求項10に記載の増幅器。
- 前記第1の増幅器はAB級モードにおいて動作する、請求項13に記載の増幅器。
- 前記第2の増幅器はG級モード又はH級モードにおいて動作する、請求項10に記載の増幅器。
- 前記第1の増幅器はAB級モードにおいて動作する、請求項15に記載の増幅器。
- 前記負帰還経路はそれぞれ、1つだけ若しくは複数の抵抗器、コンデンサ、又はそれらの組み合わせの回路網を有する帰還回路網を含む、請求項10に記載の増幅器。
- 前記第1の増幅器と前記第2の増幅器との間に配置される中間増幅器段をさらに備える、請求項10に記載の増幅器。
- 入力信号を受信するためのドライバ増幅器と、
出力増幅器と、
前記出力増幅器を負荷に結合する第1のインピーダンス回路網(Z1)と、
前記ドライバ増幅器の出力を指示する帰還信号を前記ドライバ増幅器の入力に与える第2のインピーダンス回路網(Z2)と、
前記ドライバ増幅器の前記出力を前記負荷に結合する第3のインピーダンス回路網(Z3)と、
前記出力増幅器の出力を指示する帰還信号を前記ドライバ増幅器の前記入力に与える第4のインピーダンス回路網(Z4)と、
を備え、
前記第3のインピーダンス回路網(Z3)は並列に接続されるコンデンサ及び第1の抵抗器を含み、
前記第1のインピーダンス回路網は第2の抵抗器を含む、低電力損失増幅器。 - 前記第2のインピーダンス回路網(Z2)は第3の抵抗器を含み、前記第4のインピーダンス回路網(Z4)は、直列に接続される第4の抵抗器及び第2のコンデンサを含む、請求項19に記載の低電力損失増幅器。
- 前記第1のインピーダンス回路網(Z1)、前記第2のインピーダンス回路網(Z2)、前記第3のインピーダンス回路網(Z3)及び前記第4のインピーダンス回路網(Z4)はそれぞれ、1つ若しくは複数の抵抗器、コンデンサ、又はそれらの組み合わせの回路網からなる、請求項20に記載の低電力損失増幅器。
- 前記低電力損失増幅器は、前記インピーダンス回路網(Z1、Z2、Z3及びZ4)のいずれにおいても平衡コイルを含まない、請求項19に記載の低電力損失増幅器。
- 前記負荷から前記ドライバ増幅器の前記入力までの帰還経路を提供する第5のインピーダンス回路網をさらに備える、請求項19に記載の低電力損失増幅器。
- 前記第1のインピーダンス回路網(Z1)、前記第2のインピーダンス回路網(Z2)、前記第3のインピーダンス回路網(Z3)及び前記第4のインピーダンス回路網(Z4)の値は、関係Z1(s)・Z2(s)=Z3(s)・Z4(s)を満たす、請求項19に記載の低電力損失増幅器。
- 前記第3のインピーダンス回路網(Z3)の時定数は前記第4のインピーダンス回路網(Z4)の時定数と略一致する、請求項19に記載の低電力損失増幅器。
- 高い周波数において、前記インピーダンス回路網(Z3)のインピーダンス特性は実際には容量性に現れる、請求項25に記載の低電力損失増幅器。
- 前記第3のインピーダンス回路網(Z3)の前記インピーダンス特性が容量性に現れる周波数より低い周波数において、前記第3のインピーダンス回路網(Z3)の前記インピーダンス特性は抵抗性に現れる、請求項26に記載の低電力損失増幅器。
- 前記第4のインピーダンス回路網(Z4)は、直列抵抗器及び直列コンデンサを含み、前記直列抵抗器の値は、前記低電力損失増幅器の安定性を助長するために単位ループ利得周波数を与えるように選択される、請求項19に記載の低電力損失増幅器。
- 前記出力増幅器はB級モードにおいて動作する、請求項19に記載の低電力損失増幅器。
- 前記ドライバ増幅器はAB級モードにおいて動作する、請求項29に記載の低電力損失増幅器。
- 前記出力増幅器及び前記ドライバ増幅器はいずれもG級モード又はH級モードにおいて動作する、請求項19に記載の低電力損失増幅器。
- 前記ドライバ増幅器と前記出力増幅器との間に配置される中間増幅器段をさらに備える、請求項19に記載の低電力損失増幅器。
- 第1の増幅器において入力源信号を受信して、ドライバ信号を生成し、
主出力段として作動する第2の増幅器の入力に前記ドライバ信号を与え、
前記第1の増幅器をAB級モードにおいて動作させ、
前記第2の増幅器をB級モード、G級モード又はH級モードにおいて動作させ、並びに
前記第1の増幅器及び前記第2の増幅器から前記負荷を交互に駆動しながら、前記第1の増幅器及び前記第2の増幅器の動作をそれぞれのモードに保持するために、前記第1の増幅器の出力及び前記第2の増幅器の出力から前記第1の増幅器の入力、前記第2の増幅器の入力、及び負荷への選択的な結合又は帰還接続を設けること、
を含む、入力源信号を増幅するための方法。 - 前記ドライバ信号を、前記第2の増幅器に与える前に、中間増幅段に与えるステップをさらに含む、請求項33に記載の方法。
- 前記選択的な結合又は帰還接続を設けることは、並列に接続されるコンデンサ及び抵抗器を介して、前記負荷を前記第1の増幅器の前記出力に結合することを含む、請求項33に記載の方法。
- 前記選択的な結合又は帰還接続を設けることは、抵抗器を介して、前記負荷を前記第2の増幅器の前記出力に結合することを含む、請求項35に記載の方法。
- 前記選択的な結合又は帰還接続を設けることは、帰還回路網を介して、前記負荷から前記第1の増幅器の前記入力まで帰還経路を設けることを含む、請求項36に記載の方法。
- 前記帰還回路網はローパスフィルターを含む、請求項37に記載の方法。
- 前記帰還回路網は、低周波数範囲にわたって周波数応答を実質的に一定にすることによって、前記負荷と前記第1の増幅器の前記出力との間の前記並列に接続される抵抗器及びコンデンサに関連する低周波数応答上昇を補償する、請求項37に記載の方法。
- 前記方法は低アイドル電力損失を与える、請求項33に記載の方法。
- 前記入力信号は実質的に歪みがないままである、請求項40に記載の方法。
- 前記第1の増幅器の前記出力及び前記第2の増幅器の前記出力から前記第1の増幅器の前記入力、前記第2の増幅器の前記入力、及び前記負荷への前記結合又は帰還接続は、平衡コイルを用いることなく、抵抗器、コンデンサ又はそれらの組み合わせで形成される、請求項33に記載の方法。
- 前記第2の増幅器はB級モードにおいて動作する、請求項33に記載の方法。
- 入力信号に結合されるドライバ増幅器と、
出力増幅器と、
前記出力増幅器を負荷に結合する第1のインピーダンス回路網(Z1)と、
前記ドライバ増幅器の出力を指示する帰還信号を前記ドライバ増幅器の入力に与える第2のインピーダンス回路網(Z2)と、
前記ドライバ増幅器の前記出力を前記負荷に結合する第3のインピーダンス回路網(Z3)と、
前記出力増幅器の出力を指示する帰還信号を前記ドライバ増幅器の前記入力に与える第4のインピーダンス回路網(Z4)と、
を備え、
前記第1のインピーダンス回路網(Z1)、前記第2のインピーダンス回路網(Z2)、前記第3のインピーダンス回路網(Z3)及び前記第4のインピーダンス回路網(Z4)の値は、関係Z1(s)・Z2(s)=Z3(s)・Z4(s)を満たし、
前記インピーダンス回路網は全て、抵抗器、コンデンサ、又はそれらの組み合わせの回路網で構成される、低電力損失増幅器。
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