JP2012514441A - グラフィック処理ユニット間を切り換えできるタイミングコントローラ - Google Patents
グラフィック処理ユニット間を切り換えできるタイミングコントローラ Download PDFInfo
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- JP2012514441A JP2012514441A JP2011544607A JP2011544607A JP2012514441A JP 2012514441 A JP2012514441 A JP 2012514441A JP 2011544607 A JP2011544607 A JP 2011544607A JP 2011544607 A JP2011544607 A JP 2011544607A JP 2012514441 A JP2012514441 A JP 2012514441A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/363—Graphics controllers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1438—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using more than one graphics controller
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
- G09G2310/061—Details of flat display driving waveforms for resetting or blanking
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
- G09G2330/022—Power management, e.g. power saving in absence of operation, e.g. no data being entered during a predetermined time
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/06—Use of more than one graphics processor to process data before displaying to one or more screens
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- General Engineering & Computer Science (AREA)
- Computer Graphics (AREA)
- Human Computer Interaction (AREA)
- Controls And Circuits For Display Device (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Liquid Crystal (AREA)
Abstract
【選択図】図1
Description
105:ホストコンピュータシステム
110A−110n:グラフィック処理ユニット(GPU)
125:タイミングコントローラ(T−CON)
126A−126n:受信器
130:ディスプレイ
200:デジタルマルチプレクサ(D−MUX)
205A−205n:受信器
210:送信器
Claims (20)
- ディスプレイと、
前記ディスプレイに結合され、複数の受信器を含むタイミングコントローラ(T−CON)と、
前記複数の受信器の少なくとも1つに各々結合された複数のGPUと、
を備え、前記T−CONがその複数のGPUを一度に1つだけ選択的に前記ディスプレイに結合するようにしたディスプレイシステム。 - 前記複数のGPUの少なくとも1つは、前記ディスプレイに選択的に結合されるまで電源オフされる、請求項1に記載のシステム。
- 前記複数の受信器の少なくとも1つは、中間マルチプレクサなしに前記GPUの少なくとも1つに直結される、請求項1に記載のシステム。
- 前記T−CONは、更に、カウンタを含む、請求項1に記載のシステム。
- 前記カウンタの値を使用して、前記ディスプレイ内の表示位置を決定する、請求項4に記載のシステム。
- 前記T−CONは、少なくとも1つのGPUのブランキング周期中にGPUの少なくとも1つを前記ディスプレイに選択的に結合する、請求項1に記載のシステム。
- 前記T−CONは、システム内の別のコンポーネントからの要求の後にGPUの少なくとも1つを選択的に結合する、請求項1に記載のシステム。
- 各受信器は、位相固定ループ(PLL)を含む、請求項1に記載のシステム。
- 前記PLLは、前記ディスプレイに選択的に結合された少なくとも1つのGPUからの信号からタイミング信号を抽出する、請求項8に記載のシステム。
- ディスプレイシステム内のGPU間を切り換える方法において、
第1のGPUからディスプレイを更新するステップと、
第1のGPUがブランキングインターバルに入ったかどうか決定するステップと、
第1のGPUがブランキングインターバルに入った場合には、ディスプレイシステム内の別のコンポーネントがGPU切り換えを要求したかどうか決定するステップと、
前記ディスプレイシステム内の別のコンポーネントがGPU切り換えを要求した場合に第2のGPUへ切り換えるステップであって、この第2のGPUへ切り換える動作を、この第2のGPUからのビデオ信号のタイミング信号を決定せずに行うステップと、
を備えた方法。 - 前記切り換え動作は、タイミング信号に位相固定せずに行う、請求項10に記載の方法。
- 前記第1のGPUは、チップセットの一部分であり、前記第2のGPUは、チップセットの一部分ではない、請求項10に記載の方法。
- 前記第2のGPUへ切り換える動作は、前記第2のGPUがブランキング周期にある間に行う、請求項10に記載の方法。
- 前記第1及び第2のGPUのブランキング周期は、前記切り換え動作中に重畳する、請求項13に記載の方法。
- T−CONにおけるカウンタを更新する動作を更に備えた、請求項10に記載の方法。
- 前記カウンタの値を使用して、前記第2のGPUが前記ディスプレイにビデオデータを描写するための開始点を計算する、請求項15に記載の方法。
- 前記第1及び第2のGPUは、T−CON内の第1受信器及び第2受信器へ直結され、各受信器は、PLLを含む、請求項10に記載の方法。
- PLLを各々含む複数の受信器を備え、複数のGPUの、一度に1つのみに、選択的に結合されるT−CON。
- 前記複数のGPUの少なくとも1つは、電源オフされる、請求項18に記載のT−CON。
- 前記T−CONは、カウンタを更に備え、そのカウンタの値を使用して、前記ディスプレイに選択的に結合された前記複数のGPUの少なくとも1つに対する前記ディスプレイ内の表示位置を決定する、請求項18に記載のシステム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/347,312 US8508538B2 (en) | 2008-12-31 | 2008-12-31 | Timing controller capable of switching between graphics processing units |
US12/347,312 | 2008-12-31 | ||
PCT/US2009/069851 WO2010078448A2 (en) | 2008-12-31 | 2009-12-30 | Timing controller capable of switching between graphics processing units |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012514441A true JP2012514441A (ja) | 2012-06-21 |
JP5444372B2 JP5444372B2 (ja) | 2014-03-19 |
Family
ID=42065289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011544607A Active JP5444372B2 (ja) | 2008-12-31 | 2009-12-30 | グラフィック処理ユニット間を切り換えできるタイミングコントローラ |
Country Status (8)
Country | Link |
---|---|
US (2) | US8508538B2 (ja) |
EP (1) | EP2370970A2 (ja) |
JP (1) | JP5444372B2 (ja) |
KR (1) | KR101320758B1 (ja) |
CN (1) | CN102272825B (ja) |
HK (1) | HK1164525A1 (ja) |
TW (1) | TWI469083B (ja) |
WO (1) | WO2010078448A2 (ja) |
Cited By (2)
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JP2014085861A (ja) * | 2012-10-24 | 2014-05-12 | Canon Inc | 表示システム、端末装置、表示装置、表示システムの制御方法、端末装置の制御方法、及び、表示装置の制御方法 |
JP2019219589A (ja) * | 2018-06-21 | 2019-12-26 | レノボ・シンガポール・プライベート・リミテッド | 情報処理装置、映像表示装置、および映像表示システム |
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2009
- 2009-12-30 TW TW98146023A patent/TWI469083B/zh active
- 2009-12-30 EP EP09801902A patent/EP2370970A2/en not_active Withdrawn
- 2009-12-30 CN CN200980153230.9A patent/CN102272825B/zh active Active
- 2009-12-30 WO PCT/US2009/069851 patent/WO2010078448A2/en active Application Filing
- 2009-12-30 KR KR1020117017911A patent/KR101320758B1/ko active IP Right Grant
- 2009-12-30 JP JP2011544607A patent/JP5444372B2/ja active Active
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2012
- 2012-05-16 HK HK12104825.9A patent/HK1164525A1/xx not_active IP Right Cessation
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2013
- 2013-07-22 US US13/947,694 patent/US20130300925A1/en not_active Abandoned
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WO2008016424A1 (en) * | 2006-08-04 | 2008-02-07 | Apple Inc. | Method and apparatus for switching between graphics sources |
Cited By (3)
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JP2014085861A (ja) * | 2012-10-24 | 2014-05-12 | Canon Inc | 表示システム、端末装置、表示装置、表示システムの制御方法、端末装置の制御方法、及び、表示装置の制御方法 |
JP2019219589A (ja) * | 2018-06-21 | 2019-12-26 | レノボ・シンガポール・プライベート・リミテッド | 情報処理装置、映像表示装置、および映像表示システム |
US11017492B2 (en) | 2018-06-21 | 2021-05-25 | Lenovo (Singapore) Pte. Ltd. | Video signal switching for use with an external graphics processing unit device |
Also Published As
Publication number | Publication date |
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US20130300925A1 (en) | 2013-11-14 |
CN102272825B (zh) | 2014-07-09 |
WO2010078448A3 (en) | 2010-10-14 |
KR101320758B1 (ko) | 2013-10-21 |
HK1164525A1 (en) | 2012-09-21 |
TWI469083B (zh) | 2015-01-11 |
EP2370970A2 (en) | 2011-10-05 |
CN102272825A (zh) | 2011-12-07 |
US20100164962A1 (en) | 2010-07-01 |
JP5444372B2 (ja) | 2014-03-19 |
WO2010078448A2 (en) | 2010-07-08 |
US8508538B2 (en) | 2013-08-13 |
KR20110102484A (ko) | 2011-09-16 |
TW201033934A (en) | 2010-09-16 |
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