JP2012199631A5 - - Google Patents

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Publication number
JP2012199631A5
JP2012199631A5 JP2011060824A JP2011060824A JP2012199631A5 JP 2012199631 A5 JP2012199631 A5 JP 2012199631A5 JP 2011060824 A JP2011060824 A JP 2011060824A JP 2011060824 A JP2011060824 A JP 2011060824A JP 2012199631 A5 JP2012199631 A5 JP 2012199631A5
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JP
Japan
Prior art keywords
output
buffer
circuit
circuit device
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2011060824A
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English (en)
Japanese (ja)
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JP2012199631A (ja
JP5772109B2 (ja
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Priority to JP2011060824A priority Critical patent/JP5772109B2/ja
Priority claimed from JP2011060824A external-priority patent/JP5772109B2/ja
Publication of JP2012199631A publication Critical patent/JP2012199631A/ja
Publication of JP2012199631A5 publication Critical patent/JP2012199631A5/ja
Application granted granted Critical
Publication of JP5772109B2 publication Critical patent/JP5772109B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2011060824A 2011-03-18 2011-03-18 回路装置及び電子機器 Active JP5772109B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011060824A JP5772109B2 (ja) 2011-03-18 2011-03-18 回路装置及び電子機器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011060824A JP5772109B2 (ja) 2011-03-18 2011-03-18 回路装置及び電子機器

Publications (3)

Publication Number Publication Date
JP2012199631A JP2012199631A (ja) 2012-10-18
JP2012199631A5 true JP2012199631A5 (enExample) 2014-05-01
JP5772109B2 JP5772109B2 (ja) 2015-09-02

Family

ID=47181459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011060824A Active JP5772109B2 (ja) 2011-03-18 2011-03-18 回路装置及び電子機器

Country Status (1)

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JP (1) JP5772109B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015115797A (ja) * 2013-12-12 2015-06-22 新日本無線株式会社 低雑音発振回路
US10305490B2 (en) 2015-10-27 2019-05-28 Seiko Epson Corporation Circuit device, oscillator, electronic apparatus, and moving object
US10218375B2 (en) 2015-10-27 2019-02-26 Seiko Epson Corporation Circuit device, oscillator, electronic apparatus, and vehicle
JP6648489B2 (ja) * 2015-10-30 2020-02-14 セイコーエプソン株式会社 バッファー回路、半導体集積回路装置、発振器、電子機器及び基地局
JP6638340B2 (ja) 2015-11-12 2020-01-29 セイコーエプソン株式会社 回路装置、発振器、電子機器及び移動体
JP6668695B2 (ja) 2015-11-12 2020-03-18 セイコーエプソン株式会社 回路装置、発振器、電子機器及び移動体
JP7669779B2 (ja) * 2021-04-30 2025-04-30 セイコーエプソン株式会社 回路装置及び発振器

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02163810A (ja) * 1988-12-19 1990-06-25 Fujitsu Ltd クロック供給制御回路
JP2597382Y2 (ja) * 1992-02-27 1999-07-05 京セラ株式会社 水晶発振器
JPH1185350A (ja) * 1997-09-10 1999-03-30 Oki Electric Ind Co Ltd 高速信号供給回路
JPH11186894A (ja) * 1997-12-24 1999-07-09 Nec Corp 出力バッファ回路
JP2000311025A (ja) * 1999-04-28 2000-11-07 Nec Corp クロック信号線制御方式
JP2003338710A (ja) * 2001-11-02 2003-11-28 Seiko Epson Corp 発振器およびこれを用いた電子機器
JP2007043339A (ja) * 2005-08-01 2007-02-15 Epson Toyocom Corp 水晶発振器
US20090088194A1 (en) * 2007-09-27 2009-04-02 Telefonaktiebolaget Lm Ericsson (Publ) Single Multi-Mode Clock Source for Wireless Devices

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