JP2012099587A - Wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which allows a signal to travel properly, and in which even when a signal traveling along a pair of transmission lines has a high frequency, e.g. over 35 GHz, the reflection loss of the signal and the insertion loss thereof are small and resonance is less prone to being caused.SOLUTION: The wiring board comprises: a pair of belt-shape wiring conductors 80a and 80b; a pair of external connection pads 60a and 60b; a pair of via conductors 41a, 41b, 42a, 42b, 44a, 44b, 45a and 45b and a pair of through-hole conductors 43a and 43b, through which the pair of belt-shape wiring conductors 80a and 80b, and the pair of external connection pads 60a and 60b are connected; grounded or power source conductor layers 91-96 having oval openings 91a-96a surrounding the pair of via-hole conductors 41a, 41b, 42a, 42b, 44a, 44b, 45a and 45b or the pair of through-hole conductors 43a and 43b; and an insulating plate 13. The pitch of the pair of through-hole conductors 43a and 43b is smaller than that of the pair of external connection pads 60a and 60b. With respect to the openings 91a-96a, the openings located on the side of an upper face of the insulating plate 13 are smaller in size, than the openings located on the side of a lower face of the insulating plate 13.

Description

  The present invention relates to a wiring board for mounting a semiconductor element such as a semiconductor integrated circuit element.

  Conventionally, as shown in FIG. 4, a small wiring board for mounting a semiconductor element includes a plurality of insulating layers 111 having via holes 121, 122, 124, and 125 on the upper and lower surfaces of an insulating plate 113 having through holes 123. A plurality of conductor layers 131, 132, 133, 134, 135, 136 for wiring conductors are disposed on the surface and inside of the insulating substrate 110 formed by stacking 112, 114, and 115, and are deposited in the through holes 123. A multilayer wiring structure is formed in which the upper and lower wiring conductors are connected to each other by the through-hole conductor 143 and the via-hole conductors 141, 142, 144, and 145 attached in the via holes 121, 122, 124, and 125. A plurality of semiconductor element connection pads 150 to which the electrodes of the semiconductor element S are electrically connected via the solder bumps B1 are formed at the center of the upper surface of the insulating substrate 110, and an external electric circuit is formed on the lower surface of the insulating substrate 110. External connection pads 160 that are electrically connected to the wiring conductors of the substrate via solder balls B2 are formed. These semiconductor element connection pads 150 and external connection pads 160 are connected to each other by conductor layers 131, 132, 133, 134, 135, 136 and through-hole conductors 123 and via-hole conductors 121, 122, 124, 125. Electrically connected. Further, a solder resist layer 171 having an opening exposing the central portion of the semiconductor element connection pad 150 is deposited on the surfaces of the uppermost insulating layer 111 and the conductor layer 131, and the lowermost insulating layer 115 and the conductor are exposed. A solder resist layer 172 having an opening exposing the central portion of the external connection pad 160 is deposited on the surface of the layer 136.

  This conventional wiring board is provided with a pair transmission path in which two strip-shaped wiring conductors function as a differential line. A pair transmission line is a form with little electric loss in high frequency transmission, and is useful as a transmission line which transmits a high frequency signal.

  Here, an example of a pair transmission path in the conventional wiring board shown in FIG. 4 is shown in FIG. FIG. 5 is a main part perspective view showing only a part of the conductor layers 131, 132, 133, 134, 135, 136, the through-hole conductor 143, and the via-hole conductors 141, 142, 144, 145 extracted. The pair transmission line is usually surrounded by a ground or power supply conductor layer at a predetermined interval. In FIG. 5, only the signal wirings constituting the pair transmission line are shown. The power supply conductor layer is omitted.

  The pair transmission line has a pair of semiconductor element connection pads 150 a and 150 b disposed adjacent to each other at the center of the upper surface of the insulating substrate 110. From these semiconductor element connection pad pairs 150a and 150b, narrow strip-like wiring conductor pairs 180a and 180b extend toward the outer periphery of the insulating substrate 110 at a predetermined interval. The strip-shaped wiring conductors 180a and 180b are arranged so that their characteristic impedance is approximately 100Ω. The interval between the pair of strip-shaped wiring conductors 180a and 180b is widened toward the through-hole conductor pair 143a and 143b in the outer peripheral portion of the insulating substrate 110. In the portion where the interval is widened, the characteristic impedance of the pair of strip-shaped wiring conductors 180a and 180b becomes larger than 100Ω. The widened ends of the strip-like wiring conductors 180a and 180b are connected to the through-hole conductor pairs 143a and 143b via the via-hole conductor pairs 141a and 141b and 142a and 142b. On the lower surface of the insulating substrate 110, external connection pad pairs 160a and 160b are disposed at positions corresponding to the through-hole conductor pairs 143a and 143b at the same pitch as the through-hole conductors 143a and 143b. The through-hole conductors 143a and 143b are connected to the external connection pad pairs 160a and 160b via the via-hole conductor pairs 144a and 144b and 145a and 145b.

  As described above, the pair transmission lines are surrounded by a ground or power supply conductor layer at a predetermined interval. 6 (a) and 6 (b) are a top view and a cross-sectional view of relevant parts showing a conventional example of a pair transmission line and a ground or power supply conductor layer surrounding the pair transmission line. In this example, the conductor layers 131, 132, 133, 134, 135, 136 are provided with ground or power supply conductor layers 191, 192, 193, 194, 195, 196 surrounding the pair transmission line. These ground or power conductor layers 191, 192, 193, 194, 195 and 196 include via hole conductor pairs 141 a, 141 b, 142 a, 142 b, 144 a, 144 b, 145 a, 145 b, and through hole conductor pairs in the pair transmission line. Oval openings 191a, 192a, 193a, 194a, 195a, 196a having a size surrounding the pair 143a, 143b and the external connection pad pair 160a, 160b in a top view are formed. By providing such openings 191a, 192a, 193a, 194a, 195a, 196a, pairs 160a, 160b of ground or power supply conductor layers 191, 192, 193, 194, 195, 196 and external connection pads of the pair transmission line , The reflection of the signal in the external connection pad pair 160a, 160b is suppressed, and a high-frequency signal can be efficiently transmitted to the outside.

  In such a conventional wiring substrate, the pair transmission line extends at a predetermined interval from the central portion toward the outer peripheral portion of the upper surface side of the insulating substrate 110, and the pair of through-hole conductors 143a in the outer peripheral portion of the insulating substrate 110. , 143b, and is connected to the external connection pad pair 160a, 160b while maintaining the pitch. That is, the through-hole conductors 143a and 143b have the same pitch as the external connection pad pairs 160a and 160b, and it is necessary to widen the interval between the strip-like wiring conductor pairs 180a and 180b to the interval corresponding to the pitch. Therefore, the length of the portion where the interval between the pair of strip-like wiring conductors 180a and 180b is widened is increased, and the interval at the end portion is increased. If this interval is large, the characteristic impedance value tends to increase.

  However, as described above, the characteristic impedance increases in the portion where the distance between the pair of strip-shaped wiring conductors 180a and 180b is widened. Therefore, if the length of this portion is long or the increase in the characteristic impedance is large, it propagates through the pair transmission line. The reflection loss and insertion loss of the signal to be increased, and resonance tends to occur at a specific frequency. Therefore, in the conventional wiring board, when the signal propagating through the pair transmission line becomes a high frequency exceeding, for example, 10 GHz, it becomes difficult to propagate the signal normally.

  Therefore, the applicant of the present application previously described in Japanese Patent Application No. 2010-173079, by making the pitch of the through-hole conductors in the pair transmission line narrower than the pitch of the external connection pads, A wiring board has been proposed in which the length of the portion where the gap is widened corresponding to the pitch of the through-hole conductor is shortened and the gap is widened, and the increase in characteristic impedance in this portion is reduced. According to this wiring board, even if the signal propagating through the pair transmission line is a high frequency exceeding 10 GHz, for example, the reflection loss and insertion loss of the signal are small and resonance is not easily generated, so that the signal is propagated normally. Became possible.

  However, even in the wiring board proposed in Japanese Patent Application No. 2010-173079, in the region where the frequency of the signal propagating through the pair transmission path exceeds 35 GHz, the reflection loss and insertion loss of the signal increase, for example, 40 GHz or 50 GHz in the pair transmission path. It has been found that when a signal is propagated, it is difficult to propagate the signal well. This is thought to be because if the frequency of the signal propagating through the pair transmission line exceeds 35 GHz, the inductance component of the via-hole conductor and the through-hole conductor in the pair transmission line increases, which increases the reflection loss and insertion loss of the signal. It is done.

JP 2004-289094 A

  The problem of the present invention is that even if the signal propagating through the pair transmission line is a high frequency exceeding 35 GHz, for example, the reflection loss and insertion loss of the signal are small and resonance is not easily generated, and the signal is propagated normally. An object of the present invention is to provide a wiring board capable of satisfying the requirements.

  The wiring board of the present invention includes an insulating substrate in which a plurality of insulating layers having via holes are stacked on the upper and lower surfaces of an insulating plate having through holes, and the upper surface of the insulating layer on the upper surface side of the insulating substrate. A pair of strip-shaped wiring conductors extending adjacent to each other from the central portion to the outer peripheral portion and widening each other at the outer peripheral portion, and provided on the end portion on the outer peripheral portion side of the pair of strip-shaped wiring conductors. The through-holes that are deposited in the through-holes adjacent to each other and electrically connected via the pair of strip-shaped wiring conductors and the pair of via-hole conductors deposited in the via hole on the upper surface side of the insulating substrate. A pair of hole conductors and a position corresponding to the pair of through-hole conductors on the lower surface of the insulating substrate are attached adjacent to each other, and the pair of through-hole conductors on the lower surface side of the insulating substrate A pair of external connection pads electrically connected via a pair of via-hole conductors deposited in the hole, the upper and lower surfaces of the insulating plate, and between the pair of strip-shaped wiring conductors and the insulating plate and the external A grounding or power supply conductor layer having an oval opening disposed between the pair of connection pads and the insulating plate and surrounding the pair of through-hole conductors or the pair of via-hole conductors; A wiring board, wherein the pitch of the pair of through-hole conductors is narrower than the pitch of the pair of external connection pads, and the size of the opening is smaller on the upper surface side than the lower surface side of the insulating plate, To do.

  According to the wiring board of the present invention, since the pitch of the pair of through-hole conductors is narrower than the pitch of the pair of external connection pads, the interval between the strip-shaped wiring conductors connected thereto corresponds to the pitch of the through-hole conductors. As a result, the length of the expanded portion is shortened and the interval of the spread is also reduced, and the increase in characteristic impedance in this portion can be reduced. Furthermore, by making the size of the oval opening provided in the ground or power supply conductor layer so as to surround the pair of via-hole conductors or the pair of through-hole conductors on the upper surface side than the lower surface side of the insulating plate, The capacitance between the external connection pad and the insulating plate between the ground or power supply conductor layer is reduced to suppress signal reflection at the pair of external connection pads, and the via hole conductor on the upper surface side of the insulating plate. The increase in inductance between the pair of via-hole conductors and the pair of through-hole conductors and the through-hole conductor pair at frequencies above 35 GHz by increasing the capacitance between the pair of through-hole conductors and the ground or power conductor layer. it can. Therefore, even if the signal propagating through the pair transmission line is a high frequency exceeding 35 GHz, for example, the reflection loss and insertion loss of the signal are small, and the resonance is not easily generated, and the signal can be propagated normally. A substrate can be provided.

FIG. 1 is a schematic cross-sectional view showing an example of an embodiment of a wiring board according to the present invention. FIG. 2 is a perspective view of a main part of the conductor layer, the via-hole conductor, and the through-hole conductor constituting the pair transmission line of the wiring board shown in FIG. FIGS. 3A and 3B are a plan view and a cross-sectional view of the main part showing the pair transmission line shown in FIG. 2 and the ground or power supply conductor layer surrounding the pair transmission line. FIG. 4 is a schematic cross-sectional view showing a conventional wiring board. FIG. 5 is a perspective view of a main part in which only a conductor layer, a via-hole conductor, and a through-hole conductor constituting the pair transmission path of the wiring board shown in FIG. 4 are partially extracted. 6 (a) and 6 (b) are a plan view and a cross-sectional view of a main part showing the pair transmission line shown in FIG. 6 and a ground or power supply conductor layer surrounding the pair transmission line.

  Next, an example of an embodiment of the wiring board of the present invention will be described. In the wiring board of this example, as shown in FIG. 1, a plurality of insulating layers 11, 12, 14, 15 having via holes 21, 22, 24, 25 are stacked on the upper and lower surfaces of the insulating plate 13 having through holes 23. A plurality of conductor layers 31, 32, 33, 34, 35, 36 for wiring conductors are arranged on the surface and inside of the insulating substrate 10, and the through-hole conductor 43 and the via hole deposited in the through-hole 23. A multilayer wiring structure in which upper and lower wiring conductors are connected to each other by via-hole conductors 41, 42, 44, and 45 deposited in 21, 22, 24, and 25, respectively. A plurality of semiconductor element connection pads 50 to which the electrodes of the semiconductor element S are electrically connected via the solder bumps B1 are formed at the center of the upper surface of the insulating substrate 10, and an external electric circuit is formed on the lower surface of the insulating substrate 10. External connection pads 60 are formed which are electrically connected to the wiring conductors of the substrate via solder balls B2. These semiconductor element connection pads 50 and external connection pads 60 are connected to each other by conductor layers 31, 32, 33, 34, 35, 36 and through-hole conductors 23 and via-hole conductors 21, 22, 24, 25. Electrically connected. Furthermore, a solder resist layer 71 having an opening exposing the central portion of the semiconductor element connection pad 50 is deposited on the surfaces of the uppermost insulating layer 11 and the conductor layer 31, and the lowermost insulating layer 15 and the conductor are exposed. A solder resist layer 72 having an opening that exposes the central portion of the external connection pad 60 is deposited on the surface of the layer 36.

  The insulating plate 13 is a member that becomes a core substrate of a wiring board, and is formed by impregnating a glass fabric in which glass fiber bundles are woven vertically and horizontally with a thermosetting resin such as epoxy resin or bismaleimide triazine resin, and has a thickness of 0. It has a plurality of through holes 23 with a diameter of about 0.1 to 0.3 mm from the upper surface to the lower surface. Conductive layers 33 and 34 are deposited on the upper and lower surfaces, and a through-hole conductor 43 is deposited on the inner surface of the through-hole 23. The through hole 23 to which the through hole conductor 43 is attached is filled with resin.

  Such an insulating plate 13 is manufactured by thermally curing an insulating sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then drilling through holes 23 from the upper surface to the lower surface. The conductor layers 33 and 34 on the upper and lower surfaces of the insulating plate 13 have a copper foil having a thickness of about 3 to 50 μm adhered to the entire upper and lower surfaces of the insulating sheet for the insulating plate 13, and the copper foil is cured on the sheet. A predetermined pattern is formed by etching later. The through hole conductor 43 on the inner surface of the through hole 23 is formed by depositing a copper plating film having a thickness of about 3 to 50 μm on the inner surface of the through hole 23 by an electroless plating method and an electrolytic plating method. In addition, in order to fill the inside of the through hole 23 with a resin, an uncured pasty thermosetting resin was filled into the through hole 23 in which the through hole conductor 43 was formed by a screen printing method, and then filled. A method of thermally curing the resin is employed.

  The insulating layers 11, 12, 14, and 15 laminated on the upper and lower surfaces of the insulating plate 13 are build-up insulating layers, and an inorganic insulating filler such as silicon oxide powder is added to a thermosetting resin such as an epoxy resin to 30 to 30. It is made of an insulating material dispersed by about 70% by mass. The insulating layers 11, 12, 14, and 15 each have a thickness of about 20 to 60 μm, and have a plurality of via holes 21, 22, 24, and 25 having a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. . The via holes 21, 22, 24, 25 are filled with via hole conductors 41, 42, 44, 45, respectively. Via these via hole conductors 41, 42, 44, 45, the conductor layers 31, 32, 33, 45 are filled. High density wiring can be formed in three dimensions by electrically connecting predetermined wiring patterns 34, 35, 36. Each of the insulating layers 11, 12, 14, and 15 has an insulating film made of an uncured thermosetting resin having a thickness of about 20 to 60 μm attached to the upper and lower surfaces of the insulating plate 13 and thermally cured. At the same time, via holes 22 and 24 are drilled by laser processing, and the next insulating layers 11 and 15 are sequentially stacked thereon in the same manner. The conductor layers 31, 32, 35, 36 deposited on the surfaces of the insulating layers 11, 12, 14, 15 and the via hole conductors 41, 42, 44, filled in the via holes 21, 22, 24, 25 are provided. 45 is a copper plating having a thickness of about 5 to 50 μm on the surface of each insulating layer 11, 12, 14, 15 and in the via holes 21, 22, 24, 25 every time each insulating layer 11, 12, 14, 15 is formed. The film is formed by depositing a film in a predetermined pattern by a pattern forming method such as a known semi-additive method.

  Further, the solder resist layers 71 and 72 are formed by adding a filler such as silica or talc to a thermosetting resin such as an acrylic-modified epoxy resin. If the solder resist layer 71 is on the upper surface side, the semiconductor element connection pad 50 is used. In addition, the solder resist layer 72 on the lower surface side has an opening that exposes the central portion of the external connection pad 60. The solder resist layers 71 and 72 have a thickness of about 10 to 50 μm, and the uncured resin paste for the solder resist layers 71 and 72 having photosensitivity is insulated by adopting a roll coater method or a screen printing method. After coating on the layers 11 and 15 and drying them, exposure and development are performed to form openings that expose the central portions of the semiconductor element connection pads 50 and the external connection pads 60, and then this is heated. It is formed by curing.

  Here, FIG. 2 shows an example of a pair transmission path in the wiring board of this example shown in FIG. FIG. 2 is a perspective view of a main part showing only the conductor layers 31, 32, 33, 34, 35, 36, and the through-hole conductor 43 and the via-hole conductors 41, 42, 44, 45 extracted. The pair transmission line is usually surrounded by a ground or power supply conductor layer at a predetermined interval. However, in FIG. 2, only the signal wiring constituting the pair transmission line is shown. The power supply conductor layer is omitted.

  The pair transmission line of this example includes a pair of semiconductor element connection pads 50a and 50b disposed adjacent to each other in the center of the upper surface of the insulating substrate 10 and an external disposed adjacent to the outer peripheral portion of the lower surface of the insulating substrate 10. It has a pair of connection pads 60a and 60b. Between the semiconductor element connection pad pair 50a and 50b and the external connection pad pair 60a and 60b, a strip-like wiring conductor pair 80a and 80b, a via-hole conductor pair 41a, 41b, 42a, 42b, 44a and 44b. , 45a, 45b, through-hole conductor pairs 43a, 43b, and connection land pairs 91a, 91b, 92a, 92b. In the pair transmission line of this example, the pitch of the through-hole conductor pairs 43a and 43b is narrower than the pitch of the external connection pad pairs 60a and 60b, which is important.

  The pair of semiconductor element connection pads 50a and 50b are substantially circular with a diameter of about 100 to 200 μm, and are adjacent to each other at a pitch of about 110 to 250 μm. From the semiconductor element connection pad pairs 50a and 50b, narrow strip-like wiring conductor pairs 80a and 80b extend toward the outer periphery of the insulating substrate 10 at a predetermined interval. The strip-like wiring conductors 80a and 80b have a thickness of 10 to 20 [mu] m, a width of 20 to 30 [mu] m, a distance of about 30 to 75 [mu] m, and are arranged so that their characteristic impedance is approximately 100 [Omega]. The strip-shaped wiring conductor pairs 80a and 80b are spread so that the distance between the pair of strip-shaped wiring conductors 80a and 80b is about 250 to 500 μm toward the through-hole conductor pairs 43a and 43b. In the portion where the interval is widened, the characteristic impedance of the pair of strip-shaped wiring conductors 80a and 80b becomes larger than 100Ω. However, since the spreading interval is 250 to 500 μm and is not so wide, the increase in characteristic impedance is not so large as compared with the conventional case. Also, the length of the spreading part is not so long.

  The lower surfaces of the extended end portions of the strip-shaped wiring conductors 80a and 80b are connected to the through-hole conductor pairs 43a and 43b via the via-hole conductor pairs 41a and 41b and 42a and 42b. The through-hole conductor pairs 43a and 43b have a diameter of about 100 to 150 [mu] m and an interval of about 350 to 600 [mu] m. The diameter and the distance between each other are set so that the characteristic impedance of the through-hole conductor pairs 43a and 43b is approximately 100Ω, but the diameter is smaller than the conventional one and the distance is smaller than the conventional one. . It is preferable that only the diameter of the through hole 23 in which the through-hole conductor pair 43a, 43b is formed is smaller than the diameter of the other through holes 23.

  Via hole conductor pairs 44a and 44b are connected to the lower ends of the through-hole conductor pairs 43a and 43b. A connection land pair 49a formed by the conductor layer 35 is connected to the lower ends of the via-hole conductor pairs 44a and 44b. 49b are connected. The connection land pairs 49a and 49b extend in the direction from the bottom of the through-hole conductor pairs 43a and 43b toward the external connection pads 60a and 60b so that the distance between them is about 500 to 1000 μm. Are connected to the pair of external connection pads 60a and 60b via the via-hole conductor pair 45a and 45b. The pair of external connection pads 60a and 60b are generally circular with a diameter of about 300 to 500 μm, and are adjacent to each other at a pitch of 500 to 1000 μm.

  In the present invention, as described above, the pitch of the through-hole conductor pairs 43a and 43b is narrower than the pitch of the external connection pad pairs 60a and 60b. As a result, the length of the portion where the pair of strip-like wiring conductors 80a and 80b spreads toward the through-hole conductor pair 43a and 43b on the outer peripheral portion of the insulating substrate 10 is shortened and the gap between the strips is reduced. The increase in impedance can also be reduced.

  Next, FIGS. 3A and 3B show the above-described pair transmission line and the ground or power supply conductor layer surrounding the pair transmission line in a top view and a cross-sectional view of the relevant part. As shown in FIG. 3, the conductor layers 31, 32, 33, 34, 35, and 36 are provided with ground or power supply conductor layers 91, 92, 93, 94, 95, and 96 so as to surround the pair transmission line. ing. These ground or power supply conductor layers 91, 92, 93, 94, 95, 96 include via hole conductor pairs 41a, 41b, 42a, 42b, 44a, 44b, 45a, 45b, and through hole conductor pairs in a pair transmission line. 43a, 43b and an oval opening 91a, 92a, 93a, 94a, 95a, 96a surrounding the pair of external connection pads 60a, 60b are formed.

  In the wiring board of this example, among these openings 91a, 92a, 93a, 94a, 95a, 96a, the openings 92a, 93a on the upper surface side of the insulating plate 13 are compared with the openings 94a, 95a on the lower surface side. It is getting smaller. Specifically, for example, the openings 94a and 95a on the lower surface side are oval shapes that are about 100 μm larger than the oval region connecting the pair of external connection pads 60a and 60b, and the openings 92a and 93a on the upper surface side are These are oval shapes that are approximately 50 μm larger than the oval region connecting via hole conductor pairs 42a and 42b or through hole conductor pairs 43a and 43b that they surround. The via-hole conductors 42a and 42b and the through-hole conductors 43a and 43b mentioned here include lands connected thereto.

  In this way, the length between the external connection pads 60a and 60b and the insulating plate 13 is about 100 μm larger than the oval region where the external connection pad pairs 60a and 60b are connected to the ground or power supply conductor layers 94 and 95. By providing the circular openings 94a and 95a, the capacitance between the external connection pad pair 60a and 60b and the ground or power supply conductor layer 94 and 95 is reduced, and the signal in the external connection pad pair 60a and 60b is reduced. Reflection can be suppressed. Further, by making the openings 92a and 93a on the upper surface side of the insulating plate 13 small, the via hole conductor pair 42a and 42b and the through hole conductor pair 43a and 43b on the upper surface side of the insulating plate 13 and the ground or power supply conductor. Since the distance between the layers 92 and 93 is narrowed, the capacitance between them increases. By increasing the capacitance of this portion, the inductance of the via-hole conductor pair 42a and 42b and the through-hole conductor pair 43a and 43b that increases when the signal propagating through the pair transmission line exceeds 35 GHz is increased. Can be offset. Therefore, even if the signal propagating through the pair transmission line is a high frequency exceeding 35 GHz, for example, the reflection loss and insertion loss of the signal are small, and the resonance is not easily generated, and the signal can be propagated normally. A substrate can be provided.

DESCRIPTION OF SYMBOLS 10 ... Insulating substrate 11, 12, 14, 15 ... Insulating layer 13 ... Insulating plate 21, 22, 24, 25 ... Via hole 23 ... Through hole 41a, 41b, 42a, 42b, 44a , 44b, 45a, 45b ... pair of via-hole conductors 43a, 43b ... pair of through-hole conductors 60a, 60b ... pair of external connection pads 80a, 80b ... pair of strip-like wiring conductors 91, 92, 93, 94, 95, 96 ... ground or power supply conductor layer 91a, 92a, 93a, 94a, 95a, 96a ... opening

Claims (1)

  An insulating substrate formed by laminating a plurality of insulating layers having via holes on the upper and lower surfaces of an insulating plate having a through hole, and the upper surface of the insulating layer on the upper surface side of the insulating substrate from the central portion to the outer peripheral portion of the insulating substrate. A pair of strip-shaped wiring conductors extending adjacently and having a gap between each other in the outer peripheral portion, and the through-holes adjacent to each other provided corresponding to the end portion on the outer peripheral portion side of the pair of strip-shaped wiring conductors A pair of through-hole conductors electrically connected via a pair of strip-shaped wiring conductors and a pair of via-hole conductors deposited in a via hole on the upper surface side of the insulating substrate; Adjacent to each other at positions corresponding to the pair of through-hole conductors on the lower surface of the insulating substrate, and deposited in via holes on the lower surface side of the insulating substrate to the pair of through-hole conductors A pair of external connection pads electrically connected via a pair of via-hole conductors, an upper and lower surfaces of the insulating plate, a pair of the strip-like wiring conductors and the insulating plate, and a pair of the external connection pads and the A wiring board comprising a ground or power supply conductor layer having an oval opening surrounding the pair of through-hole conductors or the pair of via-hole conductors. The wiring board according to claim 1, wherein a pitch of the pair of through-hole conductors is narrower than a pitch of the pair of external connection pads, and the size of the opening is smaller on the upper surface side than the lower surface side of the insulating plate.

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