JP5473074B2 - Wiring board - Google Patents

Description

  The present invention relates to a wiring board for mounting a semiconductor element.

  In general, current electronic devices are required to be small, thin, lightweight, high performance, high functionality, high quality, and high reliability, as represented by mobile communication devices. Semiconductor devices to be mounted are also required to be small and high in density. Therefore, miniaturization / thinning / multi-terminals are also required for the wiring board constituting the semiconductor device, and in order to realize it, the width of the wiring such as the signal wiring is narrowed and the interval is narrowed, Furthermore, high-density wiring has been achieved by multilayering of wiring.

  As a wiring board capable of such high-density wiring, a multilayer wiring board manufactured by adopting a build-up method is known. The build-up method is, for example, on an insulating substrate that is compounded by impregnating a reinforcing material such as glass cloth or aramid non-woven fabric with a thermosetting resin typified by an epoxy resin having heat resistance and chemical resistance. An insulating layer is formed by applying an adhesive made of a thermosetting resin such as an epoxy resin with a wiring conductor interposed therebetween, and the insulating layer is heated and cured. After forming a via hole of about 200 μm, the surface of the insulating layer is chemically roughened, and a conductive film is deposited on the wiring conductor on the side surface of the via hole and the bottom surface of the via hole by using an electroless copper plating method and an electrolytic copper plating method. Forming a via-hole conductor and forming a wiring conductor connected to the via-hole conductor on the surface of the insulating layer, and then repeating the formation of the insulating layer and via-hole conductor / wiring conductor multiple times. It is a method of fabricating a wiring board.

  The wiring conductor of such a wiring board is functionalized into a power supply conductor layer / ground conductor layer and a signal wiring depending on applications. Among these, the power supply conductor layer functions to supply power to the semiconductor element mounted on the wiring board, and is composed of a solid pattern thin film conductor in which substantially the entire surface of the insulating layer is plated. Further, the signal wiring functions to propagate an electric signal without electromagnetic interference, and is composed of a conductor patterned in a predetermined circuit shape. Furthermore, the ground conductor layer functions to shield electromagnetic waves generated by the current flowing through the power supply conductor layer and the signal wiring, and to prevent noise generated in other wiring conductors. It is comprised from the thin-film conductor of the solid pattern plated. That is, the electromagnetic wave generated from the signal wiring or the like is shielded by converting it into an eddy current in the ground conductor layer, and noise is not generated in the other signal wiring due to the shielding effect.

  The power supply conductor layer / signal wiring and grounding conductor layer that play such a role are electrically connected to the mounting electrodes for connecting external electric circuits provided on the surface of the wiring board through via-hole conductors, respectively. It is arranged in a laminated structure that can supply power to a semiconductor element mounted on the substrate, transmit signals, or shield electromagnetic waves.

  In addition, the solid patterns of the power supply conductor layer and the ground conductor layer are provided with rectangular openings arranged in a lattice pattern so as to escape gas generated when the resin of the insulating layer is cured. The openings arranged in a lattice pattern are arranged uniformly over the entire surface of the power supply conductor layer and the ground conductor layer when the wiring board is viewed in plan, and are arranged in parallel with the signal wiring.

  However, in such a conventional wiring board, when viewed in plan, the openings arranged in a lattice pattern and the signal wiring are arranged in parallel, so that depending on the signal wiring, they face each other through an insulating layer. The characteristic impedance differs between each signal wiring because it is formed so as to overlap with the arranged opening or not overlapping with the opening, and reflection noise due to mismatch of characteristic impedance in the high frequency region There is a problem in that the generated semiconductor device malfunctions. Also, if the opening is too large, the shielding effect due to the solid pattern will be reduced, causing crosstalk noise due to signal leakage, and conversely if the opening is too small, the gas generated when the resin of the insulating layer is cured. Has a problem that the grounding or power supply conductor layer swells or peels off.

  Therefore, the signal wiring is formed by a wiring conductor extending in one direction and a wiring conductor extending at an angle of 45 degrees with respect to one direction, and an opening having one side of the opening of 0.10 to 0.15 mm is formed in one direction. On the other hand, there has been proposed a wiring board arranged in a direction of 15 to 30 degrees so that an interval between openings is 0.3 to 0.6 mm. According to this wiring board, the opening formed in the ground or power supply conductor layer with respect to the signal wiring formed by the wiring conductor extending in one direction and the wiring conductor extending in the direction of 45 degrees with respect to one direction is formed in 15-30. When the wiring board is viewed in plan, the signal wiring and the opening are overlapped on average, so that there is no difference in characteristic impedance between each signal wiring. Generation of the wiring board can be suppressed, and the signal can be stably transmitted even in the high-frequency signal region. Further, according to this wiring board, since one side of the opening is set to 0.10 to 0.15 mm and the interval between the openings is set to 0.3 to 0.6 mm, the shielding effect of the ground and the power supply conductor layer is achieved. In addition to reducing crosstalk noise between signal wires in the high-frequency region, gas generated when the resin in the insulating layer hardens can be easily released, resulting in swelling or peeling of the ground or power conductor layer. There can be no wiring board.

  Recently, a wiring board for mounting a semiconductor element is required to have a form with less electrical loss in high-frequency transmission. Therefore, a wiring board provided with differential signal wiring is used as a signal wiring conductor. The differential signal wiring is provided with a pair of two strip-shaped wiring conductors extending in parallel with each other at a predetermined interval on the surface or inside of the insulating substrate as a pair, and grounding or power supply above and below, and right and left of the two strip-shaped wiring conductors forming the pair. It is formed by providing impedance matching by providing conductors at predetermined intervals.

  However, as described above, the signal wiring is formed by the wiring conductor extending in one direction and the wiring conductor extending at an angle of 45 degrees with respect to the one direction, and the opening having one side of the opening of 0.10 to 0.15 mm When the differential signal wiring is applied to the wiring board arranged so that the distance between the openings is 0.3 to 0.6 mm in the direction of 15 to 30 degrees with respect to one direction, the differential signal wiring is configured. The frequency with which one of the two strip-shaped wiring conductors faces the opening provided in the ground or power supply conductor layer is increased. Therefore, as a set of differential signal wirings, portions facing the openings appear at intervals of 0.3 to 0.6 mm. In this way, if there is a portion facing the opening at intervals of 0.3 to 0.6 mm as a set of differential signal wiring, impedance matching is not satisfactorily achieved at that portion, and signal reflection loss or insertion Loss occurs and it becomes difficult to propagate the signal satisfactorily through the differential signal wiring.

  There has also been proposed a wiring board in which an opening provided in the ground or power supply conductor layer is provided at a position not facing the signal wiring conductor. However, the number of signal wiring conductors is larger than the size of the opening. In the case of a wiring board having a region densely provided at a narrow interval, an opening cannot be provided in that region, and the ground or the power supply conductor layer is swollen or peeled off.

Japanese Patent No. 4540262 Japanese Patent No. 3801880

  The problem of the present invention is that the grounding or power supply conductor layer does not swell or peel off, and the reflection loss and insertion loss of the signal propagating through the differential signal wiring are small, so that the signal can be propagated normally. It is to provide a wiring board.

  A wiring board of the present invention includes a ground or power supply conductor layer in which a plurality of rectangular gas vent openings each having a side length of 0.10 to 0.15 mm are formed, and an insulating layer on the ground or power supply conductor layer And a plurality of differential signal wirings composed of two strip-shaped wiring conductors extending in parallel on the insulating layer at an interval narrower than the size of the opening. A first region in which the wirings are adjacent to each other at an interval wider than the size of the opening, and a second region in which the plurality of differential signal wirings are adjacent to each other at an interval narrower than the width of the opening are formed. In the first area, the openings are located at positions facing each other between the differential signal wires in the first region, and the distance between the openings is 0.3 to 0.6 mm. 1 and spaced in the second region. The Te is characterized in that it is arranged in a wide second intervals than intervals of the first distance between the opening in the direction along the differential signal lines.

  According to the wiring board of the present invention, the opening for venting formed in the ground or power supply conductor layer has a plurality of differential signal wirings in the first region adjacent to each other at intervals wider than the size of the opening. In addition, the differential signal wiring and the opening overlap each other because the opening is disposed at a position facing each other between the differential signal wirings at a first interval of 0.3 to 0.6 mm. The characteristic impedance of the differential signal wiring is matched to a predetermined value. Further, in the second region in which the plurality of differential signal wirings are adjacent to each other with an interval narrower than the size of the opening, the interval between the openings in the direction along the differential signal wiring is wider than the first interval. Since it is arranged at the second interval, the interval between the overlapping portions of the pair of differential signal wirings and the opening becomes wide, and the influence due to the mismatch of the characteristic impedance of that portion may be reduced. it can. Further, even in the second region where the plurality of differential signal wirings are adjacent to each other at an interval narrower than the size of the opening, gas escapes through the opening of the ground or power supply conductor layer. It is possible to prevent peeling.

FIG. 1 is a cross-sectional view showing an example of an embodiment of a wiring board according to the present invention. FIG. 2 is a perspective view of a principal part of the wiring board shown in FIG.

  Next, an example of an embodiment of the wiring board of the present invention will be described. As shown in FIG. 1, the wiring board of this example has a plurality of insulating layers 11, 12, 14, 15 having via holes 21, 22, 24, 25 stacked on the upper and lower surfaces of the insulating plate 13 having through holes 23. A plurality of conductor layers 31, 32, 33, 34, 35, 36 for wiring conductors are arranged on the surface and inside of the insulating substrate 10, and the through-hole conductor 43 and the via hole deposited in the through-hole 23. A multilayer wiring structure in which upper and lower wiring conductors are connected to each other by via-hole conductors 41, 42, 44, and 45 deposited in 21, 22, 24, and 25, respectively. A plurality of semiconductor element connection pads 50 to which the electrodes of the semiconductor element S are electrically connected via the solder bumps B1 are arranged in a lattice pattern at the center of the upper surface of the insulating substrate 10. Are formed with external connection pads 60 which are electrically connected to the wiring conductors of the external electric circuit board via solder balls B2. These semiconductor element connection pads 50 and external connection pads 60 are connected to each other by conductor layers 31, 32, 33, 34, 35, 36 and through-hole conductors 23 and via-hole conductors 21, 22, 24, 25. Electrically connected. The conductor layers 31, 32, 33, 34, 35, and 36 include differential signal wiring and ground or power supply conductors facing the differential signal wiring. Furthermore, a solder resist layer 71 having an opening exposing the central portion of the semiconductor element connection pad 50 is deposited on the surfaces of the uppermost insulating layer 11 and the conductor layer 31, and the lowermost insulating layer 15 and the conductor are exposed. A solder resist layer 72 having an opening that exposes the central portion of the external connection pad 60 is deposited on the surface of the layer 36.

  The insulating plate 13 is a member that becomes a core substrate of a wiring board, and is formed by impregnating a glass fabric in which glass fiber bundles are woven vertically and horizontally with a thermosetting resin such as epoxy resin or bismaleimide triazine resin, and has a thickness of 0. It has a plurality of through holes 23 with a diameter of about 0.1 to 0.3 mm from the upper surface to the lower surface. Conductive layers 33 and 34 are deposited on the upper and lower surfaces, and a through-hole conductor 43 is deposited on the inner surface of the through-hole 23. The through hole 23 to which the through hole conductor 43 is attached is filled with resin.

  Such an insulating plate 13 is manufactured by thermally curing an insulating sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then drilling through holes 23 from the upper surface to the lower surface. The conductor layers 33 and 34 on the upper and lower surfaces of the insulating plate 13 have a copper foil having a thickness of about 3 to 50 μm adhered to the entire upper and lower surfaces of the insulating sheet for the insulating plate 13, and the copper foil is cured on the sheet. A predetermined pattern is formed by etching later. The through hole conductor 43 on the inner surface of the through hole 23 is formed by depositing a copper plating film having a thickness of about 3 to 50 μm on the inner surface of the through hole 23 by an electroless plating method and an electrolytic plating method. In addition, in order to fill the inside of the through hole 23 with a resin, an uncured pasty thermosetting resin was filled into the through hole 23 in which the through hole conductor 43 was formed by a screen printing method, and then filled. A method of thermally curing the resin is employed.

  The insulating layers 11, 12, 14, and 15 laminated on the upper and lower surfaces of the insulating plate 13 are build-up insulating layers, and an inorganic insulating filler such as silicon oxide powder is added to a thermosetting resin such as an epoxy resin to 30 to 30. It is made of an insulating material dispersed by about 70% by mass. The insulating layers 11, 12, 14, and 15 each have a thickness of about 20 to 60 μm, and have a plurality of via holes 21, 22, 24, and 25 having a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. . The via holes 21, 22, 24, 25 are filled with via hole conductors 41, 42, 44, 45, respectively. Via these via hole conductors 41, 42, 44, 45, the conductor layers 31, 32, 33, 45 are filled. High density wiring can be formed in three dimensions by electrically connecting predetermined wiring patterns 34, 35, 36. Each of the insulating layers 11, 12, 14, and 15 has an insulating film made of an uncured thermosetting resin having a thickness of about 20 to 60 μm attached to the upper and lower surfaces of the insulating plate 13 and thermally cured. At the same time, via holes 22 and 24 are drilled by laser processing, and the next insulating layers 11 and 15 are sequentially stacked thereon in the same manner. The conductor layers 31, 32, 35, 36 deposited on the surfaces of the insulating layers 11, 12, 14, 15 and the via hole conductors 41, 42, 44, filled in the via holes 21, 22, 24, 25 are provided. 45 is a copper plating having a thickness of about 5 to 50 μm on the surface of each insulating layer 11, 12, 14, 15 and in the via holes 21, 22, 24, 25 every time each insulating layer 11, 12, 14, 15 is formed. The film is formed by depositing a film in a predetermined pattern by a pattern forming method such as a known semi-additive method.

  Further, the solder resist layers 71 and 72 are formed by adding a filler such as silica or talc to a thermosetting resin such as an acrylic-modified epoxy resin. If the solder resist layer 71 is on the upper surface side, the semiconductor element connection pad 50 is used. In addition, the solder resist layer 72 on the lower surface side has an opening that exposes the central portion of the external connection pad 60. The solder resist layers 71 and 72 have a thickness of about 10 to 50 μm, and the uncured resin paste for the solder resist layers 71 and 72 having photosensitivity is insulated by adopting a roll coater method or a screen printing method. After coating on the layers 11 and 15 and drying them, exposure and development are performed to form openings that expose the central portions of the semiconductor element connection pads 50 and the external connection pads 60, and then this is heated. It is formed by curing.

  Here, the differential signal wiring and a part of the grounding or power supply conductor layer facing the differential signal wiring in the wiring board shown in FIG. FIG. 2 shows the differential signal wiring 80 and the ground or power supply conductor layer 90 disposed so as to face the differential signal wiring 80. As shown in FIG. 2, in the differential signal wiring 80, a pair of strip-shaped wiring conductors 80a and 80b extending in parallel with each other is paired. The strip-like wiring conductors 80a and 80b have a thickness of 10 to 20 [mu] m, a width of 20 to 30 [mu] m, a distance of about 30 to 75 [mu] m, and are arranged so that their characteristic impedance is approximately 100 [Omega]. On the other hand, the ground or power supply conductor layer 90 is generally a solid pattern, and a plurality of rectangular openings 90a for venting gas are formed in a part thereof. The opening 90a has a side length of about 0.10 to 0.15 mm.

  In this wiring board, a plurality of differential signal wirings 80 are adjacent to each other at a wider interval than the size of the opening 90a, and a plurality of differential signal wirings 80 are spaced at a smaller interval than the size of the opening 90a. A second region A2 adjacent to each other is formed. In the wiring board on which the semiconductor element S is mounted, the large number of differential signal wirings 80 extend from the central portion of the upper surface on which the semiconductor element S is mounted toward the outer peripheral portion so as to increase the distance between them. Region A1 and second region A2 are formed.

  In the wiring board of this example, the opening 90a is located at a position facing the gap between the differential signal wires 80 in the first region A1, so that the interval between the openings 90a is 0.3 to 0.6 mm. In the second region A2, the gaps between the openings 90a in the direction along the differential signal wiring 80 are 1.0 to 1.5 mm.

  As described above, in the first region A1, the opening 90a is arranged at a position facing between the differential signal wirings 80, so that the differential signal wiring 80 and the opening 90a do not overlap each other. Therefore, the characteristic impedance of the differential signal wiring 80 is matched to a predetermined value. In the second region A2, the openings 90 are arranged so that the distance between the openings 90a in the direction along the differential signal wiring 80 is 1.0 to 1.5 mm. In the pair of differential signal wirings 80, the interval between the overlapping portions of the opening 90a is wide, and the influence of mismatching in the characteristic impedance of the portion can be reduced. Further, since gas is released from the opening 90a formed in the second region A2, it is possible to prevent the ground or the power supply conductor layer 90 from being swollen or peeled off. Therefore, according to the wiring board of this example, the ground or power supply conductor layer 90 does not swell or peel off, and the reflection loss or insertion loss of the signal propagating through the differential signal wiring 80 is small, and the signal is normal It is possible to provide a wiring board that can be propagated to the substrate.

  If one side of the opening of the opening 90a is smaller than 0.10 mm, the gas generated when the resin of the insulating layers 11, 12, 14, and 15 is cured is easily generated from the insulating layers 11, 12, 14, and 15. The ground or power supply conductor layer 90 tends to swell or peel off, and if it is larger than 0.15 mm, the shielding effect of the ground or power supply conductor layer 90 is reduced, and crosstalk noise is generated. There is a risk that S will malfunction. Therefore, it is preferable that one side of the opening part of the opening part 90a is 0.10 to 0.15 mm. Also, if the distance between the openings 90a in the first region A1 is less than 0.3 mm, the shielding effect of the ground or power supply conductor layer 90 is reduced, crosstalk noise is generated, and the semiconductor element S malfunctions. If the thickness is larger than 0.6 mm, the number of openings 90a in the entire wiring board is reduced, and the gas generated when the resin of the insulating layers 11, 12, 14, 15 is cured is generated in the insulating layers 11, 12, 14 and 15 do not easily come off, and the ground or power conductor layer 90 tends to swell or peel off. Therefore, the interval between the openings of the opening 90a in the first region A1 is preferably 0.3 to 0.6 mm. Furthermore, if the distance between the openings 90a in the direction along the differential signal line 80 in the second region A2 is less than 1.0 mm, the mismatch of the characteristic impedance of the differential signal line 80 becomes large, and the differential It becomes difficult to propagate high-speed signals satisfactorily to the signal wiring 80, and if it exceeds 1.5 mm, the gas generated when the resin of the insulating layers 11, 12, 14, and 15 is cured in the second region is insulated. The layers 11, 12, 14, and 15 do not easily come off, and the ground or power supply conductor layer 90 tends to swell or peel off. Therefore, the interval between the openings 90a in the direction along the differential signal line 80 in the second region A2 is preferably in the range of 1.0 to 1.5 mm.

DESCRIPTION OF SYMBOLS 11, 12, 14, 15 Insulating layer 80 Differential signal wiring 80a, 80b Strip | belt-shaped wiring conductor 90 Grounding or power supply conductor layer 90a Degassing opening A1 1st area | region A2 2nd area | region

Claims (2)

  A ground or power supply conductor layer in which a plurality of rectangular gas vent openings each having a side length of 0.10 to 0.15 mm are formed, and the ground or power supply conductor layer is disposed to face each other with an insulating layer interposed therebetween. A plurality of differential signal wirings composed of two strip-shaped wiring conductors extending in parallel on the insulating layer at a distance narrower than the size of the opening, and the plurality of differential signal wirings are the size of the opening. A wiring board formed by forming a first region adjacent to each other at a wider interval and a second region where the plurality of differential signal wirings are adjacent to each other at an interval narrower than the size of the opening. In the first region, the openings are arranged at positions facing each other between the differential signal wires at a first interval in which the interval between the openings is 0.3 to 0.6 mm. And the differential signal in the second region. Wiring board interval between the opening in the direction along the wire is characterized in that it is arranged in a wide second interval than the first distance.   The wiring board according to claim 1, wherein the second interval is 1.0 to 1.5 mm.

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