JP2012020889A - METHOD FOR PRODUCING SiC SEMICONDUCTOR THIN FILM AND DEVICE FOR PRODUCING THE SAME - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing an SiC semiconductor thin film, with an SiC epitaxial film in which the variation of the in-plane distribution in impurity concentration is sufficiently suppressed can be produced, using MSE (Metastable Solvent Epitaxy), and a device for producing the same.SOLUTION: In the method for producing the SiC semiconductor thin film, the SiC semiconductor thin film is produced by metastable solvent epitaxy. In the method, a plurality of bottom face spacers are arranged on a substrate installation tool at prescribed intervals, a carbon atom supply substrate, a plurality of upper spacers, an Si plate and a single crystal SiC seed substrate are stacked on the bottom face spacers in order, and thereafter, temperature is raised to the prescribed one higher than the melting point of Si, and a single crystal SiC film is epitaxially grown on the single crystal SiC seed substrate to produce the SiC semiconductor thin film. There is also provided the device for producing the SiC semiconductor thin film.

Description

  The present invention relates to a method and apparatus for manufacturing a SiC semiconductor thin film, and more particularly to a method and apparatus for manufacturing a SiC semiconductor thin film using a metastable solvent epitaxial method.

  Under strict user demands for higher efficiency of electrical equipment in recent years, development of semiconductor materials having further electrical characteristics, withstand voltage characteristics, and the like has been promoted in semiconductor devices. In particular, since silicon carbide (SiC) has a larger band gap than silicon (Si), it has been actively developed for application to next-generation power devices.

  In order to produce such a SiC semiconductor device, it is necessary to produce a SiC semiconductor thin film made of single-crystal SiC, and SiC capable of producing a high-quality SiC semiconductor thin film without performing precise temperature control. As a method for manufacturing a semiconductor thin film, a metastable solvent epitaxial method (hereinafter also referred to as “MSE method”) (Metalable Solvent Epitaxy) has been proposed (for example, Patent Document 1).

  The production of a SiC semiconductor thin film (single crystal SiC) by this MSE method will be described with reference to FIG. 6A and 6B are diagrams schematically showing one step in the conventional MSE method, specifically, a step of preparing a film forming material, where FIG. 6A is a plan view and FIG. 6B is a longitudinal sectional view.

  First, as shown in FIG. 6, a carbon atom supply substrate 40, a Si plate 20, and a single crystal SiC substrate 10 are sequentially stacked on a substrate installation jig 50 provided in a reaction furnace (not shown). At this time, a plurality of upper spacers 30 are appropriately arranged in the circumferential direction between the Si plate 20 and the carbon atom supply substrate 40 to provide a space in which Si melt generated during heating is accumulated. The thickness of the upper spacer 30 is set to be thinner than the thickness of the Si plate 20 so as not to generate convection in the Si melt.

  Next, the temperature in the reactor is raised to a predetermined temperature (SiC growth temperature) higher than the Si melting point (about 1400 ° C.) using a heating means (not shown) in an Ar gas or a vacuum atmosphere. In the middle, when the furnace temperature exceeds the Si melting point, the Si plate 20 is melted to become a Si melt.

  The Si melt forms a Si melt layer in the space provided by the upper spacer 30 and combines with carbon diffused from the carbon atom supply substrate 40 into the Si melt layer to form SiC. The formed SiC is then epitaxially grown on the surface of the single crystal SiC substrate 10 to produce a SiC semiconductor thin film.

JP 2005-126249 A

  When a small amount of impurities are mixed into the SiC epitaxial film, carriers are formed, and an n-type or p-type SiC semiconductor thin film is obtained. For example, when the impurity is nitrogen (N), the n-type SiC semiconductor is a p-type SiC semiconductor when the impurity is aluminum (Al) or boron (B). For this reason, the carrier concentration in the SiC epitaxial film depends on the concentration of these impurities (N, B, Al) contained in the carbon atom supply substrate.

  Then, by producing a SiC epitaxial film in which variation in the in-plane distribution of impurity concentration is sufficiently suppressed, a SiC semiconductor device can be obtained with high yield.

  For this reason, in the conventional MSE method, a carbon raw material with a variation in the in-plane distribution of impurities of about ± 5% is used as the carbon atom supply substrate, and the variation in the in-plane distribution of the carrier concentration of the SiC epitaxial film is suppressed. Was planned.

  However, even in the case where a carbon raw material having an in-plane variation of impurities of about ± 5% is used as the carbon atom supply substrate, the carrier concentration in-plane distribution is actually obtained in the obtained SiC epitaxial film. Variation of about ± 30 to 50%, indicating a much larger variation in in-plane distribution. Moreover, the carrier concentration is high at the outer peripheral portion of the SiC epitaxial film and low at the central portion.

  Thus, it is difficult to produce a SiC epitaxial film in which variation in the in-plane distribution of carrier concentration is sufficiently suppressed from the conventional MSE method, and a SiC semiconductor device having stable electrical characteristics can be obtained with a high yield. It was difficult.

  Therefore, the present invention can produce an SiC epitaxial film in which the variation in the in-plane distribution of the carrier concentration is sufficiently suppressed by using the MSE method, and can obtain a SiC semiconductor device having stable electrical characteristics with high yield. It is an object of the present invention to provide a method and an apparatus for manufacturing an SiC semiconductor thin film that can be manufactured.

  As a result of intensive studies, the present inventor has found that the above-mentioned problems can be solved by the inventions of the following claims, and has completed the present invention. Hereinafter, the invention of each claim will be described.

The invention described in claim 1
A method for producing a SiC semiconductor thin film by producing a SiC semiconductor thin film by a metastable solvent epitaxial method,
On the substrate installation jig, a plurality of bottom surface spacers are arranged at predetermined intervals,
On the bottom spacer, a carbon atom supply substrate, a plurality of upper spacers, a Si plate and a single crystal SiC seed substrate are sequentially stacked,
Thereafter, the temperature is raised to a predetermined temperature higher than the melting point of Si, and a single crystal SiC film is epitaxially grown on the single crystal SiC seed substrate to produce a SiC semiconductor thin film. This is a manufacturing method.

  As described above, in the conventional MSE method, the variation in the in-plane distribution of the carrier concentration in the obtained SiC epitaxial film is used despite the use of the carbon atom supply substrate in which the in-plane distribution of impurities is small. Was big.

  Since the carrier concentration depends on impurities, the present inventor presumed that the large variation in the conventional MSE method was influenced by other than the carbon atom supply substrate, and intensively studied. As a result, impurities contained in the substrate installation jig on which the carbon atom supply substrate, the upper spacer, the Si plate, and the single crystal SiC seed substrate are placed enter the outer periphery of the SiC epitaxial film, and this large variation is caused. I found that it was generated.

  The reason for this will be described with reference to FIG. FIG. 7 is a diagram schematically showing one step in the MSE method, specifically, a Si growth step when Si is melted at a high temperature, where (a) is a plan view and (b) is a longitudinal sectional view. .

  In the conventional MSE method, as described above, the thickness of the upper spacer 30 is set to be thinner than the thickness of the Si plate 20. For this reason, in the growth process, as shown in FIG. 7, the Si melt forms the Si melt layer 20a, and the excess Si melt A overflows to the outside so that the outer peripheral surface of the carbon atom supply substrate 40 is covered. Then, the Si melt pool 70 is formed on the substrate installation jig 50.

  On the other hand, as a substrate installation jig, it does not melt, sublimate, or deform in a high temperature atmosphere, does not react with Si vapor, does not contain impurities that affect the formation of SiC, and is easy to process. In consideration of the above, carbon processed products that have been subjected to high-purity treatment have been conventionally used. However, even a carbon processed product that has been purified in this way contains impurities that affect the electrical characteristics of SiC, and its concentration is usually higher than the impurity concentration of the carbon atom supply substrate. .

  For this reason, at a high temperature, impurities contained in the substrate installation jig diffuse toward the surplus Si melt A and the carbon atom supply substrate in contact with the substrate installation jig. Impurities diffused into the surplus Si melt A further diffuse into the Si melt layer.

  And since the thickness of the Si melt layer is as very thin as 300 μm or less, there is almost no temperature distribution in the Si melt layer, and convection of the Si melt hardly occurs. For this reason, the impurities that have moved to the Si melt layer cannot enter the center of the Si melt layer and diffuse only to the outer peripheral portion of the single crystal SiC epitaxial film formed on the single crystal SiC seed substrate. . As a result, the impurity concentration in the obtained single crystal SiC epitaxial film is high at the outer peripheral portion and low at the central portion, thereby increasing the variation in in-plane distribution.

  On the other hand, in the present invention, SiC is epitaxially grown by heating a plurality of bottom surface spacers at a predetermined interval between the substrate setting jig and the carbon atom supply substrate.

  This will be described in detail with reference to FIG. 1 and FIG. FIG. 1 is a diagram schematically showing one step in the MSE method according to the present invention, specifically, a step of preparing a film forming material, where (a) is a plan view and (b) is a longitudinal sectional view. . FIG. 2 is a diagram schematically showing one step in the MSE method according to the present invention, specifically, a SiC growth step when Si is melted at a high temperature, (a) is a plan view, (b) ) Is a longitudinal sectional view.

  As shown in FIG. 1, in the present invention, a plurality of bottom spacers 6, a carbon atom supply substrate 4, a plurality of upper spacers 3, a Si plate 2, and a single crystal SiC seed substrate 1 are placed on a substrate installation jig 5. They are stacked in order. By interposing the bottom spacer 6, a space is provided between the substrate setting jig 5 and the carbon atom supply substrate 4. The plurality of bottom surface spacers are arranged at a predetermined interval. In the case of FIG. 1, four spacers 6 are arranged every 90 degrees.

  In this state, the temperature is raised to a predetermined temperature higher than the melting point of Si. When the furnace temperature exceeds the melting point of Si, the Si plate 2 is melted to become a Si melt, and as shown in FIG. In the space provided by the spacer 30, the Si melt layer 2a is formed, and excess Si melt A overflows to the outside.

  Unlike the case of the conventional MSE method that flows down along the entire outer peripheral surface of the carbon atom supply substrate, the overflowing excess Si melt A flows down through the newly provided bottom spacer 6. Further, a path through which impurities diffuse from the substrate installation jig to the Si melt layer 2a through the Si melt reservoir 7 formed on the substrate installation jig 5 is arranged at a predetermined interval. In addition, it is limited to a route that travels through the plurality of bottom surface spacers 6, and the diffusion of impurities from the substrate setting jig 5 to the Si melt layer 2a is suppressed.

  Moreover, since the space | interval of the board | substrate installation jig | tool 5 and Si melt layer 2a becomes wider than the case of the conventional MSE method by providing the bottom surface spacer 6, it diffuses from the board | substrate installation jig | tool 5 to Si melt layer 2a. The amount of impurities produced is suppressed, and convection occurs in the excess Si melt A that has overflowed, thereby further suppressing the diffusion of impurities.

  Thus, according to the present invention, since the diffusion of impurities from the substrate installation jig to the Si melt layer is sufficiently suppressed, it is possible to suppress an increase in the concentration of impurities at the outer peripheral portion of the SiC epitaxial film. Can do. As a result, a SiC epitaxial film in which variation in the in-plane distribution of the impurity concentration is sufficiently suppressed can be manufactured, and a SiC semiconductor device having stable electrical characteristics can be obtained with a high yield.

The invention described in claim 2
The method for producing a SiC semiconductor thin film according to claim 1, wherein the substrate installation jig is made of polycrystalline SiC or high-purity carbon.

  The substrate installation jig made of polycrystalline SiC or high-purity carbon does not melt, sublimate or deform in a high-temperature atmosphere, does not react with Si vapor, and contains a high concentration of impurities that affect the formation of SiC. Therefore, it is preferable as a substrate installation jig.

The invention according to claim 3
The method for producing a SiC semiconductor thin film according to claim 1 or 2, wherein the bottom spacer is made of polycrystalline SiC or high-purity carbon.

  As described above, the spacer made of polycrystalline SiC or high-purity carbon does not melt, sublimate or deform in a high-temperature atmosphere, does not react with Si vapor, and has a high impurity that affects the formation of SiC. Since it is not included in the concentration, it is preferable as a bottom spacer.

The invention according to claim 4
An SiC semiconductor thin film manufacturing apparatus used in the method of manufacturing an SiC semiconductor thin film according to any one of claims 1 to 3,
A board installation jig;
A SiC semiconductor thin film production apparatus comprising a plurality of carbon atom supply substrate placement bottom spacers arranged on the substrate installation jig at predetermined intervals.

  The invention of this claim captures the invention of claim 1 which is an invention of the method from the surface of the apparatus, and by using this apparatus, an SiC epitaxial film having a small variation in the in-plane distribution of the impurity concentration can be obtained. It is possible to provide a SiC semiconductor having stable electrical characteristics with high yield.

  According to the present invention, an SiC epitaxial film (SiC semiconductor thin film) in which variation in the in-plane distribution of impurity concentration is sufficiently suppressed can be manufactured by using the MSE method, and an SiC semiconductor having stable electrical characteristics can be produced. It can be provided with good yield.

It is a figure which shows typically 1 process in the MSE method which concerns on this invention. It is a figure which shows typically another 1 process in the MSE method which concerns on this invention. It is a figure which shows the measurement location of N density | concentration of a SiC semiconductor thin film. It is a figure which shows the measurement result of N density | concentration of a SiC semiconductor thin film and a board | substrate installation jig | tool. It is a figure which shows the measurement result of N density | concentration of a SiC semiconductor thin film. It is a figure which shows typically 1 process in the conventional MSE method. It is a figure which shows typically another 1 process in the conventional MSE method.

  Hereinafter, the present invention will be described based on embodiments.

(Embodiment)
A manufacturing process of the SiC semiconductor thin film (single crystal SiC epitaxial film) according to the present invention will be specifically described based on the embodiment.

(1) Preparation process

  First, as shown in FIG. 1, a plurality of bottom surface spacers 6, a carbon atom supply substrate 4, a plurality of upper spacers 3, a Si plate 2, and a single crystal SiC seed substrate 1 are sequentially disposed on a substrate installation jig 5. They are stacked and then stored in a reaction furnace (not shown). A plurality of upper spacers are provided every 90 degrees.

  As the single crystal SiC seed substrate 1, a separately produced bulk single crystal SiC cut into a predetermined size is used, and the plane orientation to be grown, for example, the [0001] plane is opposed to the carbon atom supply substrate 4. It is arranged to let you.

  The Si plate 2 is a silicon raw material that melts during high-temperature processing, and forms a Si melt layer in the space formed by the upper spacer 3 between the single crystal SiC seed substrate 1 and the carbon atom supply substrate 4. Form. As for the thickness, it is necessary to form a Si melt layer in the space during the epitaxial growth of single crystal SiC. A sufficiently thick material is preferable compared to the thickness.

  As described above, the upper spacer 3 is provided in order to form a Si melt layer by controlling the thickness between the single crystal SiC seed substrate 1 and the carbon atom supply substrate 4 during high-temperature processing. Three or more are arranged at equal intervals in the circumferential direction on the substrate 4, and four are arranged in FIG. The thickness is preferably about 20 to 100 μm.

  As described above, the carbon atom supply substrate 4 is preferably a carbon raw material containing no impurities, such as polycrystalline SiC or high-purity carbon.

  The material of the bottom spacer 6 is preferably polycrystalline SiC, high-purity carbon, or the like, and three or more are arranged at equal intervals in the circumferential direction on the lower surface side of the carbon atom supply substrate 4. In FIG. Has been. In addition, it is preferable to arrange at the same position as the upper spacer 3. The thickness is preferably 800 μm or more so that even if the carbon atom supply substrate 4 and the substrate installation jig 5 are deformed during high-temperature processing, partial contact does not occur between them.

  The material for the substrate setting jig 5 is preferably one that does not contain impurities, and high-purity carbon or the like is used. The thickness is preferably a thickness in which deformation such as warpage does not occur even during high-temperature processing in a state where each film forming material and the bottom spacer 6 are placed.

(2) Single-crystal SiC growth step Hereinafter, the single-crystal SiC growth step will be described with reference to FIG. The temperature in the reactor is increased from room temperature to 1500 to 1800 ° C. at a temperature increase rate of 10 to 40 ° C./min in an Ar gas of 2000 to 100000 Pa or in a vacuum atmosphere. When the Si melting point (about 1400 ° C.) is exceeded, the Si plate is melted to form a Si melt. The Si melt forms the Si melt layer 2 a in the space provided by the upper spacer 3, and surplus Si melt A overflows from the outer periphery of the carbon atom supply substrate 4.

  And by holding the temperature of 1500-1800 degreeC for 3 to 6 hours, single-crystal SiC grows epitaxially on the surface of the single-crystal SiC substrate 10, and a SiC semiconductor thin film is produced.

  Thereafter, the temperature is lowered from 1500 to 1800 ° C. to 1400 ° C. at a temperature lowering rate of 5 ° C./min or less, and further lowered to room temperature at a temperature lowering rate of 10 ° C./min or less, and then taken out from the reactor.

  The surplus Si melt A overflowing from the outer peripheral portion of the carbon atom supply substrate 4 flows down to the substrate installation jig 5 through the bottom spacer 6 to form a Si melt reservoir 7. Impurities diffuse from the substrate installation jig 5 into the Si melt layer 2a through the Si melt reservoir 7, but as described above, the path of diffusion is limited to the bottom spacer 6 provided every 90 degrees. Therefore, diffusion of impurities is suppressed.

  As a result, during the epitaxial growth of single crystal SiC, the mixing of impurities can be suppressed, and variations in the in-plane distribution of carrier concentration can be suppressed.

(Example)
Example 1 and Example 2 are examples using carbon atom supply substrates having different N concentrations. Compared with the high purity carbon N concentration 9.70E + 17 atms / cm ^{3 of} the substrate setting jig, Example 1 Then, a carbon atom supply substrate having a lower N concentration of 5.80E + 16 atms / cm ³ is used. On the other hand, in Example 2, a carbon atom supply substrate having an N concentration of 7.10E + 18 atms / cm ³ higher than that of the substrate setting jig is used.

  As the single crystal SiC seed substrate 1, a disk-shaped 4H single crystal SiC wafer having a diameter of 2 inches was used. As the Si plate 2, a Si plate having a diameter of 2 inches and a thickness of 280 μm was used. The carbon atom supply substrate 4 was a polycrystalline SiC substrate having a diameter of 2 inches and a thickness of 550 μm.

  As the upper spacer 3, a high-purity carbon plate material having a plane size of 3 × 6 mm and a thickness of 100 μm was used, and eight pieces were arranged on the outer periphery of the carbon atom supply substrate 4 at intervals of 45 degrees.

  As the bottom spacer 6, a plate material made of high-purity carbon having a planar size of 3 × 6 mm and a thickness of 800 μm was used, and eight pieces were arranged in accordance with the position of the upper spacer 3.

  The temperature was raised from room temperature to 1800 ° C. at a heating rate of 30 ° C./min in a vacuum atmosphere of 70000 Pa. By this temperature increase, the Si melt layer 2a was formed when the Si melting point (about 1400 ° C.) was exceeded.

  Next, a single crystal SiC was epitaxially formed by maintaining a temperature of 1800 ° C. for 6 hours in a vacuum atmosphere, and a single crystal SiC epitaxial film having a thickness of 25 to 40 μm was formed on the surface of the single crystal SiC seed substrate 1. .

  Thereafter, the temperature was decreased from 1800 ° C. to 1500 ° C. at a temperature decrease rate of 5 ° C./min.

  Further, after the temperature was lowered from 1500 ° C. to 1100 ° C. at a temperature lowering rate of 1 ° C./min, the temperature was lowered from 1100 ° C. to 600 ° C. at a temperature lowering rate of 10 ° C./min, and then naturally cooled to room temperature. The single crystal SiC epitaxial film of Examples 1 and 2 was obtained.

(Comparative example)
A SiC semiconductor thin film was prepared under the same conditions as in the example except that the bottom spacer was not used, and a single crystal SiC epitaxial film of a comparative example was obtained.

(Evaluation of single crystal SiC epitaxial film)
The carrier concentration was measured for the single crystal SiC epitaxial films (SiC semiconductor thin films) obtained in the examples and comparative examples. The carrier concentration is considered to be almost equivalent to the N concentration. The measurement was performed at 17 points indicated by ◯ in FIG.

  Specifically, the carrier concentration was calculated from CV measurement. The measurement results are shown in FIG. In FIG. 4, (a) is the measurement result in the comparative example, (b) is the measurement result in Example 1, and (c) is the measurement result in Example 2. In each figure, the horizontal axis indicates the distance from the center, and the vertical axis indicates the carrier concentration.

  Table 1 shows the N concentration of the carbon atom supply substrate and the maximum value, minimum value, average value, standard deviation, and variation of the carrier concentration of the obtained single crystal SiC epitaxial film in each example.

  Based on Table 1, FIG. 5 shows the N concentration in the carbon raw material in each example and the comparative example, the carrier concentration variation width of the obtained single crystal SiC epitaxial film, the substrate installation jig high purity carbon The relationship of N concentration was shown.

  As shown in FIG. 4A, in the case of the comparative example, there is a large variation in the carrier concentration measurement values in both the a-axis diameter and the m-axis diameter in the substrate surface. On the other hand, as shown in FIGS. 4B and 4C, in the case of Examples 1 and 2, there is no large variation in the measured value, and there is a sufficient variation in the in-plane distribution of the carrier concentration. It turns out that it is suppressed.

  As can be seen from Table 1, in the case of Examples 1 and 2, the carrier concentration variation of the single crystal SiC epitaxial film is ± 10.6% and ± 8.9%, respectively, and ± 33. It can be seen that this is a significant improvement compared to 8%.

  Further, from FIG. 5, the carrier concentration of the single crystal SiC epitaxial film of the comparative example and Example 1 is higher than the N concentration of the carbon atom supply substrate. Conversely, the carrier concentration of the single crystal SiC epitaxial film of Example 2 is lower than the N concentration of the carbon atom supply substrate. The N concentration of the substrate setting jig high-purity carbon is between the N concentrations of the carbon atom supply substrates of the comparative example, Example 1 and Example 2. This shows that the carrier concentration of the single crystal SiC epitaxial film is also affected by the N concentration in the high-purity carbon of the substrate setting jig. Therefore, the effectiveness which can suppress the influence of N density | concentration of a substrate installation jig | tool high purity carbon can be shown by installation of a bottom surface spacer.

  From the above, it was possible to confirm the effect of arranging the bottom spacer.

  Although the present invention has been described based on the embodiments, the present invention is not limited to the above-described embodiments. Various modifications can be made to the above-described embodiment within the same and equivalent scope as the present invention.

1, 10 Single crystal SiC substrate 2, 20 Si plate 2a, 20a Si melt layer 3, 30 Upper spacer 4, 40 Carbon atom supply substrate 5, 50 Substrate installation jig 6 Bottom spacer 7, 70 Si melt reservoir A Excess Si melt

Claims (4)

A method for producing a SiC semiconductor thin film by producing a SiC semiconductor thin film by a metastable solvent epitaxial method,
On the substrate installation jig, a plurality of bottom surface spacers are arranged at predetermined intervals,
On the bottom spacer, a carbon atom supply substrate, a plurality of upper spacers, a Si plate and a single crystal SiC seed substrate are sequentially stacked,
Thereafter, the temperature is raised to a predetermined temperature higher than the melting point of Si, and a single crystal SiC film is epitaxially grown on the single crystal SiC seed substrate to produce a SiC semiconductor thin film. Manufacturing method.   The method for producing a SiC semiconductor thin film according to claim 1, wherein the substrate installation jig is made of polycrystalline SiC or high-purity carbon.   The method for producing a SiC semiconductor thin film according to claim 1, wherein the bottom spacer is made of polycrystalline SiC or high-purity carbon. An SiC semiconductor thin film manufacturing apparatus used in the method of manufacturing an SiC semiconductor thin film according to any one of claims 1 to 3,
A board installation jig;
A SiC semiconductor thin film manufacturing apparatus comprising: a plurality of carbon atom supply substrate mounting bottom surface spacers arranged on the substrate installation jig at predetermined intervals.

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