JP2012004171A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2012004171A
JP2012004171A JP2010135174A JP2010135174A JP2012004171A JP 2012004171 A JP2012004171 A JP 2012004171A JP 2010135174 A JP2010135174 A JP 2010135174A JP 2010135174 A JP2010135174 A JP 2010135174A JP 2012004171 A JP2012004171 A JP 2012004171A
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igbt
semiconductor device
semiconductor element
diode
heat
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JP5672784B2 (en
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Kensuke Sasaki
健介 佐々木
Hiroyuki Ichikawa
浩之 市川
Kenta Suzuki
健太 鈴木
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Nissan Motor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4846—Connecting portions with multiple bonds on the same bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce a temperature gradient of a semiconductor element and improve radiation performance of a semiconductor device.SOLUTION: A semiconductor device comprises: an insulated gate bipolar transistor (IGBT) (semiconductor element) 11 mounted on an electrical circuit; a circuit pattern 21 that is formed on an electrical circuit 100 and electrically connected to the IGBT 11; and a connection layer 30 that is interposed between the IGBT 11 and the circuit pattern 21 and connects them electrically. The connection layer 30 includes a solder layer 32 mechanically bonding the IGBT 11 and the circuit pattern 21, and a diode 31 that is provided so as to face a part of the IGBT 11 of which the temperature becomes maximum during operation, and has a higher electrical resistance than that of the solder layer 32.

Description

本発明は、半導体素子が実装される半導体装置に関するものである。   The present invention relates to a semiconductor device on which a semiconductor element is mounted.

従来から、半導体素子の発熱を放熱するためのヒートシンクを備える半導体装置が用いられている。   Conventionally, a semiconductor device including a heat sink for dissipating heat generated by a semiconductor element has been used.

特許文献１には、ヒートシンクにおける半導体素子に対向する部分の熱抵抗を、その周囲部分の熱抵抗よりも高くなるように設定した電子基板が開示されている。この電子基板では、ヒートシンク自体における半導体素子の発熱の分散性を高め、ヒートシンクの温度勾配を低減している。   Patent Document 1 discloses an electronic substrate in which a thermal resistance of a portion of a heat sink that faces a semiconductor element is set to be higher than a thermal resistance of a peripheral portion thereof. In this electronic substrate, the dispersibility of the heat generation of the semiconductor element in the heat sink itself is enhanced, and the temperature gradient of the heat sink is reduced.

特開２００９−１８８３２９号公報JP 2009-188329 A

しかしながら、引用文献１に記載の電子基板では、ヒートシンクにおける半導体素子に対向する部分の熱抵抗が大きくなるように設定している。この場合、もともと熱抵抗が高い半導体素子中心近傍の熱流路の熱抵抗が高く設定されるため、半導体素子から放熱されにくくなり、半導体素子の温度が上昇するおそれがある。   However, in the electronic substrate described in the cited document 1, the heat resistance of the portion of the heat sink that faces the semiconductor element is set to be large. In this case, since the heat resistance of the heat flow path in the vicinity of the center of the semiconductor element, which has a high heat resistance, is set high, it is difficult for heat to be radiated from the semiconductor element, and the temperature of the semiconductor element may increase.

本発明は、上記の問題点に鑑みてなされたものであり、半導体装置における放熱性能を確保しつつ半導体素子の温度勾配を低減することを目的とする。   The present invention has been made in view of the above-described problems, and an object thereof is to reduce a temperature gradient of a semiconductor element while ensuring heat dissipation performance in a semiconductor device.

本発明の半導体装置は、電気回路に実装される半導体素子と、電気回路に形成され半導体素子との間で電気的に接続される回路パターンと、半導体素子と回路パターンとの間に介在して両者を電気的に接続する接続層と、を備える。接続層は、半導体素子と回路パターンとを機械的に接合する接合部と、駆動時に温度が最大になる半導体素子の一部に臨んで設けられ、接合部と比較して電気抵抗が高い高抵抗部と、を有することを特徴とする。   The semiconductor device of the present invention includes a semiconductor element mounted on an electric circuit, a circuit pattern formed in the electric circuit and electrically connected to the semiconductor element, and interposed between the semiconductor element and the circuit pattern. A connection layer for electrically connecting the two. The connection layer is provided so as to face a part of the semiconductor element that mechanically joins the semiconductor element and the circuit pattern and a part of the semiconductor element that has the maximum temperature during driving, and has a high electrical resistance compared to the joint part. And a portion.

本発明では、駆動時に温度が最大になる半導体素子の一部に臨んで高抵抗部が設けられる。この高抵抗部に流れる電流は、低抵抗部に流れる電流と比較して小さいため、高抵抗部における電流の流れによる発熱が抑制される。したがって、半導体素子における放熱性能を確保しつつ半導体素子の温度勾配を低減できる。   In the present invention, the high resistance portion is provided so as to face a part of the semiconductor element having the maximum temperature during driving. Since the current flowing through the high resistance portion is smaller than the current flowing through the low resistance portion, heat generation due to the current flow in the high resistance portion is suppressed. Therefore, the temperature gradient of the semiconductor element can be reduced while ensuring the heat dissipation performance in the semiconductor element.

本発明の実施の形態に係る半導体装置が適用される電気回路の一例を示す斜視図である。It is a perspective view showing an example of an electric circuit to which a semiconductor device concerning an embodiment of the invention is applied. 本発明の第１の実施の形態に係る半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention. 本発明の第１の実施の形態に係る半導体装置の半導体素子の温度を示す図である。It is a figure which shows the temperature of the semiconductor element of the semiconductor device which concerns on the 1st Embodiment of this invention. 本発明の第２の実施の形態に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on the 2nd Embodiment of this invention. 本発明の第３の実施の形態に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on the 3rd Embodiment of this invention.

以下、図面を参照して、本発明の実施の形態について説明する。   Embodiments of the present invention will be described below with reference to the drawings.

（第１の実施の形態）
まず、図１から図３を参照して、本発明の第１の実施の形態に係る半導体装置１０、及び半導体装置１０が適用される電気回路１００の一例について説明する。 (First embodiment)
First, an example of a semiconductor device 10 according to a first embodiment of the present invention and an electric circuit 100 to which the semiconductor device 10 is applied will be described with reference to FIGS.

図１に示される電気回路１００は、たとえば電動自動車やハイブリッド車などの電動車に搭載されるインバーターに使用されるものである。電気回路１００は、複数の半導体装置１０を備える。   An electric circuit 100 shown in FIG. 1 is used for an inverter mounted on an electric vehicle such as an electric vehicle or a hybrid vehicle. The electric circuit 100 includes a plurality of semiconductor devices 10.

半導体装置１０は、論理回路を構成する半導体素子としてのＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ：絶縁ゲートバイポーラトランジスタ）１１を備える。また、半導体装置１０は、ＩＧＢＴ１１が実装される基板２０と、ＩＧＢＴ１１と基板２０とを電気的に接続する接続層３０とを備える。   The semiconductor device 10 includes an IGBT (Insulated Gate Bipolar Transistor) 11 as a semiconductor element constituting a logic circuit. In addition, the semiconductor device 10 includes a substrate 20 on which the IGBT 11 is mounted, and a connection layer 30 that electrically connects the IGBT 11 and the substrate 20.

ＩＧＢＴ１１は、高速スイッチング制御によってコントロールされ、大電流を制御可能である。なお、ＩＧＢＴ１１に代えて、厚さ方向に電流が流れる他の半導体チップを半導体素子として用いてもよい。   The IGBT 11 is controlled by high-speed switching control and can control a large current. Instead of the IGBT 11, another semiconductor chip in which a current flows in the thickness direction may be used as the semiconductor element.

ＩＧＢＴ１１は、上面及び下面の各々に電極を有する半導体チップである。ＩＧＢＴ１１は、下面の電極から電流が入力され、上面の電極から電流を出力する。つまり、ＩＧＢＴ１１には、下面から上面に向けて、厚さ方向に電流が流れる。これとは逆に、上面から下面に向けて電流が流れるようにＩＧＢＴ１１を用いてもよい。   The IGBT 11 is a semiconductor chip having electrodes on each of an upper surface and a lower surface. The IGBT 11 receives current from the lower electrode and outputs current from the upper electrode. That is, a current flows through the IGBT 11 in the thickness direction from the lower surface to the upper surface. On the contrary, the IGBT 11 may be used so that a current flows from the upper surface to the lower surface.

ＩＧＢＴ１１の下面は、接続層３０を介して基板２０の回路パターン２１と電気的に接続される。ＩＧＢＴ１１の下面は、全面が接続層３０を介して基板２０に接合される。ここでは、ＩＧＢＴ１１下面の接合部の中央近傍を中央部１１ａとし、中央部１１ａの周辺を周辺部１１ｂとする。   The lower surface of the IGBT 11 is electrically connected to the circuit pattern 21 of the substrate 20 through the connection layer 30. The entire lower surface of the IGBT 11 is bonded to the substrate 20 via the connection layer 30. Here, the center vicinity of the joint part on the lower surface of the IGBT 11 is defined as a central part 11a, and the periphery of the central part 11a is defined as a peripheral part 11b.

ＩＧＢＴ１１の上面には、三本のワイヤ１２がワイヤボンディングされる。そのうち一本のワイヤ１２ａは、図示しないコントローラからの信号をＩＧＢＴ１１に入力するたものものである。他の二本のワイヤ１２ｂ，１２ｃは、ＩＧＢＴ１１から出力された電流を外部に導くためのものである。   Three wires 12 are wire-bonded on the upper surface of the IGBT 11. One of the wires 12a is obtained by inputting a signal from a controller (not shown) to the IGBT 11. The other two wires 12b and 12c are for guiding the current output from the IGBT 11 to the outside.

ＩＧＢＴ１１は、電流の流れに伴って全面が略均一に発熱する。ＩＧＢＴ１１の発熱は、基板２０を挟んでＩＧＢＴ１１と対向して設けられる放熱器４０に伝導される。ＩＧＢＴ１１の発熱は、放熱器４０に至るまでに拡散するが、このときＩＧＢＴ１１の中央部１１ａの発熱は、逃げ場がないため充分に拡散できずに放熱器４０に伝導される。   The entire surface of the IGBT 11 generates heat substantially uniformly with the flow of current. The heat generated by the IGBT 11 is conducted to a radiator 40 provided to face the IGBT 11 with the substrate 20 interposed therebetween. The heat generated in the IGBT 11 is diffused up to the heat radiator 40. At this time, the heat generated in the central portion 11a of the IGBT 11 is not sufficiently diffused and is conducted to the heat radiator 40 without being escaped.

そのため、ＩＧＢＴ１１の中央部１１ａから放熱器４０に至る熱流路は、熱抵抗が高く熱が伝導されにくい。一方、ＩＧＢＴ１１の周辺部１１ｂから放熱器４０に至る熱流路は、中央部１１ａと比較すると熱抵抗が低く熱が伝導されやすい。これにより、ＩＧＢＴ１１の駆動時には、中央部１１ａの温度が周辺部１１ｂの温度と比較して高くなり、温度勾配が大きくなる。そこで、半導体装置１０では、ＩＧＢＴ１１における温度勾配を小さくするために、接続層３０を以下のように構成する。   Therefore, the heat flow path from the central portion 11a of the IGBT 11 to the radiator 40 has a high thermal resistance and heat is not easily conducted. On the other hand, the heat flow path from the peripheral part 11b of the IGBT 11 to the radiator 40 has a lower thermal resistance than the central part 11a, and heat is easily conducted. Thus, when the IGBT 11 is driven, the temperature of the central portion 11a is higher than the temperature of the peripheral portion 11b, and the temperature gradient is increased. Therefore, in the semiconductor device 10, the connection layer 30 is configured as follows in order to reduce the temperature gradient in the IGBT 11.

図２に示すように、接続層３０は、ＩＧＢＴ１１と回路パターン２１とを機械的に接合する接合部としてのはんだ層３２と、はんだ層３２と比較して電気抵抗が高い高抵抗部としてのダイオード３１とを備える。   As shown in FIG. 2, the connection layer 30 includes a solder layer 32 as a joint that mechanically joins the IGBT 11 and the circuit pattern 21, and a diode as a high resistance portion that has a higher electrical resistance than the solder layer 32. 31.

ダイオード３１は、駆動時に温度が最大になるＩＧＢＴ１１の一部に臨んで設けられる。ここでは、ダイオード３１は、ＩＧＢＴ１１の中央部１１ａに臨んで設けられる。ダイオード３１は、ＩＧＢＴ１１と同程度の厚さの金属で矩形である。ダイオード３１の熱抵抗は、はんだ層３２と同程度である。これにより、ダイオード３１が設けられたときにも、ＩＧＢＴ１１から放熱器までの熱抵抗の増加が抑制され、放熱性能が確保される。   The diode 31 is provided so as to face a part of the IGBT 11 whose temperature becomes maximum at the time of driving. Here, the diode 31 is provided facing the central portion 11a of the IGBT 11. The diode 31 is a metal with a thickness similar to that of the IGBT 11 and is rectangular. The thermal resistance of the diode 31 is about the same as that of the solder layer 32. Thereby, even when the diode 31 is provided, an increase in thermal resistance from the IGBT 11 to the radiator is suppressed, and heat dissipation performance is ensured.

ダイオード３１は、はんだ層３２と比べて電気抵抗が高い。よって、ダイオード３１を流れる電流は、はんだ層３２を流れる電流と比べて小さい。即ち、ダイオード３１が設けられることで、回路パターン２１からダイオード３１を介してＩＧＢＴ１１の中央部１１ａに流れる電流が小さくなり、その分だけ周囲のはんだ層３２に流れる電流が大きくなる。   The diode 31 has a higher electrical resistance than the solder layer 32. Therefore, the current flowing through the diode 31 is smaller than the current flowing through the solder layer 32. That is, by providing the diode 31, the current flowing from the circuit pattern 21 to the central portion 11a of the IGBT 11 via the diode 31 is reduced, and the current flowing to the surrounding solder layer 32 is increased accordingly.

はんだ層３２の外径は、ＩＧＢＴ１１と略同一であり、ダイオード３１の周囲に設けられる。はんだ層３２は、はんだペレットによって形成される。はんだペレットは、ダイオード３１とともにＩＧＢＴ１１と基板２０との間に固体の状態で配置される。はんだペレットは、ＩＧＢＴ１１の上面及び基板２０の下面から熱を加えることによって溶融してダイオード３１を内包し、そのまま冷却されることによって固化する。   The outer diameter of the solder layer 32 is substantially the same as that of the IGBT 11 and is provided around the diode 31. The solder layer 32 is formed by solder pellets. The solder pellet is disposed in a solid state between the IGBT 11 and the substrate 20 together with the diode 31. The solder pellet is melted by applying heat from the upper surface of the IGBT 11 and the lower surface of the substrate 20 to enclose the diode 31, and is solidified by being cooled as it is.

次に、主に図３を参照して、半導体装置１０における接続層３０の作用について説明する。   Next, the operation of the connection layer 30 in the semiconductor device 10 will be described mainly with reference to FIG.

図３の横軸は、ＩＧＢＴ１１の中心からの距離であり、図３の縦軸は、ＩＧＢＴ１１の温度である。図３において、曲線Ａは、半導体装置１０におけるＩＧＢＴ１１の中心からの距離に対する温度を示すグラフである。曲線Ｂは、曲線Ａと比較するための比較例であり、接続層３０にダイオード３１を設けず、接続層３０の全てをはんだ層のみで形成した場合のＩＧＢＴ１１の温度を示すグラフである。これらのグラフの傾きが温度勾配であり、この温度勾配が大きいほどＩＧＢＴ１１の部位間の温度差が大きいこととなる。   The horizontal axis in FIG. 3 is the distance from the center of the IGBT 11, and the vertical axis in FIG. 3 is the temperature of the IGBT 11. In FIG. 3, a curve A is a graph showing the temperature with respect to the distance from the center of the IGBT 11 in the semiconductor device 10. A curve B is a comparative example for comparison with the curve A, and is a graph showing the temperature of the IGBT 11 when the diode 31 is not provided in the connection layer 30 and all of the connection layer 30 is formed of only a solder layer. The slopes of these graphs are temperature gradients, and the greater the temperature gradient, the greater the temperature difference between the parts of the IGBT 11.

曲線Ｂに示すように、接続層３０の全てがはんだ層である場合には、ＩＧＢＴ１１は、放熱性の低い中央部１１ａの温度が最も高くなる。ＩＧＢＴ１１の発熱は中心からの距離にかかわらず略均等である。周辺部１１ｂは、中央部１１ａと比べて放熱性が高いため、冷却されて温度が低くなる。この結果、中央部１１ａの温度が周辺部１１ｂと比べて局所的に高温になり、温度勾配が大きくなる。   As shown in the curve B, when all of the connection layers 30 are solder layers, the IGBT 11 has the highest temperature of the central portion 11a having low heat dissipation. The heat generation of the IGBT 11 is substantially uniform regardless of the distance from the center. Since the peripheral portion 11b has higher heat dissipation than the central portion 11a, the peripheral portion 11b is cooled and the temperature is lowered. As a result, the temperature of the central portion 11a is locally higher than that of the peripheral portion 11b, and the temperature gradient is increased.

これに対して半導体装置１０では、接続層３０の略中央にダイオード３１を設けたことによって、ＩＧＢＴ１１の中央部１１ａの温度が低くなって温度勾配が小さくなり、局所的に高温になることを防止できる。   On the other hand, in the semiconductor device 10, by providing the diode 31 at the approximate center of the connection layer 30, the temperature of the central portion 11a of the IGBT 11 is lowered, the temperature gradient is reduced, and locally high temperature is prevented. it can.

具体的に説明すると、ダイオード３１は、はんだ層３２と比べて電気抵抗が大きいため、ＩＧＢＴ１１の中央部１１ａに流れる電流より、周辺部１１ｂに流れる電流の方が大きくなる。よって、電流の流れによる発熱は、周辺部１１ｂに比べて中央部１１ａの方が小さくなる。したがって、半導体装置１０では、放熱性の低い中央部１１ａの発熱を抑制し、その分の熱を放熱性の高い周辺部１１ｂに積極的に導くことで、ＩＧＢＴ１１の温度勾配を低減できる。   Specifically, since the diode 31 has a larger electric resistance than the solder layer 32, the current flowing in the peripheral portion 11b is larger than the current flowing in the central portion 11a of the IGBT 11. Therefore, heat generated by the flow of current is smaller in the central portion 11a than in the peripheral portion 11b. Therefore, in the semiconductor device 10, the temperature gradient of the IGBT 11 can be reduced by suppressing the heat generation in the central portion 11a with low heat dissipation and actively guiding the heat to the peripheral portion 11b with high heat dissipation.

また、ダイオード３１の熱抵抗は、はんだ層３２と同程度であるため、ダイオード３１が設けられてもＩＧＢＴ１１からダイオード３１を介して放熱器４０に至る熱流路の熱抵抗は増加しない。よって、接続層３０がダイオード３１を備える場合にもＩＧＢＴ１１の放熱性能を確保できる。   Moreover, since the thermal resistance of the diode 31 is approximately the same as that of the solder layer 32, even if the diode 31 is provided, the thermal resistance of the heat flow path from the IGBT 11 to the radiator 40 via the diode 31 does not increase. Therefore, even when the connection layer 30 includes the diode 31, the heat dissipation performance of the IGBT 11 can be ensured.

以上の実施の形態によれば、以下に示す効果を奏する。   According to the above embodiment, the following effects are obtained.

駆動時に温度が最大になるＩＧＢＴ１１の一部に臨んでダイオード３１が設けられる。ダイオード３１に流れる電流は、はんだ層３２に流れる電流と比較して小さいため、ダイオード３１における電流の流れによる発熱が抑制される。したがって、ＩＧＢＴ１１の放熱性能を確保しつつ温度勾配を低減できる。この結果、ＩＧＢＴ１１が駆動中に高熱になることが抑制され、半導体装置１０の長期信頼性が確保される。   A diode 31 is provided so as to face a part of the IGBT 11 whose temperature is maximized during driving. Since the current flowing through the diode 31 is smaller than the current flowing through the solder layer 32, heat generation due to the current flow in the diode 31 is suppressed. Therefore, the temperature gradient can be reduced while ensuring the heat dissipation performance of the IGBT 11. As a result, the IGBT 11 is prevented from becoming hot during driving, and the long-term reliability of the semiconductor device 10 is ensured.

（第２の実施の形態）
以下、図４を参照して、本発明の第２の実施の形態に係る半導体装置１１０について説明する。なお、以下に示す各実施形態では前述した実施の形態と同様の構成には同一の符号を付し、重複する説明は適宜省略する。 (Second Embodiment)
A semiconductor device 110 according to the second embodiment of the present invention will be described below with reference to FIG. In the following embodiments, the same reference numerals are given to the same components as those in the above-described embodiments, and the overlapping description will be omitted as appropriate.

第２の実施の形態は、複数のＩＧＢＴ１１が同一平面上に実装される点で、第１の実施の形態とは相違する。   The second embodiment is different from the first embodiment in that a plurality of IGBTs 11 are mounted on the same plane.

半導体装置１１０は、単一の基板２０の同一の面上に近接して実装される一対のＩＧＢＴ１１を備える。ここでは、一対のＩＧＢＴ１１のうち一方をＩＧＢＴ１１１とし、他方をＩＧＢＴ１１２とする。また、ＩＧＢＴ１１１，１１２下面の接合部において互いに対向する部分をそれぞれ対向部１１１ａ，１１２ａとし、その周辺の残りの部分をそれぞれ周辺部１１１ｂ，１１２ｂとする。   The semiconductor device 110 includes a pair of IGBTs 11 mounted in close proximity on the same surface of a single substrate 20. Here, one of the pair of IGBTs 11 is an IGBT 111 and the other is an IGBT 112. Further, the facing portions 111a and 112a are the portions facing each other at the joints on the lower surfaces of the IGBTs 111 and 112, and the remaining portions around the portions are the surrounding portions 111b and 112b, respectively.

一対のＩＧＢＴ１１は、一対の接続層１３０によって基板２０の回路パターン２１に電気的に接続される。具体的には、ＩＧＢＴ１１１は、接続層１３０ａを介して回路パターン２１と接続され、ＩＧＢＴ１１２は、接続層１３０ｂを介して回路パターン２１と接続される。   The pair of IGBTs 11 are electrically connected to the circuit pattern 21 of the substrate 20 by a pair of connection layers 130. Specifically, the IGBT 111 is connected to the circuit pattern 21 via the connection layer 130a, and the IGBT 112 is connected to the circuit pattern 21 via the connection layer 130b.

ＩＧＢＴ１１１，１１２の発熱は、基板２０を挟んでＩＧＢＴ１１１，１１２と対向して設けられる放熱器４０に伝導される。ＩＧＢＴ１１１，１１２の発熱は、放熱器４０に至るまでに拡散するが、近接したＩＧＢＴ１１１，１１２間では、熱流干渉によって温度が上昇する。即ち、ＩＧＢＴ１１１の対向部１１１ａ及びＩＧＢＴ１１２の対向部１１２ａの発熱は、逃げ場がないため充分に拡散できずに放熱器４０に伝導される。   The heat generated by the IGBTs 111 and 112 is conducted to a radiator 40 provided to face the IGBTs 111 and 112 with the substrate 20 interposed therebetween. The heat generated by the IGBTs 111 and 112 diffuses up to the radiator 40, but the temperature increases between the adjacent IGBTs 111 and 112 due to heat flow interference. In other words, the heat generated in the facing portion 111a of the IGBT 111 and the facing portion 112a of the IGBT 112 is conducted to the radiator 40 without being sufficiently diffused because there is no escape.

そのため、ＩＧＢＴ１１１，１１２の対向部１１１ａ，１１２ａから放熱器４０に至る熱流路は、熱抵抗が高く熱が伝導されにくい。一方、ＩＧＢＴ１１１，１１２の周辺部１１１ｂ，１１２ｂから放熱器４０に至る熱流路は、対向部１１１ａ，１１２ａと比較すると熱抵抗が低く熱が伝導されやすい。これにより、ＩＧＢＴ１１１，１１２の駆動時には、対向部１１１ａ，１１２ａの温度が周辺部１１１ｂ，１１２ｂの温度と比較して高くなり、温度勾配が大きくなる。そこで、半導体装置１１０では、一対のＩＧＢＴ１１１，１１２における温度勾配を小さくするために、接続層１３０ａ，１３０ｂを以下のように構成する。   Therefore, the heat flow path from the opposing portions 111a and 112a of the IGBTs 111 and 112 to the radiator 40 has high thermal resistance and heat is not easily conducted. On the other hand, the heat flow path from the peripheral portions 111b and 112b of the IGBTs 111 and 112 to the radiator 40 has a lower thermal resistance than the opposing portions 111a and 112a, and heat is easily conducted. Thus, when the IGBTs 111 and 112 are driven, the temperatures of the facing portions 111a and 112a are higher than the temperatures of the peripheral portions 111b and 112b, and the temperature gradient is increased. Therefore, in the semiconductor device 110, the connection layers 130a and 130b are configured as follows in order to reduce the temperature gradient in the pair of IGBTs 111 and 112.

接続層１３０ａ，１３０ｂは、ＩＧＢＴ１１と回路パターン２１とを機械的に接合する接合部としてのはんだ層１３２ａ，１３２ｂと、はんだ層１３２ａ，１３２ｂと比較して電気抵抗が高い高抵抗部としての一対のダイオード３１とを備える。ここでは、一対のダイオード３１のうち接続層１３０ａに設けられるものをダイオード１３１ａとし、接続層１３０ｂに設けられるものをダイオード１３１ｂとする。   The connection layers 130a and 130b are a pair of solder layers 132a and 132b serving as joints for mechanically joining the IGBT 11 and the circuit pattern 21, and a pair of high resistance portions having higher electrical resistance than the solder layers 132a and 132b. And a diode 31. Here, of the pair of diodes 31, one provided in the connection layer 130 a is referred to as a diode 131 a and one provided in the connection layer 130 b is referred to as a diode 131 b.

ダイオード１３１ａ，１３１ｂは、それぞれ対向部１１１ａ，１１２ａに対応して設けられる。ダイオード１３１ａ，１３１ｂは、基板２０上で互いに対向するように配置される。   The diodes 131a and 131b are provided corresponding to the facing portions 111a and 112a, respectively. The diodes 131a and 131b are arranged on the substrate 20 so as to face each other.

はんだ層１３２ａ，１３２ｂは、それぞれ周辺部１１１ｂ，１１２ｂに対応して設けられる。   The solder layers 132a and 132b are provided corresponding to the peripheral portions 111b and 112b, respectively.

半導体装置１１０では、接続層１３０におけるＩＧＢＴ１１１とＩＧＢＴ１１２とが対向する部分にそれぞれダイオード３１を設けたことによって、熱流干渉によって温度が上昇するＩＧＢＴ１１１の対向部１１１ａ，１１２ａの温度が低くなって温度勾配が小さくなり、局所的に高温になることを防止できる。   In the semiconductor device 110, by providing the diodes 31 at the portions of the connection layer 130 where the IGBT 111 and the IGBT 112 face each other, the temperature of the facing portions 111a and 112a of the IGBT 111 whose temperature rises due to heat flow interference is lowered and the temperature gradient is increased. It becomes small and can prevent becoming high temperature locally.

具体的には、ダイオード３１は、はんだ層１３２と比べて電気抵抗が大きいため、ＩＧＢＴ１１１，１１２の対向部１１１ａ，１１２ａに流れる電流より、周辺部１１１ｂ，１１２ｂに流れる電流の方が大きくなる。よって、電流の流れによる発熱は、周辺部１１１ｂ，１１２ｂに比べて対向部１１１ａ，１１２ａの方が小さくなる。即ち、半導体装置１１０では、放熱性の低い対向部１１１ａ，１１２ａの発熱を抑制し、その分の熱を放熱性の高い周辺部１１１ｂ，１１２ｂに積極的に導いている。   Specifically, since the diode 31 has a larger electric resistance than the solder layer 132, the current flowing in the peripheral portions 111b and 112b is larger than the current flowing in the opposing portions 111a and 112a of the IGBTs 111 and 112. Therefore, the heat generation due to the current flow is smaller in the facing portions 111a and 112a than in the peripheral portions 111b and 112b. That is, in the semiconductor device 110, heat generation of the opposing portions 111a and 112a having low heat dissipation is suppressed, and the corresponding heat is positively guided to the peripheral portions 111b and 112b having high heat dissipation.

以上の実施の形態によれば、ＩＧＢＴ１１１，１１２を近接して設けた場合におけるＩＧＢＴ１１１，１１２間の熱流干渉による温度の上昇を低減できる。したがって、ＩＧＢＴ１１１，１１２の放熱性能を確保しつつ温度勾配を低減できる。   According to the above embodiment, the temperature rise due to the heat flow interference between the IGBTs 111 and 112 when the IGBTs 111 and 112 are provided close to each other can be reduced. Therefore, the temperature gradient can be reduced while ensuring the heat dissipation performance of the IGBTs 111 and 112.

（第３の実施の形態）
以下、図５を参照して、本発明の第３の実施の形態に係る半導体装置２１０について説明する。 (Third embodiment)
The semiconductor device 210 according to the third embodiment of the present invention will be described below with reference to FIG.

第３の実施の形態は、単一のＩＧＢＴ１１を挟んで対向する一対の基板２２０が設けられる点で、上述した実施の形態とは相違する。   The third embodiment is different from the above-described embodiment in that a pair of substrates 220 facing each other with a single IGBT 11 interposed therebetween is provided.

ＩＧＢＴ１１は、一対の基板２２０に挟持され、上面及び下面がそれぞれ接続層２３０ａ，２３０ｂを介して基板２２０に電気的に接続される。   The IGBT 11 is sandwiched between a pair of substrates 220, and an upper surface and a lower surface are electrically connected to the substrate 220 via connection layers 230a and 230b, respectively.

ＩＧＢＴ１１の上面及び下面は、接続層２３０ａ，２３０ｂを介して上下の基板２２０の回路パターン２２１と電気的に接続される。ＩＧＢＴ１１の下面は、全面が接続層２３０ａを介して一方の基板２２０に接合される。ＩＧＢＴ１１の上面は、コントローラからの信号が入力される端子部を除いた面が接続層２３０ｂを介して他方の基板２２０に接合される。   The upper surface and the lower surface of the IGBT 11 are electrically connected to the circuit patterns 221 of the upper and lower substrates 220 via connection layers 230a and 230b. The entire lower surface of the IGBT 11 is bonded to one substrate 220 via the connection layer 230a. The upper surface of the IGBT 11 is bonded to the other substrate 220 through the connection layer 230b except for the terminal portion to which a signal from the controller is input.

ＩＧＢＴ１１の発熱は、各々の基板２２０を挟んでＩＧＢＴ１１と対向して設けられる一対の放熱器４０に伝導される。ＩＧＢＴ１１の発熱は、放熱器４０に至るまでに拡散するが、このときＩＧＢＴ１１の中央部１１ａの発熱は、逃げ場がないため充分に拡散できずに放熱器４０に伝導される。   The heat generated by the IGBT 11 is conducted to a pair of radiators 40 provided to face the IGBT 11 with each substrate 220 interposed therebetween. The heat generated in the IGBT 11 is diffused up to the heat radiator 40. At this time, the heat generated in the central portion 11a of the IGBT 11 is not sufficiently diffused and is conducted to the heat radiator 40 without being escaped.

そのため、ＩＧＢＴ１１の中央部１１ａから放熱器４０に至る熱流路は、熱抵抗が高く熱が伝導されにくい。一方、ＩＧＢＴ１１の周辺部１１ｂから放熱器４０に至る熱流路は、中央部１１ａと比較すると熱抵抗が低く熱が伝導されやすい。これにより、ＩＧＢＴ１１の駆動時には、中央部１１ａの温度が周辺部１１ｂの温度と比較して高くなり、温度勾配が大きくなる。そこで、半導体装置２１０では、ＩＧＢＴ１１における温度勾配を小さくするために、接続層２３０ａ，２３０ｂを以下のように構成する。   Therefore, the heat flow path from the central portion 11a of the IGBT 11 to the radiator 40 has a high thermal resistance and heat is not easily conducted. On the other hand, the heat flow path from the peripheral part 11b of the IGBT 11 to the radiator 40 has a lower thermal resistance than the central part 11a, and heat is easily conducted. Thus, when the IGBT 11 is driven, the temperature of the central portion 11a is higher than the temperature of the peripheral portion 11b, and the temperature gradient is increased. Therefore, in the semiconductor device 210, in order to reduce the temperature gradient in the IGBT 11, the connection layers 230a and 230b are configured as follows.

ＩＧＢＴ１１の下面と基板２２０とを接続する接続層２３０ａは、ＩＧＢＴ１１と回路パターン２２１とを機械的に接合する接合部としてのはんだ層２３２ａと、はんだ層２３２ａと比較して電気抵抗が高い高抵抗部としてのダイオード３１とを備える。   The connection layer 230a that connects the lower surface of the IGBT 11 and the substrate 220 includes a solder layer 232a as a joint that mechanically joins the IGBT 11 and the circuit pattern 221 and a high resistance portion that has higher electrical resistance than the solder layer 232a. As a diode 31.

一方、ＩＧＢＴ１１上面と基板２２０とを接続する接続層２３０ｂは、全体がはんだ層２３２ｂである。   On the other hand, the entire connection layer 230b that connects the upper surface of the IGBT 11 and the substrate 220 is a solder layer 232b.

ダイオード３１は、ここでは接続層２３０ａにのみ設けられるが、少なくともいずれか一方の基板２２０に臨んで設けられればよい。よって、ダイオード３１を接続層２３０ａに設けず、接続層２３０ｂにのみ設けてもよい。また、ダイオード３１を、接続層２３０ａ，２３０ｂのそれぞれに設けてもよい。   Although the diode 31 is provided only on the connection layer 230 a here, it may be provided so as to face at least one of the substrates 220. Therefore, the diode 31 may be provided only in the connection layer 230b without being provided in the connection layer 230a. Further, the diode 31 may be provided in each of the connection layers 230a and 230b.

半導体装置２１０では、一方の接続層２３０ａの略中央にダイオード３１を設けたことによって、ＩＧＢＴ１１の中央部１１ａの温度が低くなって温度勾配が小さくなり、局所的に高温になることを防止できる。   In the semiconductor device 210, by providing the diode 31 at the approximate center of one connection layer 230a, the temperature of the central portion 11a of the IGBT 11 becomes low, the temperature gradient becomes small, and it can be prevented that the temperature becomes locally high.

具体的に説明すると、ダイオード３１は、はんだ層２３２ａと比べて電気抵抗が大きいため、ＩＧＢＴ１１の中央部１１ａに流れる電流より、周辺部１１ｂに流れる電流の方が大きくなる。よって、電流の流れによる発熱は、周辺部１１ｂに比べて中央部１１ａの方が小さくなる。即ち、半導体装置２１０では、放熱性の低い中央部１１ａの発熱を抑制し、その分の熱を放熱性の高い周辺部１１ｂに積極的に導いている。   Specifically, since the diode 31 has a larger electric resistance than the solder layer 232a, the current flowing through the peripheral portion 11b is larger than the current flowing through the central portion 11a of the IGBT 11. Therefore, heat generated by the flow of current is smaller in the central portion 11a than in the peripheral portion 11b. That is, in the semiconductor device 210, heat generation in the central portion 11a having low heat dissipation is suppressed, and the corresponding heat is positively guided to the peripheral portion 11b having high heat dissipation.

ここで、ダイオード３１は、一方の接続層２３０ａにのみ設けられる。ＩＧＢＴ１１の上下の接続層２３０ａ，２３０ｂのうちいずれか一方にダイオード３１が設けられることによって、ＩＧＢＴ１１の発熱は、中央部１１ａから周辺部１１ｂに分散される。よって、ダイオード３１は接続層２３０ａ，２３０ｂの少なくともいずれか一方に設けられるため、部品点数増加によるコスト増を抑えつつ、温度勾配を低減できる。   Here, the diode 31 is provided only in one connection layer 230a. By providing the diode 31 in one of the upper and lower connection layers 230a and 230b of the IGBT 11, the heat generated by the IGBT 11 is dispersed from the central portion 11a to the peripheral portion 11b. Therefore, since the diode 31 is provided in at least one of the connection layers 230a and 230b, the temperature gradient can be reduced while suppressing an increase in cost due to an increase in the number of components.

以上の実施の形態によれば、接続層２３０ａにダイオード３１を設けたため、ＩＧＢＴ１１の放熱性能を確保しつつ温度勾配を低減できる。また、一方の接続層２３０ａにのみダイオード３１を設けたため、部品点数増加によるコストを抑制することができる。   According to the above embodiment, since the diode 31 is provided in the connection layer 230a, the temperature gradient can be reduced while ensuring the heat dissipation performance of the IGBT 11. Moreover, since the diode 31 is provided only in one connection layer 230a, the cost due to an increase in the number of parts can be suppressed.

本発明は上記の実施の形態に限定されずに、その技術的な思想の範囲内において種々の変更がなしうることは明白である。   The present invention is not limited to the above-described embodiment, and it is obvious that various modifications can be made within the scope of the technical idea.

例えば、はんだ層を、はんだペレットではなく、クリームはんだによって形成してもよい。また、はんだ層は、ＩＧＢＴと基板の回路パターンとを電気的に接続するとともに機械的に接合できればよいため、ＡＣＦ（Ａｎｉｓｏｔｒｏｐｉｃ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ：異方性導電接着フィルム）等であってもよい。   For example, the solder layer may be formed by cream solder instead of solder pellets. The solder layer may be an ACF (Anisotropic Conductive Film) or the like, as long as it can electrically connect the IGBT and the circuit pattern of the substrate and mechanically join them.

１００ 電気回路
１０ 半導体装置
１１ ＩＧＢＴ（半導体素子）
１１ａ 中央部
１１ｂ 周辺部
２０ 基板
２１ 回路パターン
３０ 接続層
３１ ダイオード（高抵抗部）
３２ はんだ層（接合部）
１１０ 半導体装置
２１０ 半導体装置 100 Electrical Circuit 10 Semiconductor Device 11 IGBT (Semiconductor Element)
11a Central part 11b Peripheral part 20 Substrate 21 Circuit pattern 30 Connection layer 31 Diode (high resistance part)
32 Solder layer (joint)
110 Semiconductor Device 210 Semiconductor Device

Claims (6)

電気回路に実装される半導体素子と、
前記電気回路に形成され、前記半導体素子との間で電気的に接続される回路パターンと、
前記半導体素子と前記回路パターンとの間に介在して両者を電気的に接続する接続層と、を備える半導体装置であって、
前記接続層は、
前記半導体素子と前記回路パターンとを機械的に接合する接合部と、
駆動時に温度が最大になる前記半導体素子の一部に臨んで設けられ、前記接合部と比較して電気抵抗が高い高抵抗部と、を有することを特徴とする半導体装置。 A semiconductor element mounted on an electric circuit;
A circuit pattern formed in the electric circuit and electrically connected to the semiconductor element;
A connection layer that is interposed between the semiconductor element and the circuit pattern to electrically connect both;
The connection layer is
A joint for mechanically joining the semiconductor element and the circuit pattern;
A semiconductor device, comprising: a high resistance portion that is provided facing a part of the semiconductor element having a maximum temperature during driving and has a higher electric resistance than the junction portion. 前記高抵抗部は、前記半導体素子の中央に臨んで設けられることを特徴とする請求項１に記載の半導体装置。   The semiconductor device according to claim 1, wherein the high resistance portion is provided facing a center of the semiconductor element. 前記回路パターンの同一平面上に実装される一対の前記半導体素子と、
前記一対の半導体素子と前記回路パターンとを各々接合する一対の接続層と、を備え、
前記一対の接続層は、互いに対向して設けられる前記高抵抗部をそれぞれ備えることを特徴とする請求項１に記載の半導体装置。 A pair of the semiconductor elements mounted on the same plane of the circuit pattern;
A pair of connection layers that respectively join the pair of semiconductor elements and the circuit pattern;
The semiconductor device according to claim 1, wherein each of the pair of connection layers includes the high resistance portion provided to face each other. 前記半導体素子を挟んで対向する一対の前記回路パターンを備え、
前記高抵抗部は、いずれか一方の前記回路パターンに対向して設けられることを特徴とする請求項１に記載の半導体装置。 A pair of circuit patterns facing each other with the semiconductor element interposed therebetween,
The semiconductor device according to claim 1, wherein the high resistance portion is provided to face any one of the circuit patterns. 前記高抵抗部は、金属で形成されることを特徴とする請求項１から４のいずれか一つに記載の半導体装置。   The semiconductor device according to claim 1, wherein the high resistance portion is made of metal. 前記高抵抗部は、前記半導体素子と同程度の厚さに形成されることを特徴とする請求項１から５のいずれか一つに記載の半導体装置。   6. The semiconductor device according to claim 1, wherein the high resistance portion is formed to have a thickness substantially equal to that of the semiconductor element.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104137244A (en) * 2012-02-22 2014-11-05 三菱电机株式会社 Semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183637A (en) * 2003-12-18 2005-07-07 Toyota Motor Corp Semiconductor device and electrode member to be used therefor
JP2007109834A (en) * 2005-10-13 2007-04-26 Fuji Electric Holdings Co Ltd Semiconductor device and method of manufacturing same
JP2007201314A (en) * 2006-01-30 2007-08-09 Toyota Central Res & Dev Lab Inc Semiconductor device
JP2008186957A (en) * 2007-01-29 2008-08-14 Honda Motor Co Ltd Semiconductor device and manufacturing method thereof
JP2009070863A (en) * 2007-09-11 2009-04-02 Hitachi Ltd Semiconductor power module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183637A (en) * 2003-12-18 2005-07-07 Toyota Motor Corp Semiconductor device and electrode member to be used therefor
JP2007109834A (en) * 2005-10-13 2007-04-26 Fuji Electric Holdings Co Ltd Semiconductor device and method of manufacturing same
JP2007201314A (en) * 2006-01-30 2007-08-09 Toyota Central Res & Dev Lab Inc Semiconductor device
JP2008186957A (en) * 2007-01-29 2008-08-14 Honda Motor Co Ltd Semiconductor device and manufacturing method thereof
JP2009070863A (en) * 2007-09-11 2009-04-02 Hitachi Ltd Semiconductor power module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104137244A (en) * 2012-02-22 2014-11-05 三菱电机株式会社 Semiconductor device
JPWO2013124989A1 (en) * 2012-02-22 2015-05-21 三菱電機株式会社 Semiconductor device
US9306046B2 (en) 2012-02-22 2016-04-05 Mitsubishi Electric Corporation Semiconductor device having a semiconductor element and a terminal connected to the semiconductor element

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