JP2011512741A - ミキサ回路 - Google Patents
ミキサ回路 Download PDFInfo
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- JP2011512741A JP2011512741A JP2010546409A JP2010546409A JP2011512741A JP 2011512741 A JP2011512741 A JP 2011512741A JP 2010546409 A JP2010546409 A JP 2010546409A JP 2010546409 A JP2010546409 A JP 2010546409A JP 2011512741 A JP2011512741 A JP 2011512741A
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- amplifier
- differential
- mixer circuit
- voltage source
- double balanced
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- 230000005540 biological transmission Effects 0.000 claims abstract description 45
- 230000008878 coupling Effects 0.000 claims abstract description 11
- 238000010168 coupling process Methods 0.000 claims abstract description 11
- 238000005859 coupling reaction Methods 0.000 claims abstract description 11
- 238000002955 isolation Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 5
- 230000005669 field effect Effects 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 230000002238 attenuated effect Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1433—Balanced arrangements with transistors using bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1441—Balanced arrangements with transistors using field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1491—Arrangements to linearise a transconductance stage of a mixer arrangement
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0001—Circuit elements of demodulators
- H03D2200/0033—Current mirrors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0041—Functional aspects of demodulators
- H03D2200/0043—Bias and operating point
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Superheterodyne Receivers (AREA)
Abstract
【選択図】図4
Description
Claims (11)
- ダブル・バランスド・ミキサ回路であって、
第1の差動制御端子と該第1の差動制御端子に印加される第1のRF差動入力信号(RF)に対応するそれぞれの第1の増幅器経路とを有する第1の増幅器素子(T1,T2)の差動対(102)と、
2つの第2の差動制御端子と該2つの第2の差動制御端子に印加される第2のRF差動入力信号(LO)に対応する2つの第2の増幅器経路と該2つの第2の増幅器経路に接続された差動出力端子(406)とを具備する第2の増幅器素子(T3,T4,T5,T6)の2つの差動対(104,106)と、
混合された差動増幅信号を前記差動出力端子(406)において生成するように、前記第1の増幅器経路および前記2つの第2の増幅器経路に対するDC電圧源レール(+V,−V)間にそれぞれ第1および第2の並列DC接続部を提供するとともに、前記DC電圧源レール間に前記第1および第2の増幅器経路の直列RF接続部を提供する結合素子と、
を備え、
前記結合素子は、前記DC電圧源レールの一方(+V)と前記第1の増幅器素子(T1,T2)のそれぞれ1つとの間に接続された前記第1の増幅器経路におけるそれぞれの伝送線(ZL6,ZL13&ZL7,ZL14)と、前記DC電圧源レールの他方(−V)と両方の前記第1の増幅器素子(T1,T2)との間に接続された共通伝送線(ZL1)とを含む、ダブル・バランスド・ミキサ回路。 - 前記第1の差動制御端子と前記第2の差動制御端子とに対するバイアスは、伝送線(ZL2,ZL3&ZL4,ZL5)を含む絶縁素子によってRF信号から絶縁される、請求項1に記載のダブル・バランスド・ミキサ回路。
- 前記絶縁素子の前記伝送線(ZL2,ZL3&ZL4,ZL5)は、それが伝送する前記RF信号の基本周波数の1/4波長に実質的に等しい長さである、請求項2に記載のダブル・バランスド・ミキサ回路。
- 前記直列RF接続部は、前記第1の増幅器経路と前記2つの第2の増幅器経路との間に接続された伝送線(ZL8,ZL9)を含む、請求項1乃至3のいずれか一項に記載のダブル・バランスド・ミキサ回路。
- 前記結合素子は、前記第2の増幅器素子と前記他方のDC電圧源レールとの間に接続された少なくとも1つの伝送線(ZL10,ZL11,ZL12)を含む、前記1乃至4のいずれか一項に記載のダブル・バランスド・ミキサ回路。
- 前記結合素子は、前記第2の増幅器素子のそれぞれの対(T3,T4&T5,T6)とノードとの間に接続された複数の伝送線(ZL11,ZL12)と、前記ノードと前記他方のDC電圧源レール(−V)との間に接続された伝送線(ZL10)とを含む、請求項5に記載のダブル・バランスド・ミキサ回路。
- 前記第2の増幅器素子のそれぞれの対と前記ノードとの間に接続された前記結合素子の前記複数の伝送線(ZL2,ZL3&ZL4,ZL5)は、それが伝送する前記RF信号の基本周波数の1/4波長に実質的に等しい長さである、請求項6に記載のダブル・バランスド・ミキサ回路。
- 前記結合素子は、前記DC電圧源レール間に接続された第1のミラー分岐部(T8,T9,RE5,RE6,RE7)と前記第2の増幅器素子(T3,T4&T5,T6)と前記他方のDC電圧源レール(−V)との間に直列に接続された第2のミラー分岐部(T7,RE4)とを有し、前記第2のミラー分岐部に制御電流を提供する電流ミラーを含む、請求項5または6に記載のダブル・バランスド・ミキサ回路。
- 前記第1のミラー分岐部(T8,T9,RE5,RE6,RE7)は、前記DC電圧源レール間に接続された分圧器(RE6,RE7)を含み、前記第2の増幅器素子のバイアスを提供する、請求項7に記載のダブル・バランスド・ミキサ回路。
- 前記第2のRF差動入力信号は局部情報源(LO)によって提供される、請求項1乃至10のいずれか一項に記載のダブル・バランスド・ミキサ回路。
- 前記第1の増幅器経路の各々は、前記DC電圧源レールの一方(+V)と前記第1の増幅器素子のそれぞれ1つ(T1,T2)との間に接続された前記複数の伝送線(ZL6,ZL7)のそれぞれ1つを含み、これら複数の伝送線の長さは前記RF信号の基本周波数の1/4波長に実質的に等しい、請求項1乃至10のいずれか一項に記載のダブル・バランスド・ミキサ回路。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/IB2008/050579 WO2009104055A1 (en) | 2008-02-18 | 2008-02-18 | Mixer circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011512741A true JP2011512741A (ja) | 2011-04-21 |
JP5128680B2 JP5128680B2 (ja) | 2013-01-23 |
Family
ID=40099482
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2010546409A Active JP5128680B2 (ja) | 2008-02-18 | 2008-02-18 | ミキサ回路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8198933B2 (ja) |
EP (1) | EP2245734B1 (ja) |
JP (1) | JP5128680B2 (ja) |
WO (1) | WO2009104055A1 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2807767B1 (fr) | 2000-04-12 | 2005-01-14 | Lab Francais Du Fractionnement | Anticorps monoclonaux anti-d |
WO2010010425A1 (en) | 2008-07-25 | 2010-01-28 | Freescale Semiconductor, Inc. | Heterodyne receiver |
US8593221B1 (en) * | 2010-11-23 | 2013-11-26 | Semtech Corporation | Methods and circuits for common mode stability and bandwidth broadening in transistor amplifiers |
WO2012111848A1 (ja) * | 2011-02-16 | 2012-08-23 | 日本電気株式会社 | ミキサ回路 |
CN104247259A (zh) * | 2012-04-20 | 2014-12-24 | 飞思卡尔半导体公司 | 动态分频器电路 |
RU2504072C1 (ru) * | 2012-10-09 | 2014-01-10 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Южно-Российский государственный университет экономики и сервиса" (ФГБОУ ВПО "ЮРГУЭС") | Аналоговый смеситель сигналов |
US9634611B1 (en) * | 2015-11-02 | 2017-04-25 | Inphi Corporation | Method for improving stable frequency response of variable gain amplifier |
CN109309480B (zh) * | 2018-10-29 | 2021-10-26 | 电子科技大学 | 一种低噪声开关跨导混频器 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0946138A (ja) * | 1995-07-25 | 1997-02-14 | Murata Mfg Co Ltd | ミキサ |
JPH1065452A (ja) * | 1996-04-26 | 1998-03-06 | Murata Mfg Co Ltd | ダブルバランスドミキサ |
JPH10242764A (ja) * | 1997-02-21 | 1998-09-11 | Toshiba Corp | ミキサー回路 |
JP2000138537A (ja) * | 1998-08-26 | 2000-05-16 | Nippon Telegr & Teleph Corp <Ntt> | 相補型ミキサ回路 |
JP2003234619A (ja) * | 2002-02-07 | 2003-08-22 | Nippon Telegr & Teleph Corp <Ntt> | 折り返し型ミキサ回路 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69426650T2 (de) | 1994-11-07 | 2001-09-06 | Alcatel Sa | Mischer für Sender, mit einem Eingang im Strom-Modus |
CA2224953A1 (en) | 1997-12-16 | 1999-06-16 | The University Of Waterloo | A low voltage topology for radio frequency integrated circuit design |
EP0982848B1 (en) * | 1998-08-26 | 2002-10-30 | Nippon Telegraph and Telephone Corporation | Complementary tuned mixer |
US6871057B2 (en) * | 2000-03-08 | 2005-03-22 | Nippon Telegraph And Telephone Corporation | Mixer circuit |
US20050124311A1 (en) * | 2003-12-03 | 2005-06-09 | Farsheed Mahmoudi | Low-voltage low-power high-linearity active CMOS mixer |
KR100783492B1 (ko) * | 2004-07-31 | 2007-12-11 | 인티그런트 테크놀로지즈(주) | 차동증폭회로 및 이를 포함한 믹서회로 |
JP4527469B2 (ja) * | 2004-08-20 | 2010-08-18 | 三菱電機株式会社 | ダイオードミキサ |
US7577418B2 (en) * | 2006-07-18 | 2009-08-18 | United Microelectronics Corp. | Sub-harmonic mixer and down converter with the same |
US20080113644A1 (en) * | 2006-11-14 | 2008-05-15 | Saverio Trotta | Low Noise Mixer |
-
2008
- 2008-02-18 WO PCT/IB2008/050579 patent/WO2009104055A1/en active Application Filing
- 2008-02-18 EP EP08710075.6A patent/EP2245734B1/en active Active
- 2008-02-18 JP JP2010546409A patent/JP5128680B2/ja active Active
- 2008-02-18 US US12/867,495 patent/US8198933B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0946138A (ja) * | 1995-07-25 | 1997-02-14 | Murata Mfg Co Ltd | ミキサ |
JPH1065452A (ja) * | 1996-04-26 | 1998-03-06 | Murata Mfg Co Ltd | ダブルバランスドミキサ |
JPH10242764A (ja) * | 1997-02-21 | 1998-09-11 | Toshiba Corp | ミキサー回路 |
JP2000138537A (ja) * | 1998-08-26 | 2000-05-16 | Nippon Telegr & Teleph Corp <Ntt> | 相補型ミキサ回路 |
JP2003234619A (ja) * | 2002-02-07 | 2003-08-22 | Nippon Telegr & Teleph Corp <Ntt> | 折り返し型ミキサ回路 |
Also Published As
Publication number | Publication date |
---|---|
US8198933B2 (en) | 2012-06-12 |
EP2245734A1 (en) | 2010-11-03 |
JP5128680B2 (ja) | 2013-01-23 |
EP2245734B1 (en) | 2014-07-02 |
US20100327939A1 (en) | 2010-12-30 |
WO2009104055A1 (en) | 2009-08-27 |
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