JP2011096722A - Compound semiconductor epitaxial wafer, method of manufacturing the same, and hemt element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compound semiconductor epitaxial wafer and a method of manufacturing the same in which an HEMT (High Electron Mobility Transistor) element having a good breakdown voltage without a rapid increase of a leak current even when the HEMT element is obtained from an outer peripheral part of the compound semiconductor epitaxial wafer, and to provide the HEMT element obtained by using such a compound semiconductor epitaxial wafer. <P>SOLUTION: The compound semiconductor epitaxial wafer 10 includes a buffer layer 3, a lower electron supply layer 4, an electron transit layer 5, an upper electron supply layer 6 on a substrate 1. The buffer layer 3 is made of AlGaAs. The lower electron supply layer 4 and upper electron supply layer 6 are made of AlGaAs. Al compositions of the lower electron supply layer 4 and the upper electron supply layer 6 is 0.20-0.27. An Al composition of the buffer layer 3 is smaller than that of the lower electron supply layer 4. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a compound semiconductor epitaxial wafer, a manufacturing method thereof, and a HEMT (High Electron Mobility Transistor) element.

  Compound semiconductors such as GaAs (gallium arsenide) and InGaAs (indium gallium arsenide) have a feature of higher electron mobility than Si (silicon) semiconductors. Taking advantage of this feature, GaAs and InGaAs are often used in devices that require high-speed operation and high-efficiency operation. A typical example is HEMT, which is used in a microwave amplifier for transmitting a mobile phone and a high-frequency amplifier for a receiving antenna for satellite broadcasting.

  As types of HEMTs, GaAs type and InGaAs type are known depending on the material used for the electron transit layer (channel layer). Further, from the viewpoint of the material of the electron supply layer (carrier supply layer), there are materials using GaAs, AlGaAs, or InGaP. Further, paying attention to the total number of electron supply layers, the electron supply layer can be divided into a single heterotype having a single layer on the channel layer and a double heterotype having electron supply layers above and below the channel layer.

  Conventionally, there is an example in which AlGaAs is used for the electron supply layer and InGaAs is used for the electron transit layer (channel layer) (see, for example, Patent Document 1 and Patent Document 2), and the HEMT compound used for manufacturing this InGaAs-based HEMT. The structure of the semiconductor epitaxial wafer will be described next.

This compound semiconductor epitaxial wafer for HEMT is composed of the following layers grown on a semi-insulating GaAs substrate. That is, in order from the GaAs substrate side, a lower buffer layer made of un-GaAs, an upper buffer layer made of un-AlGaAs having an Al composition of 0.20 or more and 0.50 or less, and an Al composition of 0.28 or more and 0.33. A lower electron supply layer made of n ⁺ -AlGaAs; an electron transit layer made of un-InGaAs; an upper electron supply layer made of n ⁺ -AlGaAs having an Al composition of 0.28 to 0.33; It has a Schottky layer made of AlGaAs and an ohmic contact layer made of n ⁺ -GaAs. Here, “un−” represents undoped, and “n ⁺ −” represents n-type and high carrier concentration (hereinafter the same).

JP 2002-367918 A JP 2001-326345 A

  However, in the HEMT device obtained from the outer peripheral portion of the conventional compound semiconductor epitaxial wafer for HEMT, a rapid increase in leak current was observed, resulting in a decrease in breakdown voltage.

  An object of the present invention is to provide a compound semiconductor epitaxial wafer capable of producing a HEMT device having a good breakdown voltage without causing a rapid increase in leakage current, even for a HEMT device obtained from the outer periphery of a compound semiconductor epitaxial wafer. It is to provide a method and a HEMT device.

  In order to achieve the above object, the present invention is configured as follows.

  According to a first aspect of the present invention, in a compound semiconductor epitaxial wafer having a buffer layer, a lower electron supply layer, an electron transit layer, and an upper electron supply layer on a substrate, the buffer layer is made of AlGaAs, The lower electron supply layer and the upper electron supply layer are made of AlGaAs, the Al composition of the lower electron supply layer and the upper electron supply layer is 0.20 or more and 0.27 or less, and the Al composition of the buffer layer is The compound semiconductor epitaxial wafer is smaller than the Al composition of the lower electron supply layer.

  According to a second aspect of the present invention, in the compound semiconductor epitaxial wafer according to the first aspect, the lower electron supply layer has a thickness of 3 nm to 6 nm, and the upper electron supply layer has a thickness of 10 nm to 15 nm. This is a compound semiconductor epitaxial wafer.

According to a third aspect of the present invention, in the compound semiconductor epitaxial wafer according to the first aspect or the second aspect, the buffer layer has a carrier concentration of 1.0 × 10 ¹⁶ cm ⁻³ or less, and It is a compound semiconductor epitaxial wafer having a layer thickness of 50 nm or more and 300 nm or less.

  According to a fourth aspect of the present invention, in the compound semiconductor epitaxial wafer according to any one of the first to third aspects, an Al composition of the buffer layer is smaller than an Al composition of the lower electron supply layer and the upper electron supply layer. It is a compound semiconductor epitaxial wafer.

According to a fifth aspect of the present invention, in the method for producing a compound semiconductor epitaxial wafer for producing the compound semiconductor epitaxial wafer according to any one of the first to fourth aspects, the MOVPE method is used for producing the compound semiconductor epitaxial wafer. In use, the growth surface of the substrate is disposed downward, and the V-group source gas, the III-group source gas, the dilution gas, and the dopant source gas are supplied corresponding to the layers, and the layers are epitaxially grown. It is a manufacturing method of a compound semiconductor epitaxial wafer.

  A sixth aspect of the present invention is a HEMT device having a source electrode, a drain electrode, and a gate electrode on the compound semiconductor epitaxial wafer according to any one of the first to fourth aspects.

  According to the present invention, even a HEMT device obtained from the outer periphery of a compound semiconductor epitaxial wafer can be obtained as a HEMT device having a good breakdown voltage without a sharp increase in leakage current.

It is sectional drawing which shows the structure of the compound semiconductor epitaxial wafer which concerns on one Embodiment of this invention. It is a wafer in-plane distribution map of the carrier concentration of the AlGaAs layer which has Al composition equivalent to the conventional electron supply layer. It is a wafer surface distribution map of the carrier concentration of the AlGaAs layer which has Al composition equivalent to the electron supply layer which concerns on one Embodiment of this invention. It is a figure which shows the relationship between the applied voltage and the leakage current in the HEMT element of a comparative example. It is a figure which shows the relationship between the applied voltage and the leakage current in the HEMT element of the Example of this invention. It is the figure which plotted the leakage current value in each point of the wafer radial direction at the time of applied voltage 3.5V with respect to the HEMT element of a comparative example. It is the figure which plotted the leakage current value in each point of the wafer radial direction in the time of the applied voltage 3.5V with respect to the HEMT element of the Example of this invention. It is sectional drawing which shows the structure for the carrier concentration measurement of an AlGaAs layer. It is a top view which shows the electrode structure of FIG. It is sectional drawing of the HEMT element produced using the compound semiconductor epitaxial wafer. It is sectional drawing which shows schematic structure of the reactor of a MOVPE apparatus.

As described above, in the conventional compound semiconductor epitaxial wafer for HEMT, the HEMT device obtained from the outer peripheral portion of the epitaxial wafer showed a rapid increase in leakage current and a decrease in breakdown voltage.
As a result of diligent research, the present inventor has found that the cause of the sudden increase in leakage current at the outer periphery of the wafer is that the carrier concentration of the upper and lower electron supply layers increases at the outer periphery of the epitaxial wafer. It has been found that it is effective to lower the Al composition of the AlGaAs electron supply layer from the conventional 0.28 to 0.33 in order to suppress the increase in the carrier concentration of the electron supply layer in the outer peripheral portion of the wafer. The present invention has been made based on this finding.

  Next, how the carrier concentration distribution of the electron supply layer in the epitaxial wafer changes by changing the Al composition of the electron supply layer will be described.

In order to measure the carrier concentration of the electron supply layer, as shown in FIG. 8, a target carrier concentration of 9.0 × 10 ¹⁷ simulating an AlGaAs electron supply layer on a GaAs substrate (wafer) 1 having a diameter of 5 inches. A cm ⁻³ n ⁺ -AlGaAs layer 11 was grown to a thickness of 1000 nm. Then, electrodes 12 and 13 for measuring carrier concentration were formed on the n ⁺ -AlGaAs layer 11. The electrode 13 is a Schottky electrode 13 that makes Schottky contact with the n ⁺ -AlGaAs layer 11, and the electrode 12 is a pseudo-ohmic electrode 12 that makes pseudo-ohmic contact with the n ⁺ -AlGaAs layer 11. FIG. 9 is a plan view of the electrode structure of FIG. 8. A circular Schottky electrode 13 is provided at the center corresponding to each element formation region, and an annular pseudo-key is formed on the outer periphery of the Schottky electrode 13. An ohmic electrode 12 is provided. The carrier concentration was measured by applying an applied voltage between the Schottky electrode 13 and the pseudo-ohmic electrode 12 and measuring the current and phase difference of the n ⁺ -AlGaAs layer 11.

N ^{+ of} Al composition 0.28 in the Al composition range (0.28 to 0.33) of the conventional electron supply layer
FIG. 2 is a distribution diagram of the carrier concentration in the wafer plane when the AlGaAs layer 11 is used. Further, n ^{+ of} Al composition 0.225 in the Al composition range (0.20 to 0.27) of the electron supply layer of the present invention.
FIG. 3 is a distribution diagram of the carrier concentration in the wafer plane when the AlGaAs layer 11 is used.

As shown in FIG. 2, in the n ⁺ -AlGaAs layer 11 having an Al composition of 0.28, a substantially uniform carrier concentration is maintained from the wafer center to 56 mm, but the carrier concentration is sharper at the outer periphery than 56 mm. It has increased. At this time, the variation of the carrier concentration in the wafer surface was 3.09%. On the other hand, as shown in FIG. 3, in the n ⁺ -AlGaAs layer 11 having an Al composition of 0.225, although there is an increase in the carrier concentration at the outer peripheral portion of the wafer, no sudden increase in the carrier concentration is observed. The variation of the carrier concentration in the wafer surface was suppressed to 1.11%. Thus, it has been found that by reducing the Al composition, the doping amount in the outer peripheral portion of the wafer can be suppressed, and the variation in the wafer surface of the carrier concentration can be reduced. The variation in carrier concentration can be reduced because the amount of oxygen taken into the epitaxial layer can be suppressed by lowering the Al composition.

Further, as will be described later, the AlGaAs electron supply layer is made of HE having an Al composition of 0.28.
A compound semiconductor epitaxial wafer for MT and a compound semiconductor epitaxial wafer for HEMT having an Al composition of 0.225 were fabricated, and a HEMT device was fabricated using these epitaxial wafers. An epitaxial wafer having an electron supply layer of Al composition of 0.28 In the HEMT device obtained from FIG. 6, a sharp increase in leakage current was observed in the HEMT device on the outer periphery of the wafer as shown in FIG. 6, but the HEMT obtained from an epitaxial wafer with an electron supply layer having an Al composition of 0.225. In the device, as shown in FIG. 7, an increase in leakage current in the HEMT device on the outer periphery of the wafer is suppressed.

  Thus, there is a strong correlation between the increase in the carrier concentration of the electron supply layer in the outer peripheral portion of the epitaxial wafer and the increase in the leakage current of the HEMT element obtained from the outer peripheral portion of the epitaxial wafer, and AlAl in the AlGaAs electron supply layer By reducing the composition as compared with the conventional one, it is clear that an increase in the carrier concentration of the electron supply layer in the outer peripheral portion of the epitaxial wafer can be suppressed, and as a result, an increase in the leakage current of the HEMT device obtained from the outer peripheral portion of the epitaxial wafer can be suppressed. It became.

  Next, the structure of a compound semiconductor epitaxial wafer according to an embodiment of the present invention will be described.

FIG. 1 shows a cross-sectional structure of a compound semiconductor epitaxial wafer according to this embodiment. As shown in FIG. 1, a HEMT compound semiconductor epitaxial wafer 10 according to this embodiment includes a lower buffer layer 2 made of un-GaAs on a semi-insulating GaAs substrate 1 and a lower electron supply layer 4 having at least an Al composition. The upper buffer layer 3 made of p-AlGaAs having an Al composition smaller than the Al composition, the lower electron supply layer 4 made of n ⁺ -AlGaAs having an Al composition of 0.20 to 0.27, and the electron transit layer 5 made of un-InGaAs. An upper electron supply layer 6 made of n ⁺ -AlGaAs having an Al composition of 0.20 or more and 0.27 or less, a Schottky layer 7 made of un-AlGaAs, and an ohmic contact layer 8 made of n ⁺ -GaAs. It is formed sequentially.

  The GaAs substrate 1 is a base for growing a single crystal, and the buffer layers 2 and 3 are layers having a function of preventing deterioration of device characteristics due to residual impurities on the surface of the substrate 1 and a function of suppressing a leakage current of the electron transit layer 5. It is. The electron transit layer 5 is a layer through which free electrons flow, and must be highly pure. The electron supply layers 4 and 6 are layers for generating free electrons and supplying electrons to the electron transit layer 5. The Schottky layer 7 is a layer for forming a Schottky junction, and the ohmic contact layer 8 is a layer for forming an electrode.

In the above epitaxial laminated structure, by setting the Al composition of the lower and upper electron supply layers 4 and 6 to 0.20 or more and 0.27 or less (more preferably 0.20 or more and less than 0.23), a wafer having a carrier concentration Variation in in-plane distribution can be reduced. Al composition is 0.2
The reason why it is 0 or more is that in the structure according to this embodiment, if the Al composition is lower than 0.20, the electron mobility is lowered.

  The layer thickness of the lower electron supply layer 4 is 3 nm to 6 nm, and the layer thickness of the upper electron supply layer 6 is 10 nm to 15 nm. If the lower electron supply layer 4 is thick, the lower electron supply layer 4 becomes a leak path (leakage current path), leading to an increase in leak current. Therefore, the upper electron supply layer 6 is formed to be thick, for example, 10 nm to 15 nm in order to secure a desired electron supply amount while suppressing the layer thickness of the lower electron supply layer 4 to 3 nm to 6 nm.

The upper buffer layer 3 is a p-type layer having a carrier concentration of 1.0 × 10 ¹⁶ cm ⁻³ or less and a layer thickness of 50 nm to 300 nm. By setting the upper buffer layer 3 to be a p-type layer having a carrier concentration of 1.0 × 10 ¹⁶ cm ⁻³ or less and a layer thickness of 50 nm to 300 nm,
The upper buffer layer 3 can be depleted and leakage current to the upper buffer layer 3 can be suppressed. Further, by making the Al composition of the upper buffer layer 3 smaller than at least the Al composition of the lower electron supply layer 4, an effect of suppressing oxygen uptake can be obtained. At this time, the Al composition of the upper buffer layer 3 may be smaller than the Al composition of both the lower and upper electron supply layers 4 and 6.

  Next, a growth method using a metalorganic vapor phase epitaxy (MOVPE) apparatus will be described as an embodiment of the growth method of each epitaxial layer.

FIG. 11 shows the structure of the reactor 20 of the MOVPE apparatus. This reaction furnace 20 is a face-down type in which the crystal growth surface of the substrate is installed downward.
A disc-shaped susceptor 21 is horizontally installed in the reaction furnace 20, and a rotating shaft 22 is vertically attached to the center of the susceptor 21. As the rotary shaft 22 rotates, the susceptor 21 is driven to rotate around its central axis. A disc-shaped counter plate (quartz plate) 26 is disposed below the disc-shaped susceptor 21 so as to oppose the susceptor 21, and a cylindrical gas flow path is interposed between the susceptor 21 and the counter plate 26. 23 is formed. In the disc-shaped susceptor 21, a plurality of GaAs substrates (wafers) 1 are arranged at equal intervals along the circumferential direction of the susceptor 21 at positions slightly away from the center of the susceptor 21, and the growth of the surface of the substrate 1 is performed. It is provided facing the gas flow path 23 with the surface facing downward. Each GaAs substrate 1 is housed and held in a substrate holder (not shown), and each substrate holder is rotatably provided on a susceptor 21. When the susceptor 21 is rotated by the rotation of the rotating shaft 22, the GaAs substrate 1 (and the substrate holder) on the susceptor 21 is rotated (revolved) with the rotation of the susceptor 21 and is rotated by a gear mechanism or the like. ing. A substrate heating heater 24 is disposed above the susceptor 21 on the back side of the GaAs substrate 1, and the substrate 1 is heated by the heater 24. An introduction pipe 27 for supplying the raw material gas 25 to the gas flow path 23 is connected to the central portion of the counter plate 26.

  After the source gas 25 is introduced from the lower side of the central part of the susceptor 21 through the introduction pipe 27, the raw material gas 25 flows in the gas flow path 23 along the growth surface of the substrate 1 radially outward from the central part of the susceptor 21. It is exhausted from the side wall of the furnace 20. By supplying the source gas 25 to the substrate 1, the source gas 25 is thermally decomposed on the substrate 1 heated by the heater 24, and a semiconductor crystal is epitaxially grown on the substrate 1.

As the source gas 25, the necessary group III source gas, group V source gas, dilution gas and dopant source gas corresponding to each growing epitaxial layer are supplied, and the epitaxial layer is sequentially laminated on the substrate 1, The compound semiconductor epitaxial wafer 10 of the embodiment is produced.
Group III source gases include trimethylgallium (TMGa: Ga (CH ₃ ) ₃ ), triethylgallium (TEGa: Ga (C ₂ H ₆ ) ₃ ), trimethylaluminum (TMAl: Al (
CH _{3) 3),} triethyl aluminum _{(TEAl: Al (CH 3 CH} 2) 3), trimethyl indium _{(TMIn: In (CH 3)} 3), triethyl indium _{(TEIn: In (CH 3 CH} 2) 3) or the like As the V group source gas, arsine (AsH ₃ ), phosphine (PH ₃ ) or the like is used. In addition, disilane (Si ₂ H ₆ ), monosilane (SiH ₄ ), diethyl tellurium (Te (C ₂ H ₅ ) ₂ ) or the like is used as the n-type dopant material, and biscyclopentadienyl magnesium is used as the p-type dopant material. (Cp ₂ Mg), diethyl zinc (Zn (C ₂ H ₅ ) ₂ ), carbon tetrabromide (CBr ₄ ) or the like is used. As the dilution gas, H ₂ (hydrogen), N ₂ (nitrogen), Ar (argon), or the like is used.

  Next, a HEMT device using the above-described compound semiconductor epitaxial wafer 10 will be described with reference to FIG.

  As shown in FIG. 10, the compound semiconductor epitaxial wafer 10 is subjected to a process to form electrodes, and the HEMT device 17 is manufactured. That is, a part of the ohmic contact layer 8 is removed by selective etching, a part of the Schottky layer 7 is exposed, and the gate electrode 14 is formed on the exposed Schottky layer 7. A source electrode 16 and a drain electrode 15 are formed on the ohmic contact layer 8 so as to sandwich the gate electrode 14.

  In the compound semiconductor epitaxial wafer 10 of the present embodiment, an increase in the carrier concentration distribution in the outer peripheral portion of the upper and lower electron supply layers 4 and 6 is suppressed, and the uniformity of the carrier concentration in the wafer surface is improved. Even a HEMT element obtained from the outer periphery of the wafer does not increase a leak current rapidly, and a HEMT element having a good breakdown voltage can be obtained. In addition, the uniformity of the pinch-off voltage can be maintained by reducing the variation in the carrier concentration in the wafer surface.

  In the above embodiment, the growth method using the face-down type self-revolving MOVPE apparatus as shown in FIG. 11 has been described. However, a face-up type MOVPE apparatus that performs epitaxial growth with the growth surface of the substrate facing upward is used. Alternatively, an MOVPE apparatus using a horizontal growth furnace in which a source gas is allowed to flow horizontally from one end side to the other end side of the reaction furnace may be used. Alternatively, other growth methods such as molecular beam epitaxy (MBE) may be used.

  Moreover, in the laminated structure of the epitaxial layer of the compound semiconductor epitaxial wafer of the said embodiment, the structure of an epitaxial layer, the material of each epitaxial layer, layer thickness, etc. can be changed suitably. For example, the Al composition of the upper buffer layer is higher than the Al composition of the lower electron supply layer, the buffer layer is a single layer instead of the two-layer structure of the upper and lower buffer layers, or the electron supply layer is a single hetero type It is also possible. Further, as the electron transit layer, a GaAs layer may be used instead of the InGaAs layer. It is also possible to make the upper electron supply layer thinner than the lower electron supply layer.

  Although the HEMT has been described in the above embodiment, a technique of reducing the Al composition and suppressing the distribution of the carrier concentration in the wafer surface is also effective in an HBT (heterojunction bipolar transistor). In addition, the method of reducing the Al composition and suppressing the variation in the wafer surface distribution of the carrier concentration can be applied not only to electronic devices such as FETs and HEMTs, but also to semiconductor integrated circuits centering on them, It can also be used for light receiving elements.

  Hereinafter, specific examples of the present invention will be described.

A compound semiconductor epitaxial wafer for HEMT was manufactured by laminating an epitaxial layer on a GaAs substrate with the same configuration as the above embodiment shown in FIG. That is, on the semi-insulating GaAs substrate 1, an un-GaAs lower buffer layer 2, a p-AlGaAs upper buffer layer 3, an n ⁺ -AlGaAs lower electron supply layer 4, an un-InGaAs electron transit layer 5, The n ⁺ -AlGaAs upper electron supply layer 6, the un-AlGaAs Schottky layer 7, and the n ⁺ -GaAs ohmic contact layer 8 are sequentially stacked.

  Table 1 shows the layer structure of the compound semiconductor epitaxial wafer of the comparative example, and Table 2 shows the layer structure of the compound semiconductor epitaxial wafer of the example of the present invention.

As shown in Tables 1 and 2, the Al composition of the AlGaAs lower and upper electron supply layers 4 and 6 was 0.28 in the comparative example and 0.225 in the example. Other structures are the same as those of the comparative example and the example. For example, the thickness of the AlGaAs lower electron supply layer 4 is 5 nm in both the comparative example and the example, and the layer thickness of the AlGaAs upper electron supply layer 6 is 13 nm in both the comparative example and the example. The AlGaAs upper buffer layer 3 has a carrier concentration of 1.0 × 1 in both the comparative example and the example.
The p-type layer was 0 ¹⁶ cm ⁻³ , the Al composition was 0.20, and the layer thickness was 200 nm. I
The In composition of the nGaAs electron transit layer 5 was 0.20.

Each epitaxial layer of the compound epitaxial wafer 10 of the present invention was grown by a face-down type MOVPE apparatus having the structure shown in FIG.
As growth conditions, the substrate temperature during growth is 655 ° C., the pressure in the reactor 20 is about 666 Pa (50 Torr), and the dilution gas is hydrogen. As the group III organometallic source gas, TMGa,
TMAl and TMIn were used, and AsH ₃ was used as the group V source gas. Further, Si ₂ H ₆ was used as an n-type dopant material, and CBr ₄ was used as a p-type dopant material.

  The HEMT device is manufactured by performing a process such as providing an electrode on the compound semiconductor epitaxial wafer manufactured as described above.

Here, in order to measure the leakage current of the HEMT structure using the compound semiconductor epitaxial wafer of the comparative example and the example, the HEMT having a simple structure shown in FIG. 10 is used by using the compound semiconductor epitaxial wafer of the comparative example and the example. Element 17 was produced.
As shown in FIG. 10, the source electrode 16 and the drain electrode 15 were formed on the ohmic contact layer 8, and the gate electrode 14 was formed on the exposed Schottky layer 7 portion. Then, a reverse bias was applied to the gate electrode 14 of the HEMT element 17 so that the gate voltage and the threshold voltage were equal, a drain-source voltage was applied from 0 to 4 V, and a leak current I flowing between the drain and source was measured. . FIGS. 4 and 5 show leakage current profiles of HEMT elements at positions of 20 mm, 56 mm, and 60 mm from the wafer center. FIG. 4 is a profile of a HEMT device using a compound semiconductor epitaxial wafer of a comparative example, and FIG. 5 is a profile of a HEMT device using a compound semiconductor epitaxial wafer of an example.

In the comparative example having an Al composition of 0.28, as shown in FIG. 4, the leakage current suddenly increases and the breakdown voltage decreases at the outer peripheral portion of 56 mm or more from the wafer center. On the other hand, in the example using Al composition 0.225, as shown in FIG. 5, there is no sudden increase in leakage current at the outer periphery of the wafer, and the breakdown voltage characteristic is almost stable over the wafer surface. ing. As described above, the uniformity of the carrier concentration in the outer peripheral portion of the compound semiconductor epitaxial wafer was improved, so that the breakdown voltage characteristics could be made uniform throughout the entire wafer surface.

In addition, the leakage current value of the HEMT device on the outer periphery of the wafer when an applied voltage of 3.5 V was applied was measured. FIG. 6 is a plot of the leakage current value of the HEMT element at the outer periphery of the wafer of the comparative example, and FIG. 7 is a plot of the current value of the HEMT element at the outer periphery of the wafer of the example.
Table 3 summarizes the above results.

6 and 7, it can be seen that in the example, the leakage current is also suppressed at the wafer outer periphery. Thereby, there is no variation in the electrical characteristics of the device obtained in the wafer surface, and the yield in the manufacture of the HEMT element can be improved.
Further, from Table 3, as described in the above embodiment, since the Al composition of the AlGaAs electron supply layer is reduced as compared with the conventional case, the carrier in-plane uniformity of the carrier concentration of the AlGaAs electron supply layer is about 2% as compared with the conventional case. It was possible to improve. As a result, the difference in leakage current between the central portion of the wafer and the outermost HEMT element when 3.5 V was applied could be significantly reduced to about 17% of the comparative example in the example.

DESCRIPTION OF SYMBOLS 1 GaAs substrate 2 Lower buffer layer 3 Upper buffer layer 4 Lower electron supply layer 5 Electron travel layer 6 Upper electron supply layer 7 Schottky layer 8 Ohmic contact layer 10 Compound semiconductor epitaxial wafer 11 n ⁺ -AlGaAs layer 12 Pseudo ohmic electrode 13 Shot Key electrode 14 Gate electrode 15 Drain electrode 16 Source electrode 17 HEMT element 20 Reactor 21 Susceptor 22 Rotating shaft 23 Gas flow path 24 Heater 25 Source gas

Claims (6)

In a compound semiconductor epitaxial wafer having a buffer layer, a lower electron supply layer, an electron transit layer, and an upper electron supply layer on a substrate,
The buffer layer is made of AlGaAs,
The lower electron supply layer and the upper electron supply layer are made of AlGaAs,
The Al composition of the lower electron supply layer and the upper electron supply layer is 0.20 or more and 0.27 or less, and the Al composition of the buffer layer is smaller than the Al composition of the lower electron supply layer Semiconductor epitaxial wafer.   2. The compound semiconductor epitaxial wafer according to claim 1, wherein the lower electron supply layer has a thickness of 3 nm to 6 nm, and the upper electron supply layer has a thickness of 10 nm to 15 nm. Semiconductor epitaxial wafer. 3. The compound semiconductor epitaxial wafer according to claim 1, wherein the buffer layer is a p-type layer having a carrier concentration of 1.0 × 10 ¹⁶ cm ⁻³ or less and a layer thickness of 50 nm.
A compound semiconductor epitaxial wafer characterized by having a thickness of 300 nm or less. In the compound semiconductor epitaxial wafer according to any one of claims 1 to 3,
A compound semiconductor epitaxial wafer, wherein an Al composition of the buffer layer is smaller than an Al composition of the lower electron supply layer and the upper electron supply layer. In the manufacturing method of the compound semiconductor epitaxial wafer which produces the compound semiconductor epitaxial wafer in any one of Claims 1-4,
The compound semiconductor epitaxial wafer is manufactured by using the MOVPE method, the growth surface of the substrate is disposed downward, and the required group V source gas, group III source gas, dilution gas, dopant are provided corresponding to the respective layers. A method for producing a compound semiconductor epitaxial wafer, wherein a source gas is supplied to epitaxially grow each of the layers. In the compound semiconductor epitaxial wafer according to any one of claims 1 to 4,
A HEMT element comprising a source electrode, a drain electrode, and a gate electrode.

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