JP2005347499A - Epitaxial wafer for field effect transistor and epitaxial layer for high electron mobility transistor - Google Patents

Epitaxial wafer for field effect transistor and epitaxial layer for high electron mobility transistor Download PDF

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JP2005347499A
JP2005347499A JP2004165188A JP2004165188A JP2005347499A JP 2005347499 A JP2005347499 A JP 2005347499A JP 2004165188 A JP2004165188 A JP 2004165188A JP 2004165188 A JP2004165188 A JP 2004165188A JP 2005347499 A JP2005347499 A JP 2005347499A
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Shoichi Nagao
彰一 長尾
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Hitachi Cable Ltd
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<P>PROBLEM TO BE SOLVED: To improve electron mobility of the channel of a high electron mobility transistor using a δ-doped HEMT structure epitaxial wafer. <P>SOLUTION: When an epitaxial layer is formed on a GaAs substrate by using an organic metal vapor phase growth, the epitaxial layer is formed on a slightly inclined surface from a plane (100) of the GaAs substrate. This inclined surface is inclined at 0.4-1.1° in a direction [01-1] or a direction [0-11] from the plane (100). <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は電界効果トランジスタ用エピタキシャルウェハ及び高電子移動度トランジスタ用エピタキシャルウェハに係り、特にデバイス特性を改善したものに関する。   The present invention relates to an epitaxial wafer for a field effect transistor and an epitaxial wafer for a high electron mobility transistor, and more particularly to an improved device characteristic.

電界効果トランジスタ(FET)用エピタキシャルウェハのうち、ガリウム砒素(GaAs)やインジウムガリウム砒素(InGaAs)を用いたエピタキシャルウェハは、シリコン(Si)に比べて電子移動度が高いという特長をいかして高速デバイスに多く用いられている。代表例として高電子移動度トランジスタ(HEMT)が挙げられる。   Among epitaxial wafers for field effect transistors (FETs), epitaxial wafers using gallium arsenide (GaAs) or indium gallium arsenide (InGaAs) take advantage of the higher electron mobility than silicon (Si), and are high-speed devices. Is often used. A typical example is a high electron mobility transistor (HEMT).

HEMTの性能を向上させるには、より多くの多数キャリアをより高速に伝達できる構造とすること、即ち、キャリア濃度と移動度とを同時に高めることが大切である。一般に、半導体のキャリア濃度を高めるためには、ドーパントと呼ばれる不純物を半導体に添加(ドープ)する必要がある。ところが、半導体中にドープしたドーパントは、半導体中にキャリアを放出した後、帯電してイオン化不純物となり、多数キャリアの走行を妨げるため、キャリア濃度を高めようとして多量のドーパントをドープすると多数キャリアの移動度は、かえって低下してしまうという問題がある。   In order to improve the performance of the HEMT, it is important to have a structure that can transmit more majority carriers at a higher speed, that is, to simultaneously increase the carrier concentration and mobility. Generally, in order to increase the carrier concentration of a semiconductor, it is necessary to add (dope) an impurity called a dopant to the semiconductor. However, the dopant doped in the semiconductor discharges carriers into the semiconductor and then becomes charged and becomes ionized impurities, which prevents the majority carriers from traveling. Therefore, when a large amount of dopant is doped to increase the carrier concentration, the majority carriers move. However, there is a problem that the degree decreases.

この観点からHEMTの特性を向上する方法としては、電子供給層を薄層化すればよいことが分かっている。厚さを1原子層または数原子層以下まで薄層化した電子供給層はδドープ層と呼ばれ、キャリア走行内に溜まる電子の濃度をその移動度の大幅な低下なしに高めることができることから、δドープ層を有するHEMT構造からなるエピタキシャルウェハ(以下、δドープHEMT構造エピタキシャルウェハという)は高い特性が期待できるものである。   From this point of view, it has been found that the electron supply layer may be thinned as a method for improving the characteristics of the HEMT. An electron supply layer whose thickness is reduced to one atomic layer or several atomic layers or less is called a δ-doped layer, and can increase the concentration of electrons accumulated in the carrier travel without significantly lowering the mobility. An epitaxial wafer having a HEMT structure having a δ-doped layer (hereinafter referred to as a δ-doped HEMT structure epitaxial wafer) can be expected to have high characteristics.

このδドープHEMT構造エピタキシャルウェハの特性の良否を決める最も重要な特性の一つに、チャネルの電子移動度がある。このチャネルの電子移動度が高いほど、そのエピタキシャルウェハを用いて製作したデバイスの特性を向上させることができるからである。近年、デバイス特性向上の目的のために、δドープHEMT構造エピタキシャルウェハのチャネルの電子移動度向上の要求が強まってきている。   One of the most important characteristics that determine the quality of the δ-doped HEMT structure epitaxial wafer is the electron mobility of the channel. This is because the higher the electron mobility of the channel, the more the characteristics of the device manufactured using the epitaxial wafer can be improved. In recent years, for the purpose of improving device characteristics, there is an increasing demand for improving the electron mobility of the channel of the δ-doped HEMT structure epitaxial wafer.

従来、このようなエピタキシャルウェハを製造する方法として、有機金属気相成長法(MOVPE法)を用いてエピタキシャル成長させる方法が知られている。しかし、MOVPE法を用いてエピタキシャル成長させる場合、(100)面を使用すると、ヒロックの発生が避けがたい。このために、そのヒロックの発生を防止するために、GaAs基板の(100)面から僅かに傾斜した面の上に、MOVPE法を使用して、エピタキシャル層構造を形成することが行われている(例えば、特許文献1参照)。
特開平9−283444号公報(段落番号0005)
Conventionally, as a method of manufacturing such an epitaxial wafer, a method of epitaxial growth using a metal organic chemical vapor deposition method (MOVPE method) is known. However, when epitaxial growth is performed using the MOVPE method, the use of the (100) plane makes it difficult to avoid the generation of hillocks. For this reason, in order to prevent the generation of hillocks, an epitaxial layer structure is formed on the surface slightly inclined from the (100) plane of the GaAs substrate by using the MOVPE method. (For example, refer to Patent Document 1).
JP-A-9-283444 (paragraph number 0005)

しかしながら、上述した特許文献1に記載のものは、「GaAs基板の(100)面から僅かに傾斜した面の上に、MOVPE法を使用して、エピタキシャル層を形成する」とあるだけで、どの結晶方位に傾斜させたら良いのか、また傾斜させる場合、傾斜角度がいくらであると良いのかという具体的な限定がなされていない。即ち、従来、δドープHEMT構造エピタキシャルウェハ用のGaAs基板として、(100)面からの最適な傾斜方向と傾斜角度の両方を同時に規定したものはなかった。このため、δドープHEMT構造エピタキシャルウェハにおけるチャネルの電子移動度向上の要請に十分応えることができなかった。   However, the one described in the above-mentioned Patent Document 1 only describes that “the epitaxial layer is formed by using the MOVPE method on the surface slightly inclined from the (100) plane of the GaAs substrate”. There is no specific limitation as to whether it should be tilted in the crystal orientation or how much the tilt angle should be when tilted. That is, conventionally, there has been no GaAs substrate for a δ-doped HEMT structure epitaxial wafer that simultaneously defines both the optimum tilt direction and tilt angle from the (100) plane. For this reason, the request | requirement of the electron mobility improvement of the channel in (delta) dope HEMT structure epitaxial wafer was not able to be fully met.

本発明の目的は、上述した従来技術の問題点を解消して、δドープHEMT構造エピタキシャルウェハにおいて、基板表面である(100)面からの最適な傾斜方向と傾斜角度を具体的に規定することによって、そのエピタキシャルウェハにおけるチャネルの電子移動度を向上することが可能な電界効果トランジスタ用エピタキシャルウェハ及び高電子移動度トランジスタ用エピタキシャルウェハを提供することにある。   The object of the present invention is to solve the above-mentioned problems of the prior art and specifically define the optimum tilt direction and tilt angle from the (100) plane which is the substrate surface in the δ-doped HEMT structure epitaxial wafer. Accordingly, an object of the present invention is to provide an epitaxial wafer for a field effect transistor and an epitaxial wafer for a high electron mobility transistor capable of improving the electron mobility of a channel in the epitaxial wafer.

本発明者らは、基板の面方位のずれの程度によってチャネルの電子移動度がどの程度異なるようになるのかと考え、GaAs基板上にMOVPE法により、GaAs層をエピタキシャル成長させた場合のGaAs基板の(100)面からの傾斜方向と電子移動度との関係、及び傾斜角度と電子移動度との関係を調べた。   The present inventors consider how much the electron mobility of the channel differs depending on the degree of deviation of the plane orientation of the substrate, and the GaAs substrate is epitaxially grown on the GaAs substrate by the MOVPE method. The relationship between the tilt direction from the (100) plane and the electron mobility and the relationship between the tilt angle and the electron mobility were examined.

その結果、傾斜方向と傾斜角度とは共にチャネルの電子移動度に相関があることを見い出し、傾斜方向が特定の方向にあると電子移動度が大きくなり、特定の傾斜方向における傾斜角度が、特定の範囲内であると電子移動度が大きくなることが分かった。   As a result, it is found that both the tilt direction and the tilt angle have a correlation in the electron mobility of the channel, and when the tilt direction is in a specific direction, the electron mobility increases, and the tilt angle in a specific tilt direction is specified. It was found that the electron mobility was increased within the range of.

本発明は、上記知見に基づいてなされたもので、半導体基板上にMOVPE法により薄膜層をエピタキシャル成長させる際に、(100)面からの最適な傾斜方向と傾斜角度の両方を同時に特定することによって、電子移動度の向上を図ったものである。   The present invention has been made on the basis of the above knowledge, and by simultaneously specifying both the optimum tilt direction and tilt angle from the (100) plane when a thin film layer is epitaxially grown on a semiconductor substrate by the MOVPE method. This is intended to improve the electron mobility.

すなわち、第1の発明は、III−V族化合物半導体基板上に、少なくとも、チャネル層、δドープ層を有する電界効果トランジスタ用エピタキシャルウェハにおいて、前記III−V族化合物半導体基板の表面が、(100)面から[01−1]方向または[0−11]方向に、0.4°〜1.1°傾斜していることを特徴とするFET用エピタキシャルウェハである。   That is, according to a first aspect of the present invention, there is provided a field effect transistor epitaxial wafer having at least a channel layer and a δ-doped layer on a III-V compound semiconductor substrate, wherein the surface of the III-V compound semiconductor substrate is (100 ) An epitaxial wafer for FET, which is inclined by 0.4 ° to 1.1 ° in the [01-1] direction or the [0-11] direction from the surface.

III−V族化合物半導体基板の表面が、(100)面から[01−1]方向、または[0−11]方向に傾斜すると、他の方向と比べてチャネルの電子移動度が大きくなり、さらにIII−V族化合物半導体表面が、前述した[01−1]方向、または[0−11]方向に0.4°〜1.1°傾斜していると電子移動度が最も大きくなる。このようにIII−V族化合物半導体基板の表面に最適な傾斜方向と傾斜角度の両方を同時に与えることによって、チャネルの電子移動度の向上した高い特性を有するFETが得られる。   When the surface of the III-V compound semiconductor substrate is tilted from the (100) plane in the [01-1] direction or the [0-11] direction, the electron mobility of the channel is increased as compared to other directions, and When the surface of the group III-V compound semiconductor is inclined by 0.4 ° to 1.1 ° in the [01-1] direction or the [0-11] direction, the electron mobility is maximized. Thus, by simultaneously providing both the optimum tilt direction and tilt angle to the surface of the III-V compound semiconductor substrate, an FET having high characteristics with improved channel electron mobility can be obtained.

III−V族化合物半導体基板としては、ガリウム砒素(GaAs)基板やインジウムガリウム砒素(InGaAs)基板が挙げられる。   Examples of the III-V compound semiconductor substrate include a gallium arsenide (GaAs) substrate and an indium gallium arsenide (InGaAs) substrate.

エピタキシャル成長としては、MOVPE法を採用することができ、これによる成長層としては、例えば、III−V族化合物半導体基板上の残留不純物によるデバイス特性劣化を防ぐバッファ層、自由電子が流れるチャネル層、自由電子が発生するδドープ層、電極を形成するためのコンタクト層などを挙げることができるが、特に、自由電子が流れるチャネル層および自由電子が発生するδドープ層は、FETにおける必須構成要素である。   For epitaxial growth, the MOVPE method can be employed. As a growth layer, for example, a buffer layer for preventing deterioration of device characteristics due to residual impurities on the III-V compound semiconductor substrate, a channel layer through which free electrons flow, a free layer Examples include a δ-doped layer in which electrons are generated and a contact layer for forming an electrode. In particular, a channel layer in which free electrons flow and a δ-doped layer in which free electrons are generated are essential components in an FET. .

(100)面から最適な傾斜方向と傾斜角度を有する基板を用いることにより、チャネルの電子移動度が向上する。すなわち、III−V族化合物半導体基板に、(100)面から[01−1]方向または[0−11]方向に0.4°〜1.1°傾斜した表面を持たせると、その表面に成長させるエピタキシャルによって形成されるチャネルの電子移動度が向上する。   By using a substrate having an optimum inclination direction and inclination angle from the (100) plane, the electron mobility of the channel is improved. That is, when a III-V compound semiconductor substrate has a surface inclined by 0.4 ° to 1.1 ° in the [01-1] direction or the [0-11] direction from the (100) plane, The electron mobility of the channel formed by epitaxial growth is improved.

第2の発明は、半絶縁性GaAs基板上に、少なくとも、i型AlGaAsバッファ層、i型AlGaAsチャネル層、i型AlGaAsスペーサ層、Siδドープ層(Siをドープしたδドープ層)、i型AlGaAsショットキーコンタクト層、n型GaAsオーミックコンタクト層を有する高電子移動度トランジスタ用エピタキシャルウェハにおいて、前記半絶縁性GaAs基板の表面が、(100)面から[01−1]方向または[0−11]方向に、0.4°〜1.1°傾斜していることを特徴とするHEMT用エピタキシャルウェハである。   According to a second aspect of the present invention, at least an i-type AlGaAs buffer layer, an i-type AlGaAs channel layer, an i-type AlGaAs spacer layer, an Siδ-doped layer (a δ-doped layer doped with Si), an i-type AlGaAs on a semi-insulating GaAs substrate. In an epitaxial wafer for a high electron mobility transistor having a Schottky contact layer and an n-type GaAs ohmic contact layer, the surface of the semi-insulating GaAs substrate is in the [01-1] direction or [0-11] from the (100) plane. The HEMT epitaxial wafer is characterized by being inclined by 0.4 ° to 1.1 ° in the direction.

δドープHEMT構造エピタキシャルウェハのチャネルの移動度を向上できるので、より高速のHEMTが得られる。   Since the mobility of the channel of the δ-doped HEMT structure epitaxial wafer can be improved, a higher-speed HEMT can be obtained.

本発明によれば、FET用エピタキシャルウェハのチャネルの電子移動度を向上させることができる。したがって、このウェハを用いることにより、デバイス特性を向上することができる。   According to the present invention, the electron mobility of the channel of the epitaxial wafer for FET can be improved. Therefore, device characteristics can be improved by using this wafer.

以下に本発明の実施の形態を説明する。   Embodiments of the present invention will be described below.

図3に、本実施の形態に係るδドープHEMT構造エピタキシャルウェハの断面図を示す。   FIG. 3 shows a cross-sectional view of a δ-doped HEMT structure epitaxial wafer according to the present embodiment.

HEMT構造は、基板としての半絶縁性GaAs基板1上に、順次、バッファ層としてi型AlGaAsバッファ層2(Al組成比0.28、厚さ500nm)、チャネル層としてi型InGaAsチャネル層3(In組成比0.20、厚さ12nm)、スペーサ層としてi型AlGaAsスペーサ層4(Al組成比0.22、厚さ3nm)、電子供給層としてδドープ層5(キャリア濃度3×1012cm-2)、ショットキーコンタクト層としてi型AlGaAsショットキーコンタクト層6(Al組成比0.22、厚さ50nm)、オーミックコンタクト層としてn型GaAsオーミックコンタクト層7(厚さ100nm、キャリア濃度3×1018cm-3)を成長させた構造を有する。 In the HEMT structure, an i-type AlGaAs buffer layer 2 (Al composition ratio 0.28, thickness 500 nm) as a buffer layer and an i-type InGaAs channel layer 3 (as a channel layer) are sequentially formed on a semi-insulating GaAs substrate 1 as a substrate. In composition ratio 0.20, thickness 12 nm), i-type AlGaAs spacer layer 4 (Al composition ratio 0.22, thickness 3 nm) as a spacer layer, δ-doped layer 5 (carrier concentration 3 × 10 12 cm) as an electron supply layer -2 ), an i-type AlGaAs Schottky contact layer 6 (Al composition ratio 0.22, thickness 50 nm) as a Schottky contact layer, and an n-type GaAs ohmic contact layer 7 (thickness 100 nm, carrier concentration 3 ×) as an ohmic contact layer 10 18 cm −3 ).

これらの各層をエピタキシャル成長させる方法として、原子レベルで微細な成長制御が可能なMOVPE法を採用した。   As a method for epitaxially growing each of these layers, the MOVPE method capable of fine growth control at the atomic level was adopted.

i型AlGaAsバッファ層2、i型AlGaAsスペーサ層4、及びi型AlGaAsショットキーコンタクト層6のi型AlGaAsを成長する場合には、Ga原料としてGa(CH33、As原料としてアルシン(AsH3)、及びAl原料としてトリメチルアルミニウム(Al(CH33)を基板上に供給する。なお、Ga原料として他にトリエチルガリウム(Ga(CH3CH23)がある。As原料として他にトリメチル砒素(As(CH33)、ターシャリーブチルアルシン(TBA)がある。Al原料として他にトリエチルアルミニウム(Al(CH3CH23)がある。 When growing the i-type AlGaAs of the i-type AlGaAs buffer layer 2, the i-type AlGaAs spacer layer 4, and the i-type AlGaAs Schottky contact layer 6, Ga (CH 3 ) 3 is used as the Ga source, and arsine (AsH is used as the As source. 3 ), and trimethylaluminum (Al (CH 3 ) 3 ) as an Al source is supplied onto the substrate. In addition, there is triethylgallium (Ga (CH 3 CH 2 ) 3 ) as another Ga raw material. Other As raw materials include trimethylarsenic (As (CH 3 ) 3 ) and tertiary butylarsine (TBA). Another example of the Al material is triethylaluminum (Al (CH 3 CH 2 ) 3 ).

i型InGaAsチャネル層3のi型InGaAsを成長する場合には、Ga(CH33、AsH3、及びIn原料としてトリメチルインジウム(In(CH33)を基板上に供給する。 When growing i-type InGaAs of the i-type InGaAs channel layer 3, Ga (CH 3 ) 3 , AsH 3 , and trimethylindium (In (CH 3 ) 3 ) as an In material are supplied onto the substrate.

δドープ層5を成長する場合には、AsH3ガス雰囲気中でn型ドーパントとなるSi原料としてジシラン(Si26)の供給を行って、δドープ層5の形成を行った。 When the δ-doped layer 5 was grown, disilane (Si 2 H 6 ) was supplied as an Si raw material serving as an n-type dopant in an AsH 3 gas atmosphere to form the δ-doped layer 5.

n型GaAsオーミックコンタクト層7のn型GaAsを成長する場合には、アルシン(Ga(CH33、AsH3)及びn型ドーパントを基板上に供給する。このn型ドーパントの元素としては、Siやセレン(Se)がある。Si原料としては、ジシラン(Si26)の他にモノシラン(SiH4)がある。Se原料としては、セレン化水素(H2Se)がある。全ての層の成長中、基板温度は700℃一定に保った。また、成長炉内圧力は76Torr、希釈用ガスは水素である。 When growing the n-type GaAs of the n-type GaAs ohmic contact layer 7, arsine (Ga (CH 3 ) 3 , AsH 3 ) and an n-type dopant are supplied onto the substrate. Examples of the n-type dopant element include Si and selenium (Se). Examples of the Si raw material include monosilane (SiH 4 ) in addition to disilane (Si 2 H 6 ). Se raw material includes hydrogen selenide (H 2 Se). The substrate temperature was kept constant at 700 ° C. during the growth of all layers. The growth furnace pressure is 76 Torr, and the dilution gas is hydrogen.

前述したように、δドープHEMT構造エピタキシャルウェハの特性の良否を決める最も重要な特性の一つは、チャネルの電子移動度である。この電子移動度が高いほど、そのエピタキシャルウェハを用いて製作したデバイスの特性を向上させることができる。   As described above, one of the most important characteristics that determines the quality of the δ-doped HEMT structure epitaxial wafer is the electron mobility of the channel. The higher the electron mobility, the more the characteristics of the device manufactured using the epitaxial wafer can be improved.

実施の形態では、δドープHEMT構造エピタキシャルウェハの僅かに傾斜させた表面において、これまで明らかにされていなかった(100)面からの最適な傾斜方向と傾斜角度の両方を同時に規定することによって、チャネル層の電子移動度を向上し、そのエピタキシャルウェハを用いて製作したデバイスの特性を向上させるようにした。   In an embodiment, by simultaneously defining both the optimum tilt direction and tilt angle from the (100) plane, which has not been clarified so far, on the slightly tilted surface of the δ-doped HEMT structure epitaxial wafer, The electron mobility of the channel layer was improved, and the characteristics of devices fabricated using the epitaxial wafer were improved.

そのために、(100)面からの傾斜方向と傾斜角度を変化させたGaAs基板を用いて、図3のδドープHEMT構造エピタキシャルウェハの試作を行ない、そのチャネルの電子移動度がどう変化するかを検討した。なお、チャネルの電子移動度はそのシートキャリア濃度の影響を受けるため、本試作においてはチャネルのシートキャリア濃度が1.7×1012cm-2となるようにδドープ量を調整した。 For this purpose, the δ-doped HEMT structure epitaxial wafer shown in FIG. 3 was fabricated using a GaAs substrate in which the tilt direction and tilt angle from the (100) plane were changed, and how the electron mobility of the channel changed. investigated. Since the electron mobility of the channel is affected by the sheet carrier concentration, in this prototype, the amount of δ-doping was adjusted so that the channel sheet carrier concentration was 1.7 × 10 12 cm −2 .

(1)傾斜方向と電子移動度の関係
図2に(100)面からの傾斜方向のみを変化させ、それらの傾斜方向への傾斜角度を全て1°に固定したときの試作結果を示す。本結果より、傾斜方向が[01−1]及び[0−11]方向のときに、電子移動度がおよそ6900cm2/Vsと最も高くなることが分った。なお、それ以外の[011]、[0−1−1]方向ではおよそ6600cm2/Vs、[010]、[00−1]、[0−10]、[001]方向ではおよそ6750cm2/Vsと低くなることも分った。
(1) Relationship between tilt direction and electron mobility FIG. 2 shows the results of trial manufacture when only the tilt direction from the (100) plane is changed and the tilt angles in the tilt direction are all fixed at 1 °. From this result, it was found that when the tilt direction is the [01-1] and [0-11] directions, the electron mobility is as high as about 6900 cm 2 / Vs. In the other [011] and [0-1-1] directions, approximately 6600 cm 2 / Vs, and in the [010], [00-1], [0-10], and [001] directions, approximately 6750 cm 2 / Vs. I also found that it was lower.

(2)傾斜角度と電子移動度の関係
図1に(100)面からの傾斜方向を[01−1]、[010]及び[011]方向に固定して、傾斜角度のみを変化させたときの試作結果を示す。なお、傾斜方向として、(a)[01−1]と[0−11]方向、(b)[011]と[0−1−1]方向、(c)[010]と[00−1]と[0−10]と[001]方向、はそれぞれ全く等価であることから、傾斜方向は前述の3水準[01−1]、[010]及び[011]で代表した。本結果より、3水準ともに傾斜角度が0.4°〜1.1°のときに電子移動度が最も高くなることが分った。
(2) Relationship between tilt angle and electron mobility When the tilt direction from the (100) plane is fixed to the [01-1], [010] and [011] directions in FIG. 1, and only the tilt angle is changed. The prototype results are shown. The tilt directions are (a) [01-1] and [0-11] directions, (b) [011] and [0-1-1] directions, and (c) [010] and [00-1]. Since the [0-10] and [001] directions are completely equivalent to each other, the inclination direction is represented by the aforementioned three levels [01-1], [010] and [011]. From this result, it was found that the electron mobility was highest when the inclination angle was 0.4 ° to 1.1 ° for all three levels.

具体的には、傾斜方向が[01−1]の場合において、傾斜角度が0.4°〜1.1のとき、電子移動度はおよそ6900cm2/Vsという高い値を維持しているが、0.4未満及び1.1を超えると電子移動度は低くなることがわかった。また、傾斜方向が[010]の場合において、傾斜角度が0.4°〜1.1のとき、電子移動度はおよそ6750cm2/Vsを超えた値を維持しているが、0.4未満及び1.1を超えると電子移動度は低くなることがわかった。更に、傾斜方向が[011]の場合において、傾斜角度が0.4°〜1.1のとき、電子移動度はおよそ6600cm2/Vsを維持しているが、0.4未満及び1.1を超えると電子移動度は低くなることがわかった。 Specifically, when the tilt direction is [01-1] and the tilt angle is 0.4 ° to 1.1, the electron mobility maintains a high value of approximately 6900 cm 2 / Vs. It has been found that the electron mobility becomes low when it is less than 0.4 and exceeds 1.1. When the tilt direction is [010] and the tilt angle is 0.4 ° to 1.1, the electron mobility maintains a value exceeding approximately 6750 cm 2 / Vs, but less than 0.4. Further, it was found that the electron mobility was lowered when exceeding 1.1. Furthermore, when the tilt direction is [011] and the tilt angle is 0.4 ° to 1.1, the electron mobility is maintained at approximately 6600 cm 2 / Vs, but less than 0.4 and 1.1. It has been found that the electron mobility is lowered when exceeding.

上記(1)、(2)の結果より、(100)面から[01−1]方向または[0−11]方向に0.4°〜1.1°傾斜した基板を用いたときに、δドープHEMT構造エピタキシャルウェハのチャネル層の電子移動度が最も高くなることが分った。   From the results of (1) and (2) above, when using a substrate inclined by 0.4 ° to 1.1 ° in the [01-1] direction or [0-11] direction from the (100) plane, δ It was found that the electron mobility of the channel layer of the doped HEMT structure epitaxial wafer was the highest.

以上説明したように、MOVPE法を用いてエピタキシャル成長させる場合、ヒロック発生を防止するためにGaAs基板の(100)面を僅かに傾斜させているが、本実施の形態では、これを具体的に限定し、(100)面から[01−1]方向または[0−11]方向に0.4°〜1.1°傾斜した基板表面に、エピタキシャル成長させるので、δドープHEMT構造エピタキシャルウェハのチャネル層の移動度を、安定して向上させることができる。したがって、高電子移動度トランジスタをより高速化できる。なお、δドープを有しない従来の電子供給層では、上述した効果は得られない。   As described above, when the epitaxial growth is performed using the MOVPE method, the (100) plane of the GaAs substrate is slightly inclined in order to prevent the generation of hillocks. However, in the present embodiment, this is specifically limited. Since the epitaxial growth is performed on the substrate surface inclined by 0.4 ° to 1.1 ° in the [01-1] direction or the [0-11] direction from the (100) plane, the channel layer of the δ-doped HEMT structure epitaxial wafer The mobility can be improved stably. Therefore, the high electron mobility transistor can be further increased in speed. Note that the above-described effects cannot be obtained with a conventional electron supply layer having no δ-dope.

傾斜方向が[01−1]、[010]、[011]の3水準のδドープHEMT構造エピタキシャルウェハにおける電子移動度の傾斜角度依存性を示す図である。It is a figure which shows the inclination angle dependence of the electron mobility in the 3 level delta dope HEMT structure epitaxial wafer whose inclination direction is [01-1], [010], and [011]. (100)面からの傾斜角度を1°に固定したときのδドープHEMT構造エピタキシャルウェハの電子移動度の傾斜方向依存性を示す図である。It is a figure which shows the inclination direction dependence of the electron mobility of (delta) dope HEMT structure epitaxial wafer when the inclination angle from (100) plane is fixed to 1 degree. 実施の形態によるδドープHEMT構造エピタキシャルウェハの縦断面図である。It is a longitudinal cross-sectional view of the (delta) dope HEMT structure epitaxial wafer by embodiment.

符号の説明Explanation of symbols

1 半絶縁性GaAs基板
2 i型AlGaAsバッファ層
3 i型InGaAsチャネル層
4 i型AlGaAsスペーサ層
5 δドープ層
6 i型AlGaAsショットキーコンタクト層
7 n型GaAsオーミックコンタクト層
DESCRIPTION OF SYMBOLS 1 Semi-insulating GaAs substrate 2 i-type AlGaAs buffer layer 3 i-type InGaAs channel layer 4 i-type AlGaAs spacer layer 5 δ-doped layer 6 i-type AlGaAs Schottky contact layer 7 n-type GaAs ohmic contact layer

Claims (2)

III−V族化合物半導体基板上に、少なくとも、チャネル層、δドープ層を有する電界効果トランジスタ用エピタキシャルウェハにおいて、前記III−V族化合物半導体基板の表面が、(100)面から[01−1]方向または[0−11]方向に、0.4°〜1.1°傾斜していることを特徴とする電界効果トランジスタ用エピタキシャルウェハ。   In a field effect transistor epitaxial wafer having at least a channel layer and a δ-doped layer on a group III-V compound semiconductor substrate, the surface of the group III-V compound semiconductor substrate is [01-1] from the (100) plane. An epitaxial wafer for a field effect transistor, which is inclined by 0.4 ° to 1.1 ° in the direction or [0-11] direction. 半絶縁性GaAs基板上に、少なくとも、i型AlGaAsバッファ層、i型AlGaAsチャネル層、i型AlGaAsスペーサ層、Siδドープ層、i型AlGaAsショットキーコンタクト層、n型GaAsオーミックコンタクト層を有する高電子移動度トランジスタ用エピタキシャルウェハにおいて、前記半絶縁性GaAs基板の表面が、(100)面から[01−1]方向または[0−11]方向に、0.4°〜1.1°傾斜していることを特徴とする高電子移動度トランジスタ用エピタキシャルウェハ。   A high electron having at least an i-type AlGaAs buffer layer, an i-type AlGaAs channel layer, an i-type AlGaAs spacer layer, an Siδ doped layer, an i-type AlGaAs Schottky contact layer, and an n-type GaAs ohmic contact layer on a semi-insulating GaAs substrate. In the epitaxial wafer for a mobility transistor, the surface of the semi-insulating GaAs substrate is inclined by 0.4 ° to 1.1 ° from the (100) plane in the [01-1] direction or the [0-11] direction. An epitaxial wafer for a high electron mobility transistor.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256194B2 (en) 2016-03-31 2019-04-09 Tdk Corporation Electronic circuit package using composite magnetic sealing material
US10615089B2 (en) 2016-03-31 2020-04-07 Tdk Corporation Composite magnetic sealing material

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JPH076957A (en) * 1993-01-13 1995-01-10 Sumitomo Chem Co Ltd Semiconductor epitaxial substrate
JP2003234357A (en) * 2002-02-07 2003-08-22 Hitachi Cable Ltd Field effect transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH076957A (en) * 1993-01-13 1995-01-10 Sumitomo Chem Co Ltd Semiconductor epitaxial substrate
JP2003234357A (en) * 2002-02-07 2003-08-22 Hitachi Cable Ltd Field effect transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256194B2 (en) 2016-03-31 2019-04-09 Tdk Corporation Electronic circuit package using composite magnetic sealing material
US10615089B2 (en) 2016-03-31 2020-04-07 Tdk Corporation Composite magnetic sealing material

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