JP2002025922A - Method for manufacturing iii-v compound semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a III-V compound semiconductor which dopes oxygen into a buffer layer to reduce leakage current in pinch- off. SOLUTION: In the method for manufacturing a III-V compound semiconductor whereby a dopant material, a group III material, a group V material, and dilution gas are supplied onto a heated substrate to grow the buffer layer, oxygen is doped on the buffer layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a compound semiconductor, particularly a III-V compound semiconductor.

[0002]

2. Description of the Related Art GaAs (gallium arsenide) or InGaAs
III-V group compound semiconductors such as s (indium gallium arsenide) are characterized by higher electron mobility than Si (silicon) semiconductors. Utilizing this feature, GaAs
s and InGaAs are widely used in devices that require high-speed operation and high-efficiency operation. As a typical example, FET
(Field Effect Transistor). FETs are widely used in microwave communication amplifiers such as mobile phones, and their demands are continuing to grow.

FIG. 3 is a structural diagram of an FET related to a conventional method of manufacturing a group III-V compound semiconductor. 11 is a contact layer, 12 is a channel layer, 13 is a buffer layer, 14
It is a substrate. A single-layer or higher buffer layer 13 having a high resistance is crystal-grown on a semi-insulating substrate 14. The buffer layer 13
It has a function of suppressing deterioration of device characteristics due to residual impurities on the substrate 14. The channel layer 1 is formed on the buffer layer 13.
2 is crystal-grown. The channel layer 12 is doped with an n-type impurity to generate free electrons, and the generated free electrons flow through the channel layer 12. Then, the contact layer 11 that forms an ohmic junction with the source electrode and the drain electrode is grown on the channel layer 12 by crystal growth. Note that these crystal growths are referred to as epitaxial growth, and each layer obtained by crystal growth is referred to as an epitaxial layer. Therefore, the FET shown in FIG. 3 can be called an epitaxial wafer for FET in detail.

[0004] Table 1 shows an example of the structure of an epitaxial wafer for FET.

[0005]

[Table 1]

[0006] In the column of the epitaxial layer name, n-, i
-Indicates that the epitaxial layers are n-type and semi-insulating, respectively. The unit of thickness is nm (nanometer, 10
⁻⁹ m), and the unit of carrier concentration is cm ⁻³ .

On a GaAs (gallium arsenide) substrate, an i-GaAs layer having a thickness of 100 nm and an i-Al
_0.28 GaAs layer of 100 nm, i-GaAs layer of 100 n
An m, i-Al _0.28 GaAs layer was grown to a thickness of 100 nm. That is, the buffer layer is composed of two layers of GaAs and two layers of AlGaAs.
It has a total of four layers.

Then, an n-GaAs layer was grown as a channel layer on the buffer layer to a thickness of 250 nm, and an n + GaAs layer was grown as a contact layer on the buffer layer to a thickness of 100 nm.

The method of growing the epitaxial wafer for FET shown in Table 1 will be described below.

A substrate on which an epitaxial layer is grown is set on a substrate holder called a susceptor, and heated in a growth furnace. When a source gas is supplied into the growth furnace, the source gas is decomposed by heat, and an epitaxial layer is grown on the substrate. When growing an i-GaAs layer as a raw material,
Ga raw material Ga (CH ₃ ) ₃ (trimethylgallium) and As raw material AsH ₃ (arsine) are supplied to the substrate. In addition, Ga (CH ₃ CH ₂ ) ₃ (triethylgallium) is another Ga source. In addition, As (C
H _{3) 3} (trimethyl arsenic), there is a TBA (tertiary butyl arsine).

When growing an i-Al _0.28 GaAs layer, Ga (CH ₃ ) ₃ , AsH ₃ and Al
(CH ₃ ) ₃ (trimethylaluminum) is supplied to the substrate. In addition, Al (CH ₃ CH ₂ )
₃ (triethyl aluminum). In addition, Al _0.28
GaAs is short for Al _0.28 Ga _0.72 As and means that the ratio of Al to Ga is 0.28: 0.72.

When an n-GaAs layer is grown, Ga
(CH ₃ ) ₃ , AsH ₃ and an n-type dopant are supplied to the substrate. Elements of the n-type dopant include Si and Se (selenium). Si raw materials include SiH ₄ (monosilane) and Si ₂ H ₆ (disilane). As the Se raw material, there is H ₂ Se (hydrogen selenide).

[0013]

The conventional method of manufacturing a group III-V compound semiconductor has the following problems.

As a characteristic of the FET device, when a certain voltage is applied from the gate electrode 16, a depletion layer is generated in the channel layer 12, and the current between the source electrode 15 and the drain electrode 17 is cut off. This phenomenon is called a pinch-off effect (or simply, pinch-off). However, the buffer layer 13 is affected by the diffusion of impurities at the interface with the substrate 14, in particular, n-type impurities. Therefore, there is a problem that current leaks through the buffer layer 13 even when the buffer layer 13 is pinched off.

FIG. 2 is an explanatory diagram of generation of a leak current.
Reference numeral 15 denotes a source electrode, 16 denotes a gate electrode, and 17 denotes a drain electrode. The above is schematically illustrated. That is,
The n-type impurity at the interface is activated and free electrons flow through the buffer layer 13, and the flow of the free electrons becomes a leak current. When the leakage current occurs, the characteristics of the FET device deteriorate.

In order to reduce the leak current, it is effective to dope the buffer layer 13 with oxygen to prevent the activation of the n-type impurity.
There was no method of doping 3 with oxygen.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method of manufacturing a III-V compound semiconductor in which the above-mentioned disadvantages of the prior art are solved and the buffer layer is doped with oxygen to reduce pinch-off leakage current. is there.

[0018]

According to the present invention, in order to achieve the above object, a buffer material is grown on a heated substrate by supplying a dopant material, a group III material, a group V material and a diluting gas. -In a method for producing a group V compound semiconductor,
The buffer layer was doped with oxygen.

Oxygen was doped by supplying ozone gas.

Group V raw materials include AsH ₃ and As (CH
₃ ) Any one of ₃ , TBA, PH ₃ , and TBP was used.

Group III raw materials include Al (CH ₃ ) ₃ ,
Ga (CH ₃ ) ₃ , In (CH ₃ ) ₃ , Al (CH ₃ C
H ₂ ) ₃ , Ga (CH ₃ CH ₂ ) ₃ , In (CH ₃ CH)
₂ ) One or two of the _three were used.

As the diluting gas, any one of H ₂ , N ₂ and Ar was used.

The buffer layer is made of GaAs, AlGaAs,
InGaAs, InGaP, AlGaP, InGaAl
It consisted of any two or more of P.

[0024]

Embodiments of the present invention will be described below in detail with reference to the drawings.

The epitaxial wafer for FET shown in Table 1 was produced by the method of growing a group III-V compound semiconductor of the present invention. A substrate on which an epitaxial layer is to be grown is set on a substrate holder called a susceptor and 700
Heated to ° C. The pressure in the growth furnace was 70 Torr, and hydrogen was used as a diluting gas. GaAs was used for the substrate.

For the growth of the i-GaAs layer, the Ga source G
a (CH ₃ ) ₃ (trimethylgallium) and As raw material A
O ₃ (ozone) was used in addition to sH ₃ (arsine). The flow rate of Ga (CH ₃ ) ₃ is 12.64 cm ³ / min.
The flow rate of sH ₃ is a 255cm ³ / min. O ₃ was supplied such that the oxygen concentration in the buffer layer was in the range of 1 × 10 ¹⁶ to 10 ¹⁸ .

For the growth of the i-Al _0.28 GaAs layer, Ga
(CH ₃ ) ₃ , AsH ₃ and Al raw material Al (CH ₃ )
O ₃ was used in addition to ₃ (trimethylaluminum). The flow rate of Ga (CH ₃ ) ₃ was 5.23 cm ³ / min, and As
The flow rate of H ₃ is 554 cm ³ / min, and the flow rate of Al (CH ₃ ) ₃ is 0.81 cm ³ / min. O ₃ has an oxygen concentration in the buffer layer of 1 × 10 ¹⁶ to 10 as in the growth of the i-GaAs layer.
Supplied to be in the range of ¹⁸ .

The n-GaAs layer is grown by using i-GaAs
Si ₂ H ₆ was used in addition to Ga (CH ₃ ) ₃ and AsH ₃ used for growing the layer. The flow rate of Si ₂ H ₆ is 1.16 ×
10 ⁻³ cm ³ / min. I-GaAs except Si ₂ H ₆
Same as for layer growth.

For the growth of the n + GaAs layer, i-GaAs
Ga (CH ₃ ) ₃ , Al (CH ₃ ) used for growing the layer
_3. Si ₂ H ₆ was used in addition to AsH ₃ . Si ₂ H
The flow rate of ₆ is 6.73 × 10 ⁻³ cm ³ / min. Si ₂ H
The flow rates other than ₆ are the same as in the case of growing the i-GaAs layer.

FIG. 1 is a characteristic diagram showing the relationship between the oxygen concentration in the buffer layer of the FET grown under the above conditions and the leak current. The horizontal axis represents the oxygen concentration (cm ⁻³ ) in the buffer layer, and the vertical axis represents the leak current (μA). An oxygen concentration of zero (no ozone) refers to an FET manufactured by a conventional manufacturing method. It can be seen that when the oxygen concentration is 1 × 10 ¹⁶ to 10 ¹⁸ (cm ⁻³ ), the amount of reduction in the leak current is maximized.

FIG. 2 is an explanatory view of a leakage current relating to one embodiment of the method for producing a group III-V compound semiconductor of the present invention. The leak current of the FET obtained by the conventional technique and the FET obtained by the present invention are compared. The FET according to the prior art has a leakage current at pinch-off of 250 μA, while the FET according to the present invention has a reduction of about 88%, ie, 30 μA.
By reducing the leak current, it is possible to reduce the power consumption of a device using this FET. Further, it can be expected that the usage of AsH ₃ which is a group V source gas is also reduced.

Although the present invention has been described in connection with the doping of the buffer layer of the FET with oxygen to reduce the leakage current, the HEMT (High Electron Mobility Transistor) has been described.
r), HBT (Heterojunction Bipolar Transistor)
The leakage current can also be reduced by doping the buffer layer with oxygen. Further, the present invention is not limited to the scope of the Examples, and any of the Group III raw materials listed in Claims 3 to 6,
Even when a group V raw material, a diluting gas, and a buffer layer are used, the leak current can be similarly reduced.

[0033]

According to the method for producing a group III-V compound semiconductor of the present invention, a dopant material and a III
In the method for manufacturing a III-V compound semiconductor in which a buffer layer is grown by supplying a group V source material, a group V source material, and a diluting gas, oxygen is doped into the buffer layer.
The leakage current at the time of pinch-off of T can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a characteristic diagram showing a relationship between an oxygen concentration and a leak current according to one embodiment of a method for manufacturing a III-V compound semiconductor of the present invention.

FIG. 2 is an explanatory view of a leakage current in one embodiment of the method for producing a group III-V compound semiconductor of the present invention.

FIG. 3 is a structural diagram of an FET, which relates to a conventional method of manufacturing a group III-V compound semiconductor.

FIG. 4 is an explanatory diagram relating to a conventional method of manufacturing a group III-V compound semiconductor, showing generation of a leak current.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Contact layer 12 Channel layer 13 Buffer layer 14 Substrate 15 Source electrode 16 Gate electrode 17 Drain electrode

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 29/73 H01L 29/72 29/778 29/80 H 21/338 29/812 // C30B 29/40 502 F term (reference) 4G077 AA03 BE46 BE47 DB08 EB01 EF03 HA06 4K030 AA05 AA11 AA17 AA18 BA02 BA08 BA25 CA04 FA10 LA14 5F003 AP04 BF06 BM02 BP05 BP08 BP31 5F045 AB10 AB17 AB18 AC01 CA08 AC11 AC15 AC16 FA11 GB01 GC01 GD01 GJ05 GK04 GK05 GK06 GK08 GL05 GN05 GQ01 HC00 HC01 HC05

Claims (6)

[Claims] 1. A method for producing a group III-V compound semiconductor comprising: growing a buffer layer by supplying a dopant material, a group III material, a group V material, and a diluting gas onto a heated substrate;
A method of manufacturing a group III-V compound semiconductor, wherein the buffer layer is doped with oxygen. 2. The method according to claim 1, wherein oxygen is doped by supplying ozone gas. 3. A group V raw material such as AsH ₃ or As (CH ₃ )
_{3, TBA, PH 3, TBP} III -V compound semiconductor manufacturing method according to claim 1, wherein the use of any one of. 4. Group III raw materials such as Al (CH ₃ ) ₃ , Ga
(CH ₃ ) ₃ , In (CH ₃ ) ₃ , Al (CH ₃ C
H ₂ ) ₃ , Ga (CH ₃ CH ₂ ) ₃ , In (CH ₃ CH)
₂ ) The method for producing a group III-V compound semiconductor according to claim 1, wherein one or two of the _three are used. 5. The method according to claim 1, wherein any one of H2, N2 and Ar is used as a diluting gas.
-A method for producing a group V compound semiconductor. 6. A buffer layer comprising GaAs, AlGaAs, I
nGaAs, InGaP, AlGaP, InGaAlP
2. The method for producing a group III-V compound semiconductor according to claim 1, wherein the method comprises any two or more of the above.