JP2008028327A - Iii-v compound semiconductor electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a III-V compound semiconductor device provided with enhanced insulation characteristic of the device by improving a Schottky layer, and enhanced breakdown voltage at device operation. <P>SOLUTION: When a buffer layer 11, a channel layer 14, spacer layers 13 and 15, electron supply layers 12 and 16, the Schottky layer 20 and a contact layer 18 are grown on a semi-insulating compound semiconductor substrate 10, a structure using Al<SB>x</SB>Ga<SB>1-x</SB>As (provided that 0≤x<1) is contained as the Schottky layer 20. Further, the Schottky layer 20 has an incline structure or a step structure where a band gap becomes higher toward a wafer surface side direction so that the insulation characteristic and the breakdown voltage of the device are enhanced. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a metal-organic vapor phase epitaxy method, a molecular beam epitaxy method, a liquid phase epitaxial growth method in a III-V group compound semiconductor crystal used in an electronic device such as a field effect transistor (FET) or a high electron mobility transistor (HEMT). The present invention relates to a group III-V compound semiconductor electronic device formed by an epitaxial growth method.

  Compound semiconductors such as GaAs (gallium abrasive) and InGaAs (indium gallium abrasive) have a feature of higher electron mobility than Si (silicon) semiconductors. Taking advantage of this feature, GaAs and InGaAs are often used in devices that require high-speed operation and high-efficiency operation.

  A typical example is HEMT (High Electron Mobility Transistor), which is used for a microwave amplifier for transmitting a mobile phone and a high-frequency amplifier for a receiving antenna for satellite broadcasting.

  A schematic structure of an HEMT epitaxial wafer (hereinafter abbreviated as HEMT epi) is shown in FIG.

  The HEMT epi is composed of a buffer layer 11, a first carrier supply layer 12, a first spacer layer 13, a channel layer 14, a second spacer layer 15, a second carrier supply layer 16, and a shot grown on a semi-insulating substrate 10. It consists of a key layer 17 and a contact layer (cap layer) 18.

  The substrate 10 is a base for single crystal growth.

  The buffer layer 11 has a function of preventing deterioration of device characteristics due to residual impurities on the surface of the substrate 10 and a function of preventing leakage current from the channel layer 14.

  The channel layer 14 is a layer through which free electrons flow and needs to be highly pure. The spacer layers 13 and 15 have a function of preventing free electrons in the channel layer 14 from being ion-scattered by n-type impurities in the carrier supply layers 12 and 16.

  The carrier supply layers 12 and 16 are doped with n-type impurities, and supply the generated free electrons to the channel layer 14. The Schottky layer 17 is a layer for forming a gate electrode, and the contact layer 18 is a layer for forming an electrode.

  A structural example of the HEMT epi is shown in Table 1.

Crystal growth is called epitaxial. The epitaxial layer names n-, p- and i- indicate that the epitaxial layer is n-type, p-type and semi-insulating, respectively. The unit of thickness is nm (10 ^-9 m). The unit of carrier concentration is cm ⁻³ .

  A method for growing the HEMT epi shown in Table 1 will be described below.

  A semi-insulating substrate on which an epitaxial layer is grown is set on a susceptor and heated in a growth furnace. When the source gas is supplied into the growth furnace, the source gas is decomposed by heat, and an epitaxial layer is grown on the substrate.

In the conventional structure, GaAs or Al _x Ga _1-x As having a uniform composition has been used for the Schottky layer serving as the base of the gate electrode.

JP 2001-44418 A JP 2000-031167 A JP 2003-218130 A

However, in the conventional structure, the gate breakdown voltage is increased by using an Al _x Ga _1-x As layer having a high Al composition for the Schottky layer. In this case, however, the source electrode-channel or drain electrode- Since the vertical resistance between the channels is increased, the resistance between the source and the drain, which is a very important device characteristic, is increased as a result.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a III-V compound semiconductor electronic device that solves the above-described problems, improves the insulation of the device by improving the Schottky layer, and can improve the breakdown voltage during device operation. There is.

  In order to achieve the above object, the invention of claim 1 is a III-V compound semiconductor having a buffer layer, a channel layer, a spacer layer, an electron supply layer, a Schottky layer, and a contact layer on a semi-insulating compound semiconductor substrate. The Schottky layer has a structure using a semiconductor layer composed of a combination of a plurality of elements, and the Schottky layer has an inclined structure or a step structure in which the band gap increases toward the wafer surface side. This is a III-V compound semiconductor electronic device.

  The invention of claim 2 is characterized in that, in claim 1, the mixed crystal ratio in the semiconductor layer used for the Schottky layer is changed so that the band gap increases toward the wafer surface side. It is a group V compound semiconductor electronic device.

A third aspect of the present invention is a group III-V compound semiconductor electronic device according to the _{first aspect} , wherein Al _x Ga _1-x As (where 0 ≦ x <1) is used for the Schottky layer. .

The invention of claim 4 uses at least one of AsH ₃ (arsine), As (CH ₃ ) ₃ (trimethylarsenic), and TBA (tertiary butylarsine) as the group V material, and Al as the group III material. (CH ₃ ) ₃ (trimethylaluminum), Ga (CH ₃ ) ₃ (trimethylgallium), In (CH ₃ ) ₃ (trimethylindium), Al (CH ₃ CH ₂ ) ₃ (triethylaluminum), Ga (CH ₃ CH _{2) 3} (triethyl gallium), an in (CH ₃ CH _{2) 3} of (triethyl indium), a group III-V compound semiconductor electronic device according to any one of claims 1 to 3 using at least one.

  According to the present invention, a semiconductor layer that changes in a stepped or linear graded structure toward the wafer surface direction so as to increase the band gap is employed in the Schottky layer, thereby improving the breakdown voltage in the Schottky layer and increasing the vertical direction. By achieving both reduction of the resistance in the direction, the excellent effect that the characteristics of the HEMT device can be improved is exhibited.

  By improving the characteristics of the HEMT device, it is possible to expect effects such as miniaturization of satellite dish receiving parabolic antennas and low power consumption of mobile phones.

  A preferred embodiment of the present invention will be described below in detail with reference to the accompanying drawings.

  FIG. 1 shows an HEMT epi structure of the present invention, and Table 2 shows an example of an HEMT epi structure.

The HEMT epi of the present invention comprises a buffer layer (i-Al _0.25 GaAs, thickness 1000 nm, carrier concentration 1 × 10 ¹⁶ cm ⁻³ or less) 11 grown on a semi-insulating substrate 10, a first carrier supply layer. (N-Al _0.20 GaAs, thickness 10 nm, carrier concentration 2.5 × 10 ¹⁸ cm ⁻³ or less) 12, first spacer layer (i-Al _0.40 GaAs, thickness 5 nm, carrier concentration 1 × 10 ¹⁶ cm ⁻³⁾ 13), channel layer (i-In _0.30 GaAs, thickness 10 nm) 14, second spacer layer (i-Al _0.40 GaAs, thickness 5 nm, carrier concentration 1 × 10 ¹⁶ cm ⁻³ or less) 15, second carrier Supply layer (i-Al _0.20 GaAs, thickness 15 nm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ or less) 16, Schottky layer (i-Al _x Ga _1-x As, thickness 30 nm, carrier concentration 1 × 10 ¹⁶⁾ cm ^-3 or more ) 20 and a contact (cap) layer (n-GaAs, the thickness of 150 nm, a carrier concentration of 3 × 10 ¹⁸ cm ^-3 or less) made of 18.

  In the present invention, a source-drain resistance is increased by forming an inclined structure or a step structure in which the Al composition on the wafer surface side is increased in the Schottky layer 20 in order to increase the insulation during device operation. The Schottky breakdown voltage is improved without any problems.

FIG. 2 exemplifies the Al mixed crystal ratio of Al _x Ga _1-x As in the thickness [nm] direction when the Schottky layer 20 having a thickness of 30 nm is grown, and has an inclined structure (linear graded structure). In the case where the mixed crystal ratio is continuously changed from 0 to 0.25 as shown by a dotted line in the figure, and in the case of a step structure (step graded structure), the mixed crystal ratio is set to 0. The step structure is such that the Al composition is increased every 0.05 nm from (GaAs) so that the Al composition becomes higher in increments of 0.05 and becomes Al _0.25 GaAs with a thickness of 25 to 30 nm.

  Next, a method for growing an epitaxy for HEMT according to the present invention will be described.

  A substrate on which an epitaxial layer is grown is set on a susceptor and heated in a growth furnace. When the source gas is supplied into the growth furnace, the source gas is decomposed by heat, and epitaxial layers are sequentially grown on the substrate.

When i-GaAs is grown as a raw material, Ga raw material Ga (CH ₃ ) ₃ (trimethylgallium) and an As raw material AsH ₃ (arsine) are supplied into the growth furnace. In addition, there is Ga (CH ₃ CH ₂ ) ₃ (triethylgallium) as another Ga raw material. Other As raw materials include As (CH ₃ ) ₃ (trimethylarsenic) and TBA (tertiary butylarsine).

When growing i-AlGaAs (buffer layer, spacer layer, Schottky layer), Ga (CH ₃ ) ₃ , AsH ₃ , and Al source material Al (CH ₃ ) ₃ (trimethylaluminum) are grown in the growth reactor. Supply.

In addition, there is Al (CH ₃ CH ₂ ) ₃ (triethylaluminum) as an Al raw material.

I-Al _0.25 GaAs of the buffer layer 11 is an abbreviation of Al _0.25 Ga _0.75 As, which means that the ratio of Al to Ga is 0.25: 0.75, and the spacer layers 13 and 15 i-Al _0.40 GaAs is an abbreviation of Al _0.40 Ga _0.60 As, and the Al _x Ga _1-x As of the Schottky layer 20 has a ratio of Al to Ga of 0.00: 1.00 to 0.00. The mixed crystal ratio is changed to an inclined structure or a step structure until 25: 0.75.

When growing i-In _0.20 GaAs (channel layer), Ga (CH ₃ ) ₃ , AsH ₃ , and In source material In (CH ₃ ) ₃ (trimethylindium) are supplied into the growth furnace.

In _0.20 GaAs is an abbreviation of In _0.20 Ga _0.80 As, which means that the ratio of In to Ga is 0.20: 0.80.

When growing n-GaAs (cap layer), Ga (CH ₃ ) ₃ , AsH ₃ and n-type dopant are supplied into the growth reactor. Examples of the n-type dopant element include Si and Se (selenium).

Si raw materials include SiH ₄ (monosilane) and Si ₂ H ₆ (disilane). Se raw material includes H ₂ Se (hydrogen selenide).

When growing n-Al _0.20 GaAs (carrier supply layer), Ga (CH ₃ ) ₃ , AsH ₃ , Al raw material Al (CH ₃ ) ₃ (trimethylaluminum) and n-type dopant are grown in the growth reactor. To supply.

As the Al _x Ga _1-x As (Schottky layer), when growing the linear graded layer, the flow rate of the As raw material was made common, the conditions for the growth rate of GaAs and the growth rate of AlGaAs were determined, and the results were obtained. Growth is performed while linearly changing the Al composition by calculating the GaAs growth rate and the AlGaAs growth rate and adjusting the Ga source and Al source so that the growth rate is constant.

  In the case of a step graded layer, conditions such as the growth rate of each composition to be used are set, and growth is performed according to the structure.

  FIG. 3 shows the measurement results of the gate breakdown voltage of the HEMT epi grown with the above structure.

  Here, the gate withstand voltage is measured by measuring the voltage between the gate and the drain that should not flow while changing the voltage applied to the gate. FIG. 3 shows the resistance value between the source and the drain at the gate breakdown voltage.

  It can be seen that the structure of the present invention has a higher gate breakdown voltage with respect to the resistance between the source and drain than the conventional structure.

  Although the present invention has been described with respect to the manufacturing method of the HEMT epi Schottky layer, the present invention can also be applied to other device structures such as FETs.

  As described above, the present invention can improve the insulation of the Schottky layer used for the HEMT epi. In addition, if the insulation of the Schottky layer is increased, the leakage current during device operation is reduced, so that a reduction in power during operation is expected. By reducing the power consumption of the HEMT device, it is possible to expect effects such as miniaturization of satellite dish receiving parabolic antennas and lower power consumption of mobile phones.

It is a figure which shows the longitudinal cross-section of the epitaxial for HEMT which shows one embodiment of this invention. It is a figure which shows the mixed crystal ratio of Al and Ga of the thickness direction of a Schottky layer in this invention. It is a figure which shows the comparison of the leakage current in this invention and a prior art. It is a figure which shows the longitudinal cross-section of the conventional epitaxy for HEMT.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Substrate 11 Buffer layer 12,16 Electron (carrier) supply layer 13,15 Spacer layer 14 Channel layer 18 Contact layer 20 Schottky layer

Claims (4)

  In a III-V compound semiconductor having a buffer layer, a channel layer, a spacer layer, an electron supply layer, a Schottky layer, and a contact layer on a semi-insulating compound semiconductor substrate, a semiconductor comprising a combination of a plurality of elements in the Schottky layer A III-V group compound semiconductor electronic device characterized by having a structure using a layer and a Schottky layer having an inclined structure or a step structure in which the band gap increases toward the wafer surface side.   2. The group III-V compound semiconductor electronic device according to claim 1, wherein the mixed crystal ratio in the semiconductor layer used for the Schottky layer is changed so that the band gap increases toward the wafer surface side. 2. The III-V compound semiconductor electronic device according to claim 1, wherein Al _x Ga _1-x As (where 0 ≦ x <1) is used for the Schottky layer. At least one of AsH ₃ (arsine), As (CH ₃ ) ₃ (trimethylarsenic), and TBA (tertiary butylarsine) is used as the group V source, and Al (CH ₃ ) ₃ (trimethyl) is used as the group III source. Aluminum), Ga (CH ₃ ) ₃ (trimethylgallium), In (CH ₃ ) ₃ (trimethylindium), Al (CH ₃ CH ₂ ) ₃ (triethylaluminum), Ga (CH ₃ CH ₂ ) ₃ (triethylgallium) _{, in (CH 3 CH 2)} 3 of (triethyl indium), III-V group compound semiconductor electronic device according to any one claims 1 to 3 using at least one.

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