JP2010529681A5 - - Google Patents
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- Publication number
- JP2010529681A5 JP2010529681A5 JP2010511340A JP2010511340A JP2010529681A5 JP 2010529681 A5 JP2010529681 A5 JP 2010529681A5 JP 2010511340 A JP2010511340 A JP 2010511340A JP 2010511340 A JP2010511340 A JP 2010511340A JP 2010529681 A5 JP2010529681 A5 JP 2010529681A5
- Authority
- JP
- Japan
- Prior art keywords
- protrusions
- flat
- contact pad
- protrusion
- flat portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/810,616 US7821132B2 (en) | 2007-06-05 | 2007-06-05 | Contact pad and method of forming a contact pad for an integrated circuit |
| US11/810,616 | 2007-06-05 | ||
| PCT/US2008/065984 WO2008151301A1 (en) | 2007-06-05 | 2008-06-05 | A contact pad and method of forming a contact pad for an integrated circuit |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010529681A JP2010529681A (ja) | 2010-08-26 |
| JP2010529681A5 true JP2010529681A5 (enExample) | 2011-11-24 |
| JP5181261B2 JP5181261B2 (ja) | 2013-04-10 |
Family
ID=39671929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010511340A Active JP5181261B2 (ja) | 2007-06-05 | 2008-06-05 | 集積回路のためのコンタクトパッドおよびコンタクトパッドの形成方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7821132B2 (enExample) |
| EP (1) | EP2150975B1 (enExample) |
| JP (1) | JP5181261B2 (enExample) |
| CN (1) | CN101681900B (enExample) |
| CA (1) | CA2687424C (enExample) |
| WO (1) | WO2008151301A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110278054A1 (en) * | 2010-05-14 | 2011-11-17 | I-Tseng Lee | Circuit board with notched conductor pads |
| US8766457B2 (en) | 2010-12-01 | 2014-07-01 | SK Hynix Inc. | Bonding structure of semiconductor package, method for fabricating the same, and stack-type semiconductor package |
| US9087830B2 (en) * | 2012-03-22 | 2015-07-21 | Nvidia Corporation | System, method, and computer program product for affixing a post to a substrate pad |
| JP2015532790A (ja) | 2012-09-05 | 2015-11-12 | リサーチ トライアングル インスティテュート | 突起を有する接点パッドを利用した電子デバイス及び組み立て方法 |
| EP2932526A4 (en) * | 2012-12-13 | 2016-10-19 | California Inst Of Techn | PREPARATION OF ELECTRODES WITH THREE-DIMENSIONAL LARGE SURFACE |
| US10376146B2 (en) | 2013-02-06 | 2019-08-13 | California Institute Of Technology | Miniaturized implantable electrochemical sensor devices |
| US9536850B2 (en) * | 2013-03-08 | 2017-01-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package having substrate with embedded metal trace overlapped by landing pad |
| US10368788B2 (en) | 2015-07-23 | 2019-08-06 | California Institute Of Technology | System and methods for wireless drug delivery on command |
| DE102016115848B4 (de) * | 2016-08-25 | 2024-02-01 | Infineon Technologies Ag | Halbleiterbauelemente und Verfahren zum Bilden eines Halbleiterbauelements |
| US20200006273A1 (en) * | 2018-06-28 | 2020-01-02 | Intel Corporation | Microelectronic device interconnect structure |
| US12057429B1 (en) * | 2021-06-23 | 2024-08-06 | Hrl Laboratories, Llc | Temporary bonding structures for die-to-die and wafer-to-wafer bonding |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5592736A (en) * | 1993-09-03 | 1997-01-14 | Micron Technology, Inc. | Fabricating an interconnect for testing unpackaged semiconductor dice having raised bond pads |
| US5686762A (en) * | 1995-12-21 | 1997-11-11 | Micron Technology, Inc. | Semiconductor device with improved bond pads |
| US5929521A (en) * | 1997-03-26 | 1999-07-27 | Micron Technology, Inc. | Projected contact structure for bumped semiconductor device and resulting articles and assemblies |
| US6313541B1 (en) * | 1999-06-08 | 2001-11-06 | Winbond Electronics Corp. | Bone-pad with pad edge strengthening structure |
| JP2001168125A (ja) * | 1999-12-03 | 2001-06-22 | Nec Corp | 半導体装置 |
| DE10252556B3 (de) * | 2002-11-08 | 2004-05-19 | Infineon Technologies Ag | Elektronisches Bauteil mit Außenkontaktelementen und Verfahren zur Herstellung einer Mehrzahl dieses Bauteils |
| US6959856B2 (en) * | 2003-01-10 | 2005-11-01 | Samsung Electronics Co., Ltd. | Solder bump structure and method for forming a solder bump |
| KR100541396B1 (ko) * | 2003-10-22 | 2006-01-11 | 삼성전자주식회사 | 3차원 ubm을 포함하는 솔더 범프 구조의 형성 방법 |
| US7170187B2 (en) * | 2004-08-31 | 2007-01-30 | International Business Machines Corporation | Low stress conductive polymer bump |
| US7394159B2 (en) * | 2005-02-23 | 2008-07-01 | Intel Corporation | Delamination reduction between vias and conductive pads |
-
2007
- 2007-06-05 US US11/810,616 patent/US7821132B2/en active Active
-
2008
- 2008-06-05 EP EP08756746.7A patent/EP2150975B1/en active Active
- 2008-06-05 WO PCT/US2008/065984 patent/WO2008151301A1/en not_active Ceased
- 2008-06-05 CA CA2687424A patent/CA2687424C/en active Active
- 2008-06-05 CN CN2008800187222A patent/CN101681900B/zh active Active
- 2008-06-05 JP JP2010511340A patent/JP5181261B2/ja active Active
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