JP2010527163A - Porous structure solar cell and manufacturing method thereof - Google Patents

Abstract

  The present invention relates to a solar cell having a porous structure and a method for manufacturing the solar cell, and has a porous structure in which a plurality of holes are formed on a silicon substrate in a first impurity region. A solar cell including a semiconductor layer doped in a different second impurity region, and in particular, a high-concentration first impurity is present between the silicon substrate in the first impurity region and the semiconductor layer in the second impurity region. The solar cell further includes a doped semiconductor layer of a first impurity, and can further form a passivation layer and an antireflection film for passivating the silicon substrate on the surface of the porous structure.

Description

  The present invention relates to the development of a bulk solar cell element using a porous silicon substrate in a solar cell that is a next-generation clean energy source, a technology for controlling the solar cell substrate from a structural and crystallographic viewpoint, It is intended to improve the quality characteristics of the device and improve the photoelectric conversion efficiency by having a low reflectance uniformly in various sunlight wavelength regions due to the luminescent structure. In addition, a high-efficiency solar cell that adjusts the Fermi energy level of each semiconductor layer and accumulates a large amount of charge on adjacent surfaces between the semiconductor layers by making the stacked form and doping concentration of different types of semiconductor layers different About. In addition, a bulk silicon solar cell in which the substrate is passivated by a passivation layer formed on a silicon wafer substrate having a porous structure, surface defects are minimized, and the efficiency of the solar cell is improved. It relates to a manufacturing method.

  Solar cells are a type of photodiode, and are used for the purpose of directly converting sunlight into electric power. Therefore, the use of solar cells as an alternative energy source has been gradually expanded not only on the ground but also for space development. It has become very important as a power electronic device. The structure may also be a PN junction type, a short key barrier type, and / or a semiconductor heterojunction, etc., and as a material, crystalline materials such as silicon gallium arsenide and other various semiconductors are widely used. .

  In particular, recently, development and practical application of solar cells using polycrystalline silicon or amorphous silicon have received much attention.

  However, a bulk type solar cell having a high photoelectric conversion efficiency and quality characteristics and using a single crystal silicon wafer as a substrate is in common use.

  Generally, a silicon crystal solar cell uses a silicon wafer as a starting material. A silicon wafer is a high-purity silicon that is heated at a high temperature to produce a crystal-grown ingot, which is then cut and polished to produce a large crystal plate-shaped wafer substrate.

  Crystal means a substance in which atoms are regularly arranged.

  In the manufacture of conventional solar cells, the most important wafer processing step is the texture of the substrate surface, that is, the organization. The purpose of such a texture is to increase the light absorption into the solar cell by reducing the reflectivity at the surface of the solar cell that receives light and extending the light passage path in the solar cell. It is to improve the efficiency of light absorption.

  According to the prior art, the mirror-polished wafer surface reflects about 30% to 50% of incident sunlight, but if the surface is textured in a pyramid shape, about 10% to 20% of incident sunlight. Is reflected and the reflectance is remarkably reduced. Furthermore, it is known that when an anti-reflection film (AR) is deposited on the textured surface, the reflectance can be reduced to about 5% to 10%.

  However, the reflectance is an average value observed at 500 nm to 1000 nm, which is the main absorption wavelength band of sunlight, and has a relatively high reflectance at 300 nm to 400 nm, which is a low wavelength region of the sunlight wavelength range. And having a relatively lower reflectivity only after depositing an antireflective coating.

  Therefore, it is necessary to develop a new method for treating a substrate surface having a uniformly low reflectance in all sunlight wavelength regions.

  On the other hand, the most important wafer processing step in manufacturing a conventional silicon solar cell is to inject an N-type material into a P-type silicon wafer substrate to form a PN junction. Since such a PN junction part is a part where an electromotive force converted from light is generated, it is a very important member in terms of the efficiency of the solar cell and the characteristics of the element. The PN junction manufacturing method is roughly classified into a thermal diffusion method and an ion implantation method.

  Using the ion implantation method as described above, it is good to inject an N-type material into a P-type silicon wafer substrate or to inject a P-type material into an N-type silicon wafer substrate to form a PN junction element. Are known. However, the development of a new solar cell element that utilizes a porous silicon wafer as in the present invention and the use of a general solar cell manufacturing method, and a solar that can be expected to have a highly efficient and repeatable effect. Development of a battery manufacturing method is still insignificant.

  In order to solve the above-described problems in the prior art, an object of the present invention is to provide a high-efficiency bulk solar cell having a porous structure surface having a generally low reflectance in various sunlight wavelength regions. Is to provide.

  Another object of the present invention is to provide a high-efficiency solar cell in which surface defects are minimized by forming a passivation layer made of a stable material formed on the surface of these silicon substrates.

  Another object of the present invention is to mass-produce solar cells manufactured by an optimal impurity implantation method while making the best use of existing solar cell manufacturing processes and having high-quality characteristics with high efficiency. An object of the present invention is to provide a method for manufacturing a solar cell with economic merit by enabling cost reduction.

  According to another aspect of the present invention, there is provided a solar cell including a semiconductor layer of a second impurity region different from the first impurity region on a silicon substrate of the first impurity region. The surface of the semiconductor layer in the impurity region has a porous structure in which a plurality of holes are formed.

  In the present invention, the silicon substrate in the first impurity region means an extrinsic semiconductor substrate in which one starting substrate is doped with a specific impurity. The starting substrate may be a P-type semiconductor substrate or an N-type semiconductor substrate depending on the type of impurities.

  Accordingly, in the present invention, the second impurity region is an impurity different from the first impurity doped in the extrinsic semiconductor substrate that is a starting substrate, and a semiconductor layer of a different type from the semiconductor of the first impurity region is formed. It means a semiconductor layer doped with impurities that can be made. When the substrate of the first impurity region, which is the starting substrate, is a P-type semiconductor substrate, the second impurity region is doped with N-type impurities composed of elements included in Group 15 and the like, and the surface of the P-type semiconductor substrate It may be an N-type semiconductor layer formed in the layer. In addition, when the substrate of the first impurity region which is a starting substrate is an N-type semiconductor substrate, the second impurity region is doped with P-type impurities made of elements included in Group 13 and the like, and the N-type semiconductor substrate A P-type semiconductor layer formed on the surface layer.

  In the present invention, the first impurity may be a P-type semiconductor impurity, and the second impurity may be an N-type semiconductor impurity, and vice versa. The silicon substrate may be single crystal silicon or polycrystalline silicon, and is not particularly limited.

  In the present invention, the porous structure in the semiconductor layer of the second impurity region may include an upper electrode at a predetermined portion of the surface and may be formed on the remaining surface excluding a portion where the upper electrode is formed. .

  In the present invention, a lower electrode made of any one metal selected from conductive metals may be further included under the silicon substrate in the first impurity region. The lower electrode may be any conductive metal, but may be an electrode made of aluminum (Al), silver (Ag), platinum (Pt), or the like.

  In the present invention, a semiconductor layer of the first impurity region that is higher in concentration than the concentration of the first impurity region and is porous between the silicon substrate of the first impurity region and the semiconductor layer of the second impurity region. It can further be included.

  The thickness of the semiconductor layer of the first impurity region is not particularly limited, but may be 100 nm to 600 nm.

  In addition, the depth of each hole in the porous structure may be smaller than, equal to, or greater than the thickness of the semiconductor layer of the second impurity region, and all the holes may not be uniform or uniform. You can also.

  The hole has a vertical cross section of one or more of a U shape, a V shape, and a polygon, and the vertical cross sections of the holes have different shapes from each other. be able to. In addition, the surface shape of the hole has a rectangular shape, a polygonal shape, a circular shape, or an indeterminate form having a similar shape, or a structure formed together therewith. Also, the residual structure formed between the holes may have a needle shape.

  The shape of the hole may be characterized in that an angle formed by a surface including a base point of the hole and a side surface is 0 ° to 135 °.

  The depth and width of the hole are not particularly limited, but are preferably 10 nm to 10 mm.

  The surface porosity of the porous structure in the semiconductor layer of the second impurity region may be 10% to 70%.

  The surface of the semiconductor layer of the second impurity region may be any of 220, 311, 320, 331, 400, 411, 422, 511, 531, 533 in crystal analysis using X-ray diffraction (XRD). Or may have one or more crystal faces.

  The solar cell of the present invention may further include a passivation layer or an antireflection film for passivating the silicon substrate on the surface of the porous structure in the semiconductor layer of the second impurity region.

  The passivation layer may be made of silicon oxide or a silicon-based amorphous compound, but is not necessarily limited to these materials.

  The refractive index of the material forming the passivation layer may have an intermediate value between the refractive index of the atmosphere and the refractive index of the silicon substrate, and may be 1.7 to 2.2.

  According to an embodiment of the present invention, a method for manufacturing a solar cell includes doping a second impurity different from the first impurity in the first impurity region into the upper portion of the silicon substrate in the first impurity region to form a semiconductor in the second impurity region. Forming a layer, and forming a porous structure in which a plurality of holes are formed on the surface of the semiconductor layer of the second impurity region.

  According to another embodiment of the present invention, a method of manufacturing a solar cell includes doping a second impurity different from the first impurity in the first impurity region into a silicon substrate in the first impurity region, thereby forming a semiconductor in the second impurity region. A layer having a concentration higher than the first impurity concentration of the silicon substrate between any one of the horizontal planes where the silicon substrate of the first impurity region and the semiconductor layer of the second impurity region are in contact with each other; Forming a semiconductor layer of a first impurity region; removing a semiconductor layer of a second impurity region formed on a side surface of the semiconductor layer of the formed second impurity region; and the first impurity region. Removing the semiconductor layer of the second impurity region adjacent to the silicon substrate to form an electrode, and forming a plurality of holes in the surface of the semiconductor layer of the second impurity region remaining without being removed Including forming a structure.

  The method for forming the semiconductor layer of the first impurity region may be a method for forming a porous silicon layer.

  The method for removing the semiconductor layer in the second impurity region formed on the side surface can use edge isolation.

  In the manufacturing method of the present invention, the step of forming a porous structure on the surface of the semiconductor layer of the second impurity region may include the step of forming an upper electrode at a predetermined portion above the semiconductor layer of the second impurity region, A porous structure is formed on the surface of the semiconductor layer of the remaining second impurity region excluding the portion where the is formed.

The method for doping the second impurity may be selected from an ion implantation method, a thermal diffusion method, and a phosphorus oxychloride (POCl ₃ ) diffusion method.

  In particular, in the method of doping the second impurity, the silicon substrate in the first impurity region may be placed in a furnace at 800 ° C. to 900 ° C. and a gas containing the second impurity may be injected.

When the first impurity is P-type and the second impurity is N-type, the gas containing the second impurity may be phosphorus oxychloride (POCl ₃ ).

  In the manufacturing method of the present invention, the porous structure may be formed by etching the silicon substrate by any one of a wet chemical etching method, a dry chemical etching method, an electrochemical etching method, and a mechanical etching method. Can do.

When using the wet chemical etching method and the electrochemical etching method, the reactant with the silicon substrate is selected from the group consisting of hydrofluoric acid (HF), nitric acid (HNO ₃ ), and acetic acid (CH ₃ COOH). One or more acids.

In particular, the reactant with the silicon substrate includes at least one acid selected from the group consisting of hydrofluoric acid (HF), nitric acid (HNO ₃ ), and acetic acid (CH ₃ COOH), and acetonitrile. , Dimethylformamide, formamide, diethyl sulfoxide, hexamethylphosphoric triamide, dimethylacetamide, dimethylacetaldehyde, water Ethyl alcohol, isopropyl alcohol or isopropyl alcohol Can from a group consisting of a mixture of one or more materials selected.

  In the manufacturing method of the present invention, when any one method selected from the wet chemical etching method, the dry chemical etching method, and the electrochemical etching method is used, the porous structure is generated on the surface on which the porous structure is formed. It can be characterized in that the reaction in which the silicon oxide is removed is maintained as a final reaction.

  In the method for manufacturing a solar cell of the present invention, a passivation layer or an antireflection film for passivating the silicon substrate is formed on the porous structure surface in the semiconductor layer of the second impurity region after each step. The method may further include the step of:

  The method of forming the passivation layer includes a thermal wet oxidation reaction method on the surface of the silicon substrate on which the porous structure is formed, a thermal dry oxidation reaction method on the surface of the silicon substrate on which the porous structure is formed, and It is any one method selected from plasma enhanced chemical vapor deposition (PECVD), in which a silicon-based amorphous compound is deposited on the silicon substrate on which the porous structure is formed. be able to.

  According to the present invention, a porous solar cell having a porous structure in which holes of various forms from a crystallographic and / or structural viewpoint are formed on a silicon wafer substrate is provided, and uniform in a wide wavelength range of sunlight. Thus, the effect of reducing the reflectance can be obtained.

It is a longitudinal cross-sectional view which shows the structure of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the structure of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the structure of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the structure of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the structure of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the structure of the solar cell by one Embodiment of this invention. 1 is a cross-sectional view of a cross section of a surface of a solar cell according to an embodiment of the present invention observed with an electron microscope. It is the plane photograph figure which observed the surface of the solar cell by various embodiments of the present invention with the electron microscope from the upper part. It is the plane photograph figure which observed the surface of the solar cell by various embodiments of the present invention with the electron microscope from the upper part. It is the plane photograph figure which observed the surface of the solar cell by various embodiments of the present invention with the electron microscope from the upper part. It is the schematic diagram which showed the longitudinal cross-sectional shape of the hole which forms the porous structure of the solar cell by one Embodiment of this invention ((a)-(f)). It is the cross-sectional photograph figure which observed the cross section of the surface of the solar cell by one Embodiment of this invention with the electron microscope. It is the cross-sectional photograph figure which observed the cross section of the surface of the solar cell by one Embodiment of this invention with the electron microscope. It is the graph which showed the reflectance of the solar cell surface-treated by various systems. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. It is a longitudinal cross-sectional view which shows the manufacturing process of the solar cell by other one Embodiment of this invention. 5 is a graph showing the energy level of a conduction band-valence band in the structure of a solar cell according to an embodiment of the present invention.

  In addition, the efficiency of the solar cell can be increased by optimal impurity implantation and the minimum manufacturing process by utilizing the surface area larger than the surface area of the conventional semiconductor substrate through the porous surface structure. On the other hand, the passivation layer formed on the porous silicon wafer substrate can be expected to further improve the solar cell efficiency by minimizing surface defects.

  According to the present invention, it is possible to implement the present invention while utilizing an existing solar cell manufacturing process, and it is possible to ensure competitiveness by reducing costs as the demand for solar cells rapidly expands. In other words, it is possible to manufacture a solar cell having high photoelectric conversion efficiency economically because it is possible to manufacture a solar cell having an energy level structure capable of accumulating electrons while making maximum use of an existing solar cell manufacturing process. It has an effect that can be.

  Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  In the attached drawings, the same components are denoted by the same reference numerals as much as possible even when displayed on the other drawings, and the known functions and configurations judged to be confused with the gist of the present invention. Detailed description thereof will be omitted.

  1 to 6 are longitudinal sections schematically showing the structure of a solar cell according to an embodiment of the present invention. 1 to 6, an N-type impurity semiconductor layer 120 formed on a silicon substrate 100 doped with a P-type semiconductor impurity (sometimes referred to as a P-type (silicon) substrate) is included. A solar cell is illustrated. In particular, the silicon solar cell of FIGS. 1 to 3 has a porous structure formed of various types of holes on the upper surface of the semiconductor layer 120 in an N-type impurity region (sometimes referred to as an N-type semiconductor layer). Yes. In one embodiment of the present invention, the hole depth is less than the thickness of the N-type semiconductor layer 120 (see FIG. 1), the same (see FIG. 2), and / or the thickness of the N-type semiconductor layer 120. Since the hole depth is larger than that, a porous structure can be formed on the upper surface of the P-type silicon substrate 100 (see FIG. 3). The thickness of such a porous structure of the present invention can be determined within a range of 0.5% to 50% of the total thickness of the P-type silicon substrate 100, but is not limited thereto. The cross-sectional shape of the hole may be formed in various forms, and may have a form in which double, triple, or more holes are overlapped.

  Meanwhile, the porosity of the N-type semiconductor layer 120 having the porous structure may be 10% to 70%. Here, the porosity refers to the weight of the wafer substrate that has undergone the step of forming a hole so as to have the porous structure of the present invention after measuring the weight A of the semiconductor wafer substrate for solar cells that has been mirror-polished. B is measured to indicate the ratio of the weight AB reduced by the porous structure to the weight A of the initial wafer substrate in percentage. Further, the size of the holes included in the porous structure is not limited to the diagonal length or the size of the diameter, but may be formed within a range of about 10 nm to 10 mm.

  Further, as described above, the depth of the hole can also be formed to 10 nm to 10 mm.

  The silicon wafer substrate 100 having such a porous structure has an effect of improving the efficiency of the solar cell by uniformly having a low reflectance between 1% and 5% in the entire solar wavelength range. . However, such a porous structure causes an increase in the surface area in contact with the atmosphere due to the characteristics of the structure, thereby increasing the ratio of surface defects to the total defects.

  Therefore, in order to further increase the efficiency of the solar cell, surface defects that come into contact with the atmosphere should be minimized in the silicon substrate 100 having a porous structure, but the porous semiconductor of the present invention as shown in FIG. The wafer substrate can achieve the object by further forming a passivation layer 180 on the surface of the porous structure. A detailed description of the passivation layer 180 will be described later with reference to the corresponding drawings.

  Meanwhile, a solar cell according to another embodiment of the present invention will be described with reference to FIG. FIG. 4 illustrates a solar cell in which an upper electrode 140 is provided on a predetermined portion of the upper surface of the N-type semiconductor layer 120, and the remaining portion excluding the portion provided with the upper electrode is formed in a porous structure.

In addition, as illustrated in FIG. 5, in the silicon solar cell according to another embodiment of the present invention, a P-type impurity is doped at a high concentration between the P-type silicon substrate 100 and the N-type semiconductor layer 120. A P + type semiconductor layer 160 is included. The concentration of the P-type impurity doped in the P + type semiconductor layer 160 needs to be relatively higher than the concentration of the P-type impurity doped in the P-type silicon substrate 100. The high concentration level is not limited to a specific concentration, but can be 10 to 100 times higher than the impurity concentration of the P-type silicon substrate 100. Preferably, the doping concentration of the heavily doped P + type semiconductor layer 100 may be 10 ¹⁷ cm ⁻³ to 10 ¹⁹ cm ⁻³ .

  Further, the doping concentration of the N + type impurity doped in the semiconductor layer of the N type impurity region provided on the P + type semiconductor layer 160 may also be a high concentration of the doping concentration level of the P + type semiconductor layer 160.

  The silicon solar cell of FIG. 5 can also form a passivation layer 180 for passivating the P-type silicon substrate 100 on the surface of the porous structure above the N-type semiconductor layer 120. An antireflection film may be formed instead of the passivation layer.

Specifically, the passivation layer 180 made of a stable material protects and passivations the surfaces of the silicon wafer substrate 100 and the N-type semiconductor layer 120, thereby reducing surface defects. Further improve the efficiency of the solar cell. Therefore, the passivation layer 180 is preferably made of a stable material that does not cause a chemical reaction when in contact with the atmosphere, and the stable material may be, for example, silicon oxide (SiO _x ). . In addition, the passivation layer 180 can also function as an antireflection film (AR) that prevents reflection of incident sunlight. That is, sunlight that passes through the atmosphere and enters the solar cell is a mechanism that is absorbed by the silicon wafer substrate 100 through the passivation layer 180 and converted into electrical energy. Here, when the refractive index of the passivation layer 180 is set to an intermediate value between the refractive index of the atmosphere and the refractive index of the silicon wafer substrate 100, the reflection of the incident sunlight is minimized. Sunlight is absorbed by the silicon wafer substrate 100 through the passivation layer 180.

Therefore, in order to obtain such a function at the same time, the passivation layer 180 has an intermediate refractive index between the refractive index of the atmosphere (n = 1.0) and the refractive index of silicon (n = 3.8). It is preferable to make it a substance. For example, when the passivation layer is formed using silicon oxide (SiO _x ) having a refractive index of 1.7 to 2.2, the reflection of incident sunlight is minimized, so Conversion efficiency can be increased.

  FIG. 6 shows a solar cell according to another embodiment of the present invention, in which a P + type semiconductor layer 160 doped with a high concentration of P type impurities on a P type silicon substrate 100 and an N type doped with a high concentration. FIG. 2 is a schematic view of a solar cell in which a semiconductor layer 120 is formed and a passivation layer 180 is formed on the remaining portion of the upper surface of the N-type semiconductor layer 120 except a portion where an upper electrode 140 is provided. In the present invention, the P + type semiconductor layer 160 may be a porous silicon layer, and the P type silicon substrate 100 may be manufactured using a polycrystalline silicon wafer, but is not necessarily limited thereto. Instead, it may be a known substrate used in accordance with various types of solar cells.

  In the present invention, a back electrode may be further provided under the P-type silicon substrate 100, and the back electrode may include a conductive material. In particular, a conductive metal element can be included, but any one or more substances selected from the group of metal elements such as aluminum (Al), silver (Ag), and platinum (Pt) may be used.

  FIG. 7 is a cross-sectional view of the surface of a solar cell according to an embodiment of the present invention observed with an electron microscope. When referring to this, unlike a conventional textured solar cell substrate, a predetermined depth of the wafer surface is shown. A porous structure composed of a plurality of holes can be confirmed. The thickness of the porous structure formed from the surface of the wafer substrate for solar cells to a certain thickness according to an embodiment of the present invention is not particularly limited, but the porous structure is 0. 0 of the total thickness of the wafer substrate. It can be formed in a range from 5% to 50%.

  As can be seen with reference to FIG. 7, the cross-sectional shapes of the holes forming the porous structure can be different from each other, and can have a form in which two or three or more holes overlap each other. It takes various forms where the surface can be smooth or rough. In this embodiment, the porosity of the layer forming the porous structure on the wafer surface may be about 10% to 70%. Incidentally, the porosity of the solar cell wafer substrate having a porous structure according to one embodiment of the present invention shown in FIG. 7 is 50%.

  The physical quantity such as the porosity is a value that cannot be obtained in a conventional solar cell substrate using a pyramidal texture process. A conventional textured substrate has a surface cut into a pyramid-shaped cross section, and each surface of such a pyramid shape is a smooth surface and does not have any holes or pores. It is. Thus, while the prior art texture technique has a side that leads to increase the effective area of the wafer substrate and increase the sunlight collection efficiency, the porous structure of the present invention has a large number of holes on the surface of the substrate. In addition to significantly increasing the effective area of the substrate, the incident light is guided to the internally reflected path more than once, so that the light can be used more efficiently without leaking outside. This is the principle of making it happen. Such a principle will be described in more detail below.

  8 to 10 are plan views of the surface of the solar cell according to various embodiments of the present invention observed from above with an electron microscope. As can be seen with reference to these drawings, the planar shape of the porous structure on the substrate surface can be variously formed and is not limited to a special form. However, it can be classified into polygons, circles, and irregular shapes according to the form. FIG. 8 is a form including a quadrangle as a polygon having a right angle in the inner angle. FIG. 9 shows a circular shape and a similar form. FIG. 10 shows a polygonal shape in which the inner angle is not a right angle as an intermediate pattern between a square and a circle.

  However, it is difficult to limit the shape of the hole formed on the surface of the N-type semiconductor layer having the porous structure of the present invention to the form shown in FIGS. Since it is difficult, it should be understood that not only the accurate shape of the figure but also the similar shape are all included in the shape of the hole. The size of the holes illustrated in FIGS. 8 to 10 is not limited to the size of the diagonal or diameter, but may be formed within a range of about 10 nm to 10 mm.

  The size of these holes can be obtained through control of process variables such as wet chemical reaction, dry chemical reaction, electrochemical reaction, and / or mechanical processing method for forming holes in the wafer substrate. The process variables correspond to variables such as various reaction temperatures, gas atmosphere types, gas pressures, gas amounts, reactants, and reaction times.

  FIG. 11 is a schematic diagram illustrating the shapes of various holes existing in the wafer substrate having a porous structure according to an embodiment of the present invention from a structural viewpoint. FIG. 11 is an example of a vertical cross-sectional shape of a hole forming a porous structure of a solar cell according to an embodiment of the present invention. Referring to FIG. 11, the vertical cross-sectional shape of the solar cell of the present invention is such that the angle at which the lower part of the hole meets the wafer, that is, the angle between the plane formed by the bottom base point of the hole and the side of the hole is 0 It can be confirmed that they have various shapes ranging from ° to 135 °.

  For example, in the case of the hole of the form (a), the angle is 80 ° to 90 °, and the shape is a polygonal column or a columnar shape in which the hole entrance and the inside size are formed uniformly. In the case of the hole in the form (b), the angle is less than 60 °, and the angle increases rapidly in the direction of the entrance of the hole to form a pencil lead shape that forms 80 ° to 90 °. In the case of the hole in the form (c), the angle is 60 ° or less, and the angle increases gradually toward the entrance of the hole to form a test tube form in which 80 ° to 90 ° is formed. In the case of the hole in the form (d), the angle is 80 ° to 90 °, and it is a water cup shape in which the angle gradually decreases and the hole entrance size increases as it goes in the hole entrance direction. In the case of the (e) -shaped hole, the angle is 90 ° to 135 °, and the angle increases gradually toward the entrance of the hole, and the size of the entrance of the hole decreases. In the case of the hole of the form (f), the angle is less than 60 °, and a diamond shape in which the angle suddenly increases to more than 90 ° and less than 135 ° in a certain portion from the middle part of the hole to the entrance is shown. .

  As for the width of the hole, the largest width can be measured in the hole shown in the above example, and this can be the same concept as the size of the hole.

  Therefore, it can be 10 nm to 10 mm. The depth of the hole is not particularly limited, but may be 10 nm to 10 mm, and may be constituted by not only a single layer hole but also a hole forming a double layer or a triple layer or more.

  The shape of the holes forming the porous structure on the surface of the wafer substrate may be a set of the above-described forms and / or irregular shapes, and may be configured by only one kind of holes regularly. . The pattern of the inner or outer wall of the hole depends on the size of the hole and the spacing between adjacent holes, which can be obtained through control of process variables.

  Electron micrographs obtained by actually observing the longitudinal sectional shape of the holes forming the porous structure of the surface of the solar cell substrate according to the embodiment of the present invention schematically shown in FIG. 11 are shown in FIGS. 13. FIG. 12 shows a test tube type hole corresponding to FIG. FIG. 13 can be confirmed to be a pencil-shaped hole corresponding to (b) of FIG. 11 or a diamond-shaped hole corresponding to (f).

  FIG. 12 and FIG. 13 show a case where a hole is formed in a test tube or pencil lead (or diamond) shape, but is not necessarily limited to such a shape. A porous structure can be formed by an assembly of holes having a shape.

  In the above-described surface structure of a silicon wafer substrate including various types of holes, particularly when the angle formed by the surface including the base point and the side surface of the hole is 45 °, all incident light is reflected twice. If it has a path and is 60 °, it has a path where all incident light is reflected three times. Therefore, in the porous structure formed of such holes, since the incident light travels at least twice or more while being reflected inside the surface structure, it is difficult for the incident light to leak outside. Become a structure.

  In other words, the technical idea of the present invention is to have a porous structure in which holes are formed in the form of extending the light passage path on the wafer surface and thereby increasing the amount of light transmitted to the silicon structure. This is the principle of increasing the light efficiency of the solar cell.

  Next, the technical features of the present invention can be applied to a single crystal silicon wafer substrate or a polycrystalline silicon wafer substrate as a silicon wafer substrate in a bulk type solar cell. In particular, holes are formed in the single crystal silicon wafer substrate. In order to have a porous structure, these solar cells are crystal analysis results using an X-ray diffraction (XRD) pattern, and are solar cells using a single crystal silicon wafer. In spite of the fact, it has crystal faces other than the characteristics of crystal faces 100, 400 and 111 and related information (hereinafter abbreviated as “characteristics”). That is, in the case of a conventional single crystal silicon wafer, a wafer having 100 and 111 crystal planes is usually used as a raw material substrate for a pyramidal texture. Since the 100 crystal plane can be interpreted as a 400 crystal plane depending on interpretation, it is generally recognized as a characteristic of a crystal plane having the same structure. In the conventional solar cell using a silicon wafer having 100 crystal planes, the surface appearing on the surface as a result of the pyramid texture is 111 planes, and the crystal analysis result using the XRD pattern is that of the raw material wafer occupying the entire volume. An analysis result of 100 to 400 planes which are crystal characteristics is obtained.

  However, a bulk type solar cell using a semiconductor wafer substrate having a porous surface according to an embodiment of the present invention has a normal single crystal wafer substrate due to the influence of a portion having a very high angle resulting from the porous structure. It has the characteristics of 220, 311, 400, 331, 422, 511, 531, 320, and 533 crystal planes that are not found in the solar cell used. Further, the characteristics in the crystallographic viewpoint of the solar cell having the porous structure of the present invention are not found in the general conventional single crystal silicon wafer substrate, 220, 311, 400, 331, 422, 511, It can be said that it has the characteristics of the 531, 320, 533 crystal plane. In one solar cell according to the present invention, since the hole shapes can be made different from each other, the characteristics of a large number of crystal planes can be provided as described above. The crystal plane characteristics of silicon (Si) can be based on data provided by JCPDS card.

  One embodiment of a solar cell having a porous surface according to the present invention is characterized in that the effect of preventing reflection is excellent even without an antireflection film (AR) layer used in conventional solar cells. However, after the porous structure is formed on the surface of the substrate, an antireflection film can be additionally formed thereon.

  In that case, it is expected to further reduce the reflectance of incident sunlight. The mirror-polished wafer surface reflects an average of about 30 to 50% of sunlight (wavelength range of 300 to 1100 nm), and an average of about 10 to 20% in the case of a pyramidal texture applied to a conventional solar cell. reflect.

  Therefore, although an effort is made to further reduce the light reflectance by using an antireflection film, the present invention eliminates the pyramid texture process and the deposition process of the antireflection film even if the substrate surface is removed. There is an advantage that the reflectance can be remarkably lowered.

  FIG. 14 is a graph showing the result of measuring the actual reflectivity of a solar cell obtained by surface-treating a silicon wafer substrate for solar cell by various methods.

  Referring to FIG. 14, the wafer (a) that has been subjected to the initial specular polishing treatment in the sunlight wavelength range of 300 nm to 1100 nm shows a very high reflectance ranging from 30% to 70%. It can be confirmed that the wafer (b) after being textured, which is a processing method for solar cells, has a sharp decrease in reflectivity to about 10% to 30%.

  Moreover, the solar cell (c) to which the antireflection film (AR) used in the conventional solar cell is applied can confirm that the amount of reflection is further reduced to a level of 10% or less. However, even in the case of the solar cell (c), it has a relatively high reflectance of 15% or more in a wavelength region having a low sunlight wavelength range, that is, 300 nm to 400 nm, so that it is uniform in all sunlight wavelength regions. It can be confirmed that the reflectance is not lowered.

  However, in the solar cell (d) using the wafer substrate having the porous structure of the present invention, even in a state where the antireflection film is not used, it is as low as 1% to 5% uniformly in the entire solar wavelength range. It can be confirmed that it has a reflectance.

  However, the present invention is not limited to a solar cell that does not form an antireflection film that requires a separate process, and an antireflection film is further formed on a structure in which the reflectance is drastically reduced by a porous structure. A solar cell in which the amount of reflection of incident light is minimized can be included. Due to the low reflectivity implementation effect of the present invention, the process of forming an antireflection film using vacuum deposition equipment can be eliminated or reduced from the conventional solar cell manufacturing process, thereby reducing process costs. Through this, the manufacturing unit price of the solar cell can be lowered to have a competitiveness in production.

In the method for manufacturing a solar cell according to an embodiment of the present invention, the porous surface is obtained by a wet chemical reaction, a dry chemical reaction, a wet electrochemical reaction, and / or a mechanical processing method. . In the case of wet chemical reaction and wet electrochemical reaction, an acid similar to hydrofluoric acid (HF), nitric acid (HNO ₃ ), and acetic acid (CH ₃ COOH) is used as the main reactant with the silicon wafer. As the reactant, a mixture of the above-mentioned acids can be used. In particular, the wet solution for the final chemical reaction is a solution of the above acid and mixed acid in acetonitrile, dimethylformamide, formamide, diethyl sulfoxide, hexamethylphosphoric triamide, dimethylacetamide, water, methyl alcohol, ethyl alcohol, isopropyl alcohol. It can be used by diluting into a mixed solution of 1 to 4 of

  A porous solar cell manufactured according to an embodiment of the present invention is applied to a solar cell configured by a PN junction as an emitter formation by diffusion known as a conventional crystalline silicon solar cell. . The solar cell having the porous surface is formed by depositing a hydrogenated amorphous silicon material having a polarity opposite to that of the wafer by a thin film deposition method known as a conventional heterojunction solar cell. It is used for the solar cell comprised. Since the manufacturing process of the porous solar cell of the present invention can be used at any stage in the manufacturing process of the conventional heterojunction solar cell, it is not necessary to limit the process steps for forming the porous structure. .

  FIGS. 15 to 17, FIGS. 18 to 23, and FIGS. 24 to 28 are schematic views of longitudinal sections corresponding to respective processes of manufacturing a solar cell according to one embodiment of the present invention. The manufacturing process of the solar cell is merely one embodiment and is not necessarily limited to this order. Each step of the manufacturing method using the solar cell according to the present invention may be continuous or intermittent. That is, each process step can be performed in a continuous operation, but each step can be performed separately for each process, and another process can be further added to each step.

  15-17 is one Embodiment of the manufacturing process of the solar cell of this invention. First, the N-type impurity formed in the upper layer of the P-type silicon substrate 100 is doped at a high concentration to form the semiconductor layer 120 in the N-type impurity region (see FIG. 15).

In the present invention, the high-concentration N-type impurity may be any one of group 15 elements, but it is preferable to use phosphorus (P). As a method of doping the high-concentration N-type impurity, a method of placing a P-type silicon substrate in a high-temperature furnace and injecting a gas containing the N-type impurity can be used. The temperature is preferably 800 to 900 ° C., but is not necessarily limited thereto. The gas including the high concentration N-type impurity may be phosphorus oxychloride (POCl ₃ ).

As a method for introducing impurities for forming the N-type impurity semiconductor layer 120, in addition to the phosphorus oxychloride (POCl ₃ ) diffusion method, techniques known to those skilled in the art, such as an ion implantation method and a thermal diffusion method, are used. Can be used.

  The ion implantation method is a method in which a group 13 or group 15 element such as boron (B), arsenic (As), or phosphorus (P) is implanted as an impurity into a silicon wafer substrate. If the starting substrate is a P-type silicon wafer substrate 100 as shown in FIG. 15, an N-type layer 120 is formed by implanting a group 15 element as an impurity, and if the starting substrate is an N-type silicon wafer substrate, 13 A PN junction structure is formed by implanting a group element as an impurity to form a P-type layer.

  In the impurity implantation step, the characteristics of the PN junction element can be varied in various ways by controlling the thickness or depth of the heterogeneous junction layer through impurity concentration control, reaction time control, and the like.

  Depending on the semiconductor type of the starting substrate, the impurity type may be an acceptor ion such as B, Ga, In or the like for producing a valence band or a P-type semiconductor layer, or a conductive ion. It can be a donor ion such as Sb, As, P, Bi, etc. for making a band and an N-type semiconductor layer.

  The ion implanter can use a high current generally having a current of 3 mA or more and a medium current less than that.

  Ion implantation refers to the introduction of atoms different from impurities into a region near the surface of the semiconductor by various methods, such as a shallow junction, a lower processing temperature, and / or precise adjustment. Used when needed. The ion implantation process includes processes such as generation of impurity ions, acceleration to 1 MeV high energy at 5 eV, and introduction of impurities into the semiconductor. Implanted ions enter the crystal along the path and are injected to replace semiconductor atoms, but the ions are not stabilized on the lattice side, so they are stabilized through the annealing process. It is also possible to add a process to be performed.

  Referring to FIG. 16 as the next step, the surface of the porous structure composed of various types of holes is formed on the upper surface of the semiconductor layer 120 in the N-type impurity region. The depth of the hole in the porous structure of FIG. 16 is smaller than the thickness of the N-type semiconductor layer 120, but is not necessarily limited to this, and the depth of the porous structure is as shown in FIGS. 3, the thickness of the N-type semiconductor layer may be the same as or larger than that of the N-type semiconductor layer. The method of forming the surface of such a porous structure is a wet chemical reaction, a dry chemical reaction, a wet electrochemical reaction, and / or a mechanical processing method, etc., as described above.

  Next, the next step according to an embodiment of the present invention is illustrated in FIG. This can be selectively introduced by forming a passivation layer 180 for passivating the substrate on the surface of the porous structure above the N-type semiconductor layer 120.

  However, although not shown, in the case where an upper electrode is formed on the upper portion of the N-type semiconductor layer 120, a porous structure is introduced into the remaining portion excluding the portion where the upper electrode is formed, and the porous A passivation layer 180 is formed on the surface of the conductive structure.

  Hereinafter, various embodiments in which the passivation layer 180 is formed on the silicon solar cell will be described.

First Embodiment The first embodiment is a technique for chemically forming a passivation layer 180 on the porous surface in the step of producing the porous surface structure by a chemical reaction method. That is, this is a technique in which the process of FIG. 16 is performed to generate a porous surface and to form a passivation layer. Manufacturing a porous surface structure by a chemical reaction method means a reaction between a solid silicon wafer substrate and a gas, a reaction between a solid silicon substrate and a liquid (solution), and a solid silicon wafer. It means a method of generating a porous surface structure by an electrochemical reaction in which electric energy is applied to a substrate to react with a substrate.

  First, after forming a silicon solar cell having a PN junction (FIG. 15), the silicon wafer substrate on which the PN junction is formed is immersed in a solution mixed with hydrogen fluoride (HF), and electric energy is applied to perform electrochemistry. Allow the reaction to proceed. The present invention induces a reaction formula expressed by the following chemical formula to be a dominant reaction in the electrochemical reaction, and as shown in FIG. A method of forming a passivation layer 180 made of a material is used.

According to Equation 1 in the reaction formula, a porous structure is formed on the top of the solar cell, and according to Equation 2, a passivation layer is formed by forming silicon oxide (SiO ₂ ) on the surface of the porous structure. 180 is formed.

Next, according to Equation 3, the silicon oxide (SiO ₂ ) formed in Equation 2 is removed. A porous structure is formed on the upper part of the PN-bonded silicon wafer substrate due to the continuous circulation of the reactions expressed by Equations 1, 2, and 3. Solar cell including a passivation layer 180 similar to that of FIG. 17 by controlling the reaction to maintain the reaction of Formula 2 where silicon oxide (SiO ₂ ) is generated as the final reaction. Can be formed.

  In some embodiments of the present invention, the upper electrode may be formed on the top of the solar cell illustrated in FIG. 17 as the last step. A known printing method can be used to form the electrode.

  Since silicon oxide is a very stable material that does not easily undergo chemical reaction or the like, it is very suitable as a composition for a passivation layer. Such a passivation layer can passivate the surface of the silicon wafer substrate, thereby minimizing surface defects, thereby improving the efficiency of the solar cell.

  In addition, as described above, the refractive index of silicon oxide is a value between the refractive index of the atmosphere and the refractive index of silicon, so that the reflection of incident sunlight is minimized and a large amount is reflected inside the solar cell. The efficiency of the solar cell can be further improved by absorbing the light.

  The solar cell produced in this way has an effect of increasing efficiency by 5% to 15% compared to a porous silicon solar cell that does not have an existing passivation layer.

  The silicon solar cell on which the passivation layer according to the first embodiment is formed can be manufactured using an electrochemical reaction that applies electric energy as described above, but is also manufactured using a chemical reaction. You can also A silicon solar cell having a passivation layer is obtained by controlling the final reaction to be maintained by the formula 2 by causing the reaction expressed by the chemical formula 1 to occur regardless of which reaction is used. Can do.

Second Embodiment A process of manufacturing a porous silicon solar cell having a passivation layer will be described according to a second embodiment of the present invention. In this embodiment, the passivation layer is formed using a thermal oxidation reaction. The thermal oxidation reaction means an oxidation reaction that occurs at a temperature higher than normal temperature. According to the present embodiment, the silicon wafer substrate reacts with oxygen at a temperature higher than normal temperature to cause a passivation layer made of silicon oxide. It is formed. Such a thermal oxidation reaction includes a wet method in which an oxygen component is supplied in a steam state to induce an oxidation reaction, and a dry method in which oxygen is supplied in a dry atmosphere.

  According to one embodiment of the present invention, first, an upper electrode is formed on an N-type semiconductor layer of a silicon solar cell having a PN junction. The upper electrode may be formed using a known printing method. Next, the silicon wafer substrate on which the electrodes are formed is immersed in a solution mixed with hydrogen fluoride (HF) and electric energy is applied to advance an electrochemical reaction, or a chemical reaction without applying electric energy is advanced. Let

  Also in the form of the second embodiment, control is performed so that the reaction expressed by Chemical Formula 1 becomes the main reaction. In the first embodiment, Formula 2 is maintained so as to be a final reaction, but in the second embodiment, control is performed so that Formula 3 is maintained as a final reaction. As described above, since the equation 3 is a reaction for removing the silicon oxide formed in the equation 2, if such a reaction is maintained as a final reaction, a passivation layer is not formed and is illustrated in FIG. As described above, a silicon wafer substrate having a porous structure in which the surface of silicon is exposed is obtained. Of course, in the second embodiment, since the porous structure is formed after the upper electrode is first formed on the silicon wafer substrate, the porous structure is not formed below the upper electrode.

  Next, the silicon wafer substrate on which the porous structure is formed is subjected to an oxidation reaction to form a passivation layer 180 as shown in FIG. By such an oxidation reaction, the surface of the N-type semiconductor layer of the silicon solar cell is oxidized to form a passivation layer 180 made of silicon oxide.

  Generally, a high temperature of 600 ° C. or higher is required to form silicon oxide on the surface of a silicon wafer using a thermal oxidation reaction. Since the silicon wafer substrate having a porous structure of the present invention has a large surface area, the speed of the oxidation reaction in which silicon oxide that stabilizes the surface is generated can be increased. For this reason, the initial oxidation reaction is faster than the conventional silicon oxidation reaction mechanism, but when a certain thickness of oxide film is formed after a certain period of time, the conventional mechanism To follow. Accordingly, it is sufficient that the thermal energy for forming the passivation layer 180 by oxidizing the surface of the silicon wafer substrate having a porous structure is 200 ° C. to 600 ° C., preferably about 500 ° C. The passivation layer 180 can be formed by performing an oxidation reaction in an oven having about 30 minutes.

  Thus, in the manufacture of the porous silicon wafer substrate having the passivation according to the second embodiment, a passivation layer having an excellent composition can be obtained at a relatively low temperature.

  In addition, as described above, the passivation layer made of silicon oxide can also function as an antireflection film to further improve the efficiency of the solar cell, and was actually manufactured according to such an embodiment. The solar cell element showed an efficiency increase of 8% to 20% compared to the solar cell element having an existing porous structure.

  Meanwhile, a porous silicon substrate having a passivation layer according to the second embodiment is manufactured by an electrochemical method, a chemical method, a mechanical method, and / or a method using a dry oxidation reaction. All can be applied to the surface of a solar cell.

Third Example The third example is an embodiment of a method of manufacturing by a method of depositing a passivation layer 180 on the surface of an N-type semiconductor layer of a silicon substrate having a porous structure.

The passivation layer 180 is preferably deposited by selecting a material that can effectively remove surface defects of the silicon substrate. Silicon-based amorphous compounds are suitable as such materials. The silicon-based amorphous compound may be any material that can be selected by those skilled in the art having a known technique in the relevant field. In particular, amorphous silicon hydride (a-Si: H), amorphous hydrogen nitride (a- Si _x N _y ) and the like are preferable.

  On the other hand, a known thin film deposition technique known to those skilled in the art may be used for surface deposition of the passivation layer 180, but preferably a plasma enhanced chemical vapor deposition (PECVD) method is used. can do. The plasma chemical vapor deposition method is a method in which plasma energy is used to decompose a mixed gas into ions and radicals so that a target substance is deposited. In addition, the passivation layer 180 can be deposited in a multilayer structure instead of a single layer using such a deposition method.

  The porous silicon solar cell having the passivation layer 180 is completed by printing the upper electrode on the uppermost part of the silicon solar cell thus formed.

  The passivation layer 180 formed according to the third embodiment also functions as an antireflection film that minimizes surface defects, thereby further improving the efficiency of the solar cell. The solar cell element manufactured by such an example showed an increase in efficiency of 10% to 25% compared to the solar cell element having an existing porous structure.

  A method for manufacturing a solar cell according to another embodiment of the present invention is illustrated in FIGS. The embodiments of the solar cell manufacturing method further include a P + type semiconductor layer 160 doped with a high concentration of P type impurities between the P type silicon substrate 100 and the N type semiconductor layer 120. To do.

  Referring to FIGS. 18 to 23, as one method of manufacturing a solar cell of the present invention for achieving the above object, an N-type semiconductor layer is doped by doping a P-type silicon substrate 100 with a high-concentration N-type impurity. The step of forming 120 is illustrated first (FIG. 18). The N-type impurity may be totally doped on the slope of the P-type silicon substrate 100, that is, the front surface, the back surface, and the four side surfaces.

  The thickness of the N-type impurity semiconductor layer is not particularly limited, but is preferably 100 to 600 nm.

  Next, a P + type semiconductor layer 160 doped with a high concentration P type impurity is formed between any one of the horizontal planes where the P type silicon substrate 100 and the N type semiconductor layer 120 are in contact (FIG. 19). . What has been described above is merely an example of the structure of the present invention, and is not limited to the horizontal P + type semiconductor layer 160, but may be formed in a P + type semiconductor layer that is depressed in the P type silicon substrate 100. it can.

The P + type semiconductor layer 160 may be formed by forming a porous silicon layer, and one or more may be formed. The porous silicon layer can be easily formed without requiring a short process time and additional equipment, and can effectively function as an antireflection film. In particular, the porous silicon layer is formed by immersing the P-type silicon substrate 100 in an aqueous solution of HF—C ₂ H ₅ OH—H ₂ O and passing a constant current according to the substrate conditions, thereby generating holes. It can be formed through injecting anodic oxidation etching. As a formation method, there are chemical etching through HNO ₃ and electrochemical etching in which a current flows.

  The porous silicon layer thus formed can contribute to maximizing the increase in efficiency of the solar cell by performing the role of a surface protective film in addition to the function of the antireflection film in the solar cell. .

  Thereafter, the N-type semiconductor layer formed on the side surface is removed from the formed N-type semiconductor layer 120 (see FIG. 20), and the N-type semiconductor layer adjacent to the P-type silicon substrate 100 is removed. The lower electrode 200 is formed (FIG. 21). The method for removing the N-type semiconductor layer formed on the side surface shown in FIG. 20 can use edge isolation. The reason for removing the N-type semiconductor layer is that when it is later connected to a metal layer or metal electrode, a short circuit occurs between the anode and the cathode of the solar cell, which becomes an element unnecessary for the operation of the solar cell.

  The step of removing the horizontal N-type semiconductor layer 120 that is not the side surface has no meaning in the formation of a back surface field (BSF) including a conductive material similar to aluminum (Al). In some cases, a separate removal step is not required. As a method for removing the N-type semiconductor layer, a generally known method can be used, and the method is not limited to a specific method. A preferable edge isolation process includes wet etching using plasma, plasma dry etching, laser etching, laser scribing, and the like. Although the characteristics of the solar cell operation are not greatly changed by the isolation method, the plasma dry etching method and the plasma wet etching method can be advantageously used when considering mass production. The plasma etching method is a method in which a plurality of substrates are stacked and exposed to plasma particles or a solution so that the PN junction is separated.

  The lower electrode 200 of FIG. 21 may be a back surface field (BSF) including aluminum (Al) among metal elements. In addition, silver (Ag), platinum (Pt), etc. with excellent conductivity can be used. A specific method for forming aluminum (Al) BSF is a P-type silicon substrate from which an N-type semiconductor layer acting on the edge is removed, a P + type semiconductor layer, and a solar cell composed of an N-type semiconductor layer. Applying a paste containing a metal element such as aluminum (Al) to the back surface of the silicon substrate or the surface of a p-type silicon substrate that can be stacked according to the stacked form of the solar cell and heat-treating it at a high temperature.

  The temperature of the heat treatment is 600 ° C. to 900 ° C. In this case, P + semiconductor region in which aluminum acts as an impurity on the surface of silicon and the back surface or surface of the P-type silicon substrate is doped with P-type impurities at a high concentration Or a P ++ semiconductor region. Such a region serves to increase the efficiency of the solar cell by preventing recombination of electrons from electron-hole pairs generated on the P-type substrate by light. The thickness of the electrode is preferably 10 μm to 30 μm.

  After the above process, a porous structure is formed on the remaining N-type semiconductor layer 120 (FIG. 22), and a passivation layer 180 is formed on the surface of the porous structure (FIG. 23). Although not shown in the drawings, an upper electrode 140 may be formed on the N-type semiconductor layer.

  In addition, the method of generating the electrode in FIG. 21 is to heat-treat at a high temperature after applying a metal. At this time, the metal used may be a metallic element, and in particular, aluminum (Al), silver A substance such as (Ag) or platinum (Pt) is preferred.

  In the solar cell of the present invention, a high-concentration N-type semiconductor layer 120 and a P + -type semiconductor layer 160 formed by a method for forming a porous silicon layer are adjacent to a P-type silicon substrate 100 and are electrically connected through a lower electrode 200. It comes to be able to communicate. The P + type semiconductor layer 160 does not necessarily have a layered structure, and may have a plurality of depressed structures that can be included in a P type silicon wafer as a certain form. When the conduction band, valence band and Fermi energy level of each semiconductor layer of the solar cell having such a structure are illustrated, electron-hole pairs excited by light are generated on the P-type silicon substrate, It can be confirmed that these excited electrons are accumulated in a large amount at the interface or interface between the P-type silicon substrate and the P + -type semiconductor layer by the structure of the P + -type semiconductor layer having different Fermi energy levels.

  In the solar cell manufactured by the above-described method, electron accumulation sites are formed by the Fermi energy levels of the P + layer and the P + layer of the aluminum BSF layer on the adjacent surface of the P-type silicon substrate where electron-hole pairs are generated by light. As a result, the structure can increase efficiency. That is, the solar cell according to the present invention has a silicon wafer and a P + type semiconductor layer by temporarily adjusting electrons generated in a P-type silicon substrate by adjusting a laminated structure and artificially designing a Fermi energy level. A solar cell having a structure in which a large amount of electrons are filled in the adjacent surface between the two. Therefore, the electrons accumulated in a large amount in this way are less likely to be recombined and lost, and can generate high power depending on the filling amount. Therefore, a highly efficient photoelectric conversion rate can be expected.

  As can be seen from the solar cell of the present invention shown in the longitudinal sectional view of FIG. 23, the solar cell of the present invention is a P + type semiconductor in which a P-type silicon substrate 100 is placed in the middle and P-type impurities are doped at a high concentration. A layer 160 and a lower electrode layer 200 are formed. As a result, it arrange | positions so that an electronic loss may be reduced and photoelectric conversion efficiency may be improved.

  The manufacturing method of the silicon solar cell shown in FIGS. 24 to 28 is also the same as the manufacturing method of FIG. 23 described above. However, referring to FIG. 24, in the solar cell according to another embodiment of the present invention, the N-type semiconductor layer 120 is formed so as to surround the P-type silicon substrate 100, and then horizontally with the P-type silicon substrate 100. The P + type semiconductor layer 160 is formed between the N type semiconductor layer 120 which is a lower horizontal layer and the contact surface of the P type silicon substrate 100 among the N type semiconductor layers in contact.

  Therefore, referring to FIG. 25, as an intermediate process, the vertical cross section of the solar cell is laminated in the order of N-type semiconductor layer 120, P + type semiconductor layer 160, P-type silicon substrate 100, and N-type semiconductor layer 120 from the bottom. The solar cell in this case has a structure for isolating and accumulating the separated electrons on the P-type substrate where electron-hole pairs are generated, and the P + type semiconductor layer 160 is placed above and below the P-type silicon substrate 100. In order to place it, as shown in FIG. 26, the upper N-type semiconductor layer 120 is removed to form a lower electrode layer 200 containing aluminum. In addition, an electrode is formed on the exposed surface of the N-type semiconductor layer 120 provided in the lowermost solar cell. This is because the upper electrode 140 already described above is formed when the solar cell is placed upside down. It corresponds to.

  As the next step, as can be seen from FIG. 27, the exposed surface of the N-type semiconductor layer 120 excluding the portion where the upper electrode 140 is mounted is used as in the method of manufacturing a solar cell in the other embodiments described above. A porous structure in which various types of holes are formed is formed. Further, FIG. 28 illustrates that a passivation layer 180 is formed on the surface of the porous structure.

  Each step of the manufacturing process of the solar cell according to various embodiments of the present invention may be continuous or intermittent, and in particular, the PN junction process and the porous structure forming process are continuous. Without being limited thereto, another independent process may be added between the two processes.

  According to one embodiment of the present invention, a step of further forming an antireflection film (AR) on the upper surface can be set after the manufacturing step of the solar cell. The material forming this antireflection film may be used in conventional solar cells.

  The principle that the photoelectric conversion efficiency of the solar cell of the present invention is improved can be understood from the structural aspect of the solar cell as described above, and is a graph expressing the Fermi energy level in each semiconductor layer. This can be understood more easily with reference to FIG.

  FIG. 29 illustrates the conduction band and the valence band for each section with respect to the solar cell layer, while the electrons generated and separated by the P-type silicon substrate 100 move to the N-type semiconductor layer 120. It can be confirmed that the P + type semiconductor layer 160 is clogged by the barrier and is isolated and accumulated at the adjacent interface between the P type silicon substrate and the P + type semiconductor layer.

  As mentioned above, the structure used as the concrete problem-solving means of this invention is only an illustration, and this invention is not necessarily restrict | limited to these. Those skilled in the art can change or modify the embodiments described within the scope of the present invention, and such changes or modifications are also within the scope of the present invention. The constituent materials described in the present invention can be easily selected and replaced from various materials known to those skilled in the art. Moreover, those skilled in the art can omit some of the components described in the present specification without deterioration of performance, or add components to improve performance. In addition, those skilled in the art can change the order of the method steps described herein according to the process environment and equipment.

  According to the present invention, a porous solar cell having a porous structure in which holes of various forms from a crystallographic and / or structural viewpoint are formed on a silicon wafer substrate is provided, and uniform in a wide wavelength range of sunlight. Thus, the effect of reducing the reflectance can be obtained.

  In addition, the efficiency of the solar cell can be increased by optimal impurity implantation and the minimum manufacturing process by utilizing the surface area larger than the surface area of the conventional semiconductor substrate through the porous surface structure. On the other hand, the passivation layer formed on the porous silicon wafer substrate can be expected to further improve the solar cell efficiency by minimizing surface defects.

  According to the present invention, it is possible to implement the present invention while utilizing an existing solar cell manufacturing process, and it is possible to ensure competitiveness by reducing costs as the demand for solar cells rapidly expands. In other words, it is possible to manufacture a solar cell having high photoelectric conversion efficiency economically because it is possible to manufacture a solar cell having an energy level structure capable of accumulating electrons while making maximum use of an existing solar cell manufacturing process. It has an effect that can be.

100: P-type silicon substrate
120: N-type semiconductor layer 140: Upper electrode 160: P + type semiconductor layer 180: Passivation layer 200: Lower electrode

Claims (28)

In the solar cell including the semiconductor layer of the second impurity region different from the first impurity region on the silicon substrate of the first impurity region,
The solar cell according to claim 1, wherein the surface of the semiconductor layer of the second impurity region has a porous structure in which a plurality of holes are formed. The porous structure in the semiconductor layer of the second impurity region is
The solar cell according to claim 1, wherein an upper electrode is included in a predetermined portion of the surface, and the solar cell is formed on the remaining surface excluding a portion where the upper electrode is formed.   The solar cell according to claim 1, further comprising a lower electrode made of any one metal selected from conductive metals under the silicon substrate of the first impurity region.   And further including a first impurity region semiconductor layer having a higher concentration than the first impurity region and being porous between the silicon substrate of the first impurity region and the semiconductor layer of the second impurity region. The solar cell according to claim 1.   The solar cell according to claim 4, wherein a thickness of the semiconductor layer in the first impurity region is 100 nm to 600 nm.   2. The solar cell according to claim 1, wherein the depth of each hole in the porous structure is smaller than, equal to, or greater than the thickness of the semiconductor layer of the second impurity region.   2. The solar cell according to claim 1, wherein the shape of the hole is different from each other in any one or more of a U-shape, a V-shape, and a polygon.   2. The solar cell according to claim 1, wherein an angle formed by a surface including a base point of the hole and a side surface is 0 ° to 135 °.   The solar cell according to claim 1, wherein the surface porosity of the porous structure in the semiconductor layer of the second impurity region is 10% to 70%.   The surface of the semiconductor layer of the second impurity region may be any of 220, 311, 320, 331, 400, 411, 422, 511, 531, 533 during crystal analysis using X-ray diffraction (XRD). The solar cell according to claim 1, wherein the solar cell has one or more crystal planes.   The solar cell according to claim 1, wherein a passivation layer or an antireflection film is further formed on the surface of the porous structure in the semiconductor layer of the second impurity region.   The solar cell according to claim 11, wherein the passivation layer passivates the silicon substrate.   The solar cell according to claim 11, wherein the passivation layer is made of at least one silicon oxide or silicon-based amorphous compound.   12. The solar cell according to claim 11, wherein the refractive index of the material forming the passivation layer has an intermediate value between the refractive index of the atmosphere and the refractive index of the silicon substrate. Doping a second impurity different from the first impurity of the first impurity region on the silicon substrate of the first impurity region to form a semiconductor layer of the second impurity region;
Forming a porous structure in which a plurality of holes are formed on the surface of the semiconductor layer of the second impurity region. Doping a silicon substrate of the first impurity region with a second impurity different from the first impurity of the first impurity region to form a semiconductor layer of the second impurity region;
The first impurity region having a concentration higher than the concentration of the first impurity of the silicon substrate is disposed between any one of the horizontal surfaces where the silicon substrate of the first impurity region and the semiconductor layer of the second impurity region are in contact with each other. Forming a semiconductor layer; and
Removing the semiconductor layer of the second impurity region formed on the side surface of the semiconductor layer of the second impurity region formed;
Removing the semiconductor layer of the second impurity region adjacent to the silicon substrate of the first impurity region to form an electrode;
Forming a porous structure in which a plurality of holes are formed on the surface of the semiconductor layer of the second impurity region that remains without being removed.   The method for manufacturing a solar cell according to claim 16, wherein the method for forming the semiconductor layer of the first impurity region is a method for forming a porous silicon layer.   The method of manufacturing a solar cell according to claim 16, wherein the method of removing the semiconductor layer of the second impurity region formed on the side surface uses edge isolation. Forming a porous structure on a surface of the semiconductor layer of the second impurity region,
After forming an upper electrode at a predetermined portion of the semiconductor layer in the second impurity region, forming a porous structure on the surface of the semiconductor layer in the remaining second impurity region except for the portion where the upper electrode is formed. The method for manufacturing a solar cell according to claim 15 or 16, wherein the method is a solar cell manufacturing method. The method for doping the second impurity is any one selected from an ion implantation method, a thermal diffusion method, and a phosphorus oxychloride (POCl ₃ ) diffusion method. 16. A method for producing a solar cell according to 16.   16. The method of doping the second impurity includes placing a silicon substrate in the first impurity region in a furnace at 800 ° C. to 900 ° C. and injecting a gas containing the second impurity. 16. A method for producing a solar cell according to 16. The sun of claim 21, wherein when the first impurity is P-type and the second impurity is N-type, the gas containing the second impurity is phosphorus oxychloride (POCl ₃ ). Battery manufacturing method.   The method for forming the porous structure is characterized in that the silicon substrate is etched by any one of a wet chemical etching method, a dry chemical etching method, an electrochemical etching method, and a mechanical etching method. Or the manufacturing method of the solar cell of 16. When using the wet chemical etching method and the electrochemical etching method, the reactant with the silicon substrate is selected from the group consisting of hydrofluoric acid (HF), nitric acid (HNO ₃ ), and acetic acid (CH ₃ COOH). The method for producing a solar cell according to claim 23, wherein the acid is one or more acids. When using the wet chemical etching method and the electrochemical etching method, the reactant with the silicon substrate is selected from the group consisting of hydrofluoric acid (HF), nitric acid (HNO ₃ ), and acetic acid (CH ₃ COOH). One or more acids,
Acetonitrile, dimethylformamide, formamide, diethyl sulfoxide, hexamethylphosphoric triamide, water, dimethylacetamide, water 24. The solar cell according to claim 23, wherein the solar cell is a mixed solution with at least one substance selected from the group consisting of methyl alcohol, ethyl alcohol, and isopropyl alcohol. Manufacturing method.   When any one method selected from the wet chemical etching method, the dry chemical etching method, and the electrochemical etching method is used, silicon oxide generated on the surface on which the porous structure is formed is removed. 24. The method of manufacturing a solar cell according to claim 23, wherein the reaction is maintained as much as possible as a final reaction.   The method further includes forming a passivation layer or an antireflection film for passivating the silicon substrate on the surface of the porous structure in the semiconductor layer of the second impurity region after each of the process steps. The method for producing a solar cell according to claim 15 or 16. The method of forming the passivation layer includes:
Thermal wet oxidation reaction method on the surface of the silicon substrate on which the porous structure is formed, thermal dry oxidation reaction method on the surface of the silicon substrate on which the porous structure is formed, and silicon on which the porous structure is formed 28. The method according to claim 27, wherein the method is any one selected from plasma enhanced chemical vapor deposition (PECVD) for depositing a silicon-based amorphous compound on a substrate. The manufacturing method of the solar cell of description.