EP2181464A2

EP2181464A2 - Solar cell having porous structure and method for fabrication thereof

Info

Publication number: EP2181464A2
Application number: EP08793370A
Authority: EP
Inventors: Il-Hyoung Jung; Ju-Hwan Yun; Jong-Hwan Kim; Jin-Ah Kim; Sun-Hee Kim; Ji-Hoon Ko; Young-Hyun Lee; Bum-Sung Kim
Original assignee: LG Electronics Inc
Current assignee: LG Electronics Inc
Priority date: 2007-08-21
Filing date: 2008-08-20
Publication date: 2010-05-05
Also published as: JP2010527163A; WO2009025502A3; WO2009025502A2; EP2181464A4

Abstract

A solar cell comprises a silicon substrate having a first impurity region, and a semiconductor layer having a second impurity region, which has a porous structure consisting of a plurality of holes and is doped with a second impurity different from a first impurity used to form the first impurity region. Especially, the solar cell also includes another semiconductor layer doped with another first impurity having a high concentration, which is interposed between the silicon substrate having the first impurity region and the semiconductor layer having the second impurity region, as well as a passivation layer or an anti-reflective layer formed on an upper surface of the porous structure so as to passivate the silicon substrate.

Description

SOLAR CELL HAVING POROUS STRUCTURE AND METHOD

FOR FABRICATION THEREOF

Technical Field

[1] The present invention relates to development of a bulk type solar cell device using a porous silicon substrate in a solar cell proposed as a clean energy resource for future generations, technologies for control of a solar cell substrate in view of construction and/or crystalline features and, in particular; a solar cell having a porous structure with uniformly low reflectivity in various wavelengths of solar light, thereby improving quality of a device in the solar cell and enhancing photoelectric conversion efficiency of the solar cell, as well as a method for fabrication of the same. More particularly, the present invention relates to a high efficiency solar cell, comprising semiconductor layers laminated by different forms of lamination and fabricated with different doping concentrations so as to adjust Fermi energy levels of separate semiconductor layers, leading to high charge accumulation between the semiconductor layers. The present invention also relates to a bulk type silicon solar cell that comprises a silicon wafer having a porous structure and a passivation layer provided on the wafer to induce surface passivation of the wafer, thereby considerably reducing surface defects while improving efficiency of the solar cell and, in addition, a method for fabrication of the same. Background Art

[2] A solar cell as one of photo diodes is usually used to directly convert solar light into electric energy. Therefore, the solar cell which is increasingly used for space development as well as on the ground as an alternative energy source, is very important as an electronic device for electric power supply. The solar cell has a structure of a PN junction, short key barrier and/or hetero-junction of semiconductor, etc. and the solar cell is made of a variety of materials including, for example, crystalline materials such as silicon gallium arsenide, other semiconductors or the like.

[3] There is recently a great deal of interest in development and practical applications of solar cells using polycrystalline silicon or amorphous silicon.

[4] However, a bulk type solar cell based on a single-crystalline silicon wafer which has high photoelectric conversion efficiency and excellent quality, is now used for a wide range of applications.

[5] In general, a silicon crystalline solar cell is manufactured using a silicon wafer as a starting material. The silicon wafer is fabricated by heating high purity silicon at high temperature to grow silicon crystals and prepare an ingot comprising the crystalline silicon, and cutting and polishing the ingot to produce a wafer in a form of large crystalline plate.

[6] The crystal means a material with a regular alignment of atoms.

[7] The most important method among conventional wafer treatment processes in the manufacture of solar cells is a process for "texturing" a surface of the wafer, that is, a configuration of the wafer surface. The texturing method is used to decrease reflection of external light on a front part of the solar cell and extend a length of light path in the solar cell, thereby increasing light absorption into the solar cell and improving light absorption efficiency of the solar cell.

[8] According to conventional methods, a polished wafer surface reflects 30 to 50% of incident solar light. But, a wafer surface treated in a pyramid form by the texturing method reflects 10 to 20% of the incident solar light, thus exhibiting a greatly reduced reflectivity. Aάϊtionally, it is known that the reflectivity may be lowered to 5 to 10% if the textured surface has an anti-reflective (AR) layer deposited thereon.

[9] However, the reflectivity is an average of values observed at 500nm to l,000nm which is a main wavelength range of solar light absorption. In lower wavelength range of 300nm to 400nm, the textured wafer surface shows a relatively high reflectivity. Briefly, the surface does not have a relatively low reflectivity unless it has an AR layer deposited thereon.

[10] For this reason, development of a novel method for treating a surface of a wafer or substrate so as to have uniformly low reflectivity in the entire wavelength range of solar light is still needed.

[11] The most important process for treatment of a wafer in the manufacture of silicon solar cell is to form a PN junction by introducing an N type material to a P type silicon wafer. The PN junction is considered very important since light induced electromotive force is generated around the PN junction. The PN junction is usually formed by a thermal diffusion method or an ion implantation process.

[12] It is well known that a PN junction device is fabricated by the ion implantation process to implant an N type material on a P type silicon wafer, or otherwise, a P type material on an N type silicon wafer. However, there has been very little attempt to develop an improved solar cell device using a porous silicon wafer and/or a method for fabrication of a high efficiency solar cell with an improved structure, by which excellent repetition and reproducibility are expected. Disclosure of Invention Technical Problem

[13] Accordingly, the present invention is directed to solve problems of conventional arts as described above and, an object of the present invention is to provide a high efficiency bulk type solar cell having a porous surface structure with substantially low reflectivity in a variety of solar light wavelengths.

[14] Also, another object of the present invention is to provide a high efficiency solar cell with minimum surface defects, which comprises a passivation layer made of stable materials laminated on a surface of a silicon substrate.

[15] A still further object of the present invention is to provide a method for fabrication of a solar cell using an optimal impurity implantation process, that can enable mass production of the solar cell with high quality and efficiency while sufficiently utilizing any conventional process for manufacturing a solar cell to decrease production cost thereof, thereby having an economical advantage. Technical Solution

[16] In order to achieve the purposes disclosed above, the present invention provides a solar cell comprising a silicon substrate having a first impurity region and a semiconductor layer having a second impurity region distinguished from the first impurity region, which is laminated on the silicon substrate; wherein the semiconductor layer having the second impurity region has a porous structure consisting of a plurality of holes formed on a surface thereof.

[17] The silicon substrate having the first impurity region stated herein means an extrinsic semiconductor substrate doped with a particular impurity as a starting substrate. Depending on kinds of the impuritys, the starting substrate may be a P type or N type semiconductor substrate.

[18] Likewise, a second impurity region stated herein means a semiconductor layer doped with another impurity which is different from the first impurity doped on the extrinsic semiconductor substrate and which is capable of forming the above semiconductor layer different from the semiconductor layer having the first impurity region. If the starting substrate, that is, the extrinsic semiconductor substrate having the first impurity region is a P type semiconductor substrate, the second impurity region may be an N type semiconductor layer that is doped with an N type impurity comprising at least one selected from Group 15 elements in the periodic table and is formed on a surface of the P type semiconductor substrate. Reversely, when the substrate having the first impurity region is an N type semiconductor substrate as the starting substrate, the second impurity region may be a P type semiconductor layer that is doped with a P type impurity comprising at least one selected from Group 13 elements in the periodic table and is formed on a surface of the N type semiconductor substrate.

[19] In the present invention, the first impurity may be a P type semiconductor impurity while the second impurity is an N type semiconductor impurity and vice versa. The silicon substrate may comprise single crystalline silicon or polycrystalline silicon but is not particularly limited thereto.

[20] The semiconductor layer having the second impurity region has a porous structure formed on the entire surface of the semiconductor layer except a given portion on which an upper electrode is positioned.

[21] The solar cell may further include a lower electrode made of at least one selected from conductive metals under the silicon substrate having the first impurity region. The lower electrode may be formed of at least one selected from the conductive metals and, preferably, Al, Ag, Pt, etc.

[22] The solar cell may further include a semiconductor layer having another first impurity region between the silicon substrate having the first impurity region and the semiconductor layer having the second impurity region, which has higher concentration and porosity than those of the first impurity region of the silicon substrate.

[23] The above first impurity region of the semiconductor layer having the first impurity region may have a thickness ranging from lOOnm to 600nm without a particular restriction thereof.

[24] Each hole of the porous structure in the semiconductor layer may have a depth smaller, equal to or larger than the thickness of the semiconductor layer having the second impurity region. All of the holes may have uniformity or not.

[25] The hole may have a cross-section in a form of any one selected from a U shape, V shape and polygonal shapes. The cross-section of the hole may have different forms. The hole may have a surface in a form of any one selected from tetragonal, polygonal or circular forms and similar forms or a combination thereof. A residual part formed between the holes may be in a needle form.

[26] The shape of the hole may be characterized in that a face induing a base point of the hole is inclined at an angle of more than 0°to less than 135°to a lateral side of the hole.

[27] The depth and width of the hole are not particularly limited but may range from

IOnm to 10/M, respectively. [28] The porous structure in the semiconductor layer having the second impurity region may have surface porosity ranging from 10 to 70%.

[29] The surface of the semiconductor layer having the second impurity region may include at least one selected from crystalline faces (220), (311), (320) (331) (400) (411) (422) (511) (531) and (533) which are observed by crystalline analysis using a X-ray diffraction (XRD).

[30] The solar cell of the present invention may further include a passivation layer to passivate the silicon substrate or an anti-reflective layer on a surface of the porous structure in the semiconductor layer having the second impurity region.

[31] The passivation layer may be formed of silicon oxide or a silicon amorphous compound, but it is not particularly limited thereto.

[32] Constitutional ingredients of the passivation layer may have a refractive index between those of air and the silicon substrate and, preferably, ranging from 1.7 to 2.2.

[33] One exemplary embodiment of the method for fabrication of a solar cell according to the present invention, comprises the steps of: doping an upper surface of a silicon substrate having a first impurity region with a second impurity different from a first impurity contained in the first impurity region to form a semiconductor layer having a second impurity region; and forming a porous structure consisting of a plurality of holes on a surface of the formed semiconductor layer having the second impurity region.

[34] Another exemplary embodiment of the method for fabrication of a solar cell according to the present invention, comprises the steps of: doping an upper surface of a silicon substrate having a first impurity region with a second impurity different from a first impurity contained in the first impurity region so as to form a semiconductor layer having a second impurity region; forming another semiconductor layer having another first impurity region, which contains another first impurity having higher concentration than that of the first impurity doped on the silicon substrate having the first impurity region, between the silicon substrate having the first impurity region and any one selected from horizontal sides in contact with the semiconductor layer having the second impurity region; removing a part of the formed semiconductor layer having the second impurity region, which was formed at a lateral side of the solar cell; removing a part of the semiconductor layer having the second impurity region, which was in contact with the silicon substrate having the first impurity region to form an electrode; and forming a porous structure consisting of a plurality of holes formed on the entire surface of the remaining part of the semiconductor layer having the second impurity [35] The formation of the semiconductor layer having the first impurity region may be carried out by forming a porous silicon layer.

[36] The removal of the semiconductor layer formed at the lateral side of the solar cell may be conducted by edge isolation.

[37] The formation of the porous structure on the surface of the semiconductor layer having the second impurity region is formed by preparing an upper electrode on a given portion of an upper surface of the semiconductor layer having the second impurity region, then, forming a porous structure on the entire portion of the upper surface of the semiconductor layer having the second impurity region except the given portion on which the upper electrode is positioned.

[38] The second impurity doping step may be performed by at least one selected from ion implantation, thermal diffusion and phosphooxychloride POCl ₃ diffusion.

[39] Particularly, the second impurity doping step may be performed by placing the silicon substrate having the first impurity region in a furnace at 800 to 900⁰C then injecting a gas containing the second impurity thereinto.

[40] The first impurity may be P type while the second impurity is N type, and the gas containing the second impurity may include POCl₃.

[41] In the fabrication method of the present invention, the porous structure may be formed by etching the silicon substrate using any one selected from wet chemical etching, dry chemical etching, electrochemical etching and mechanical etching processes.

[42] The wet etching and the electrochemical etching processes may be performed by using at least one of acids selected from a group consisting of fluoric acid HF, nitric acid HNO ₃ and acetic acid CH₃COOH as a material reacting with the silicon substrate.

[43] Particularly, the wet etching and the electrochemical etching processes may be performed by using a combination of: at least one of acids selected from a group consisting of fluoric acid HF, nitric acid HNO ₃ and acetic acid CH₃COOH; and at least one compound selected from acetonitrile, dimethyl formamide, formamide, diethyl sulfoxide, hexamethyl phosphoric triamide, dimethyl acetamide, water, methyl alcohol, ethyl alcohol and isopropyl alcohol, as a material reacting with the silicon substrate.

[44] In the fabrication method of the present invention, any one selected from the wet etching, the dry etching and the electrochemical etching processes may be maintained to allow a reaction of removing the silicon oxide formed on the surface having the porous structure to be a final reaction.

[45] According to the present invention, the fabrication method of the solar cell may further comprise a step of forming a passivation layer or an anti-reflective layer to passivate the silicon substrate on the surface of the semiconductor having the second impurity region with the porous structure, after each of the steps.

[46] The passivation layer may be formed by any one selected from: a thermal wet oxidation of the surface of the silicon substrate having the porous structure; a thermal dry oxidation of the surface of the silicon substrate having the porous structure; and a plasma chemical vapor deposition to deposit a silicon amorphous compound on an upper surface of the silicon substrate having the porous structure.

Advantageous Effects

[47] According to the present invention, there is provided a bulk type solar cell having a porous structure on a silicon wafer, which has various forms of holes in view of crystalline features and/or construction, so as to exhibit uniformly decreased reflectivity in a wide range of solar light wavelengths.

[48] Because of the porous surface structure described above, the semiconductor substrate has a considerably larger surface area than that of a conventional semiconductor substrate, and the solar cell can be fabricated by reduced processes for optimal impurity implantation, thereby improving the efficiency of solar cell. Moreover, the passivation layer formed on the porous silicon wafer can greatly reduce surface defects and improve the efficiency of the solar cell.

[49] The method of the present invention may be applied to fabricate a solar cell while utilizing any conventional method so as to greatly reduce production costs, which in turn, ensures competitiveness in rapidly extended solar cell markets. Briefly, by maximally applying the conventional method for fabrication of a solar cell, an improved solar cell having a desired energy level structure capable of accumulating electrons can be resulted, thereby enhancing a photoelectric conversion efficiency of the solar cell and providing an economic advantage in production. Brief Description of the Drawings

[50] These and other objects, features, aspects, and advantages of the present invention will be more fully described in the following detailed description of preferred embodiments and examples, taken in conjunction with the accompanying drawings. In the drawings:

[51] Figs. 1 to 6 are cross-sectional views illustrating a structure of a solar cell according to one exemplary embedment of the present invention;

[52] Fig. 7 is a cross-sectional photograph showing a surface of the solar cell according to one exemplary embodiment of the present invention observed by electron microscope;

[53] Figs. 8 to 10 are top photographs showing surfaces of solar cells according to alternative exemplary embodiments of the present invention observed by electron microscope;

[54] Fig. 11 is schematic cross-sectional views illustrating various forms of cross-sections of a hole in a porous structure of the solar cell according to one exemplary embodiment of the present invention;

[55] Figs. 12 and 13 are cross-sectional photographs showing a surface of a substrate of the solar cell according to one exemplary embodiment of the present invention observed by electron microscope;

[56] Fig. 14 is graphs illustrating the reflectivity of a solar cell which was treated by a variety of surface treatment methods with respect to wavelength of solar light;

[57] Figs. 15 to 17 are cross-sectional views illustrating a method for fabrication of a solar cell according to one exemplary embodiment of the present invention;

[58] Figs. 18 to 23 are cross-sectional views illustrating a method for fabrication of a solar cell according to another exemplary embodiment of the present invention;

[59] Figs. 24 to 28 are cross-sectional views illustrating a method for fabrication of a solar cell according to a still further exemplary embodiment of the present invention; and

[60] Fig. 29 is a graph illustrating energy levels in a conduction band-valence electron band region with respect to structure of a solar cell. Best Mode for Carrying Out the Invention

[61] A variety of exemplary embodiments of the present invention will be described in detail by the following examples with reference to the accompanying drawings.

[62] The same reference numerals substantially refer to the same or like elements throughout the drawings constructional elements and, a detailed description of conventional constructions and/or functions is omitted hereinafter as they may make the subject matter of the invention rather unclear.

[63] Figs. 1 to 6 show a structure of a solar cell according to one exemplary embodiment of the present invention. Referring to Figs. 1 to 6, there is provided a solar cell comprising a silicon substrate 100 doped with a P type semiconductor impurity (often referred to as "P type (silicon) substrate") and a semiconductor layer 120 containing an N type impurity. In particular, a silicon solar cell shown in Figs. 1 to 3 includes a semiconductor layer 120 having an N type impurity region (often referred to as "N type semiconductor layer"), in which a porous structure consists of a plurality of holes having different forms. According to the exemplary embodiment of the present invention, the hole may have a depth smaller than (Fig. 1), equal to (Fig. 2) and/or larger than (Fig. 3) a thickness of the N type semiconductor layer such that the porous structure may extend to an upper surface of the P type silicon substrate. The porous structure may have a thickness ranging from 0.5 to 50% of the overall thickness of the P type silicon substrate 100, but the present invention is not particularly restricted thereto. A cross-section of each hole may be formed in a variety of shapes and/or may have a configuration of overlapped layers in duplicate or triplicate or more.

[64] The porous structure in the N type semiconductor layer 120 may have a porosity ranging from 10 to 70%. Porosity stated herein is determined by first measuring a weight A of a polished semiconductor wafer for solar cells, forming holes on the wafer so as to have a porous structure as disclosed in the text, measuring a weight B of the treated wafer, estimating a difference (A-B) between the original weight A and the reduced weight B due to the porous structure, and representing the result as the percentage of the weight A. The hole in the porous structure does not have restricted dimensions but may have a diagonal length or a diameter size ranging from IOnm to 10/fln.

[65] Likewise, the hole preferably has a depth ranging from IOnm to 10/M.

[66] The wafer, that is, the silicon substrate 100 having the porous structure disclosed above has a uniformly low reflectivity ranging from 1 to 5% in the overall range of solar light wavelength and exhibits improved efficiency of the solar cell. However, the porous structure often increases a surface area in contact with external atmosphere due to original properties of the structure, leading to an increased ratio of surface defects relative to overall defects.

[67] Accordingly, in order to improve the efficiency of a solar cell, the surface defects must be decreased as much as possible and, as shown in Fig. 5, the porous semiconductor wafer of the present invention with a passivation layer 180 can achieve this purpose. A detailed description will be given of the passivation layer 180 with reference to the drawings.

[68] Fig. 4 shows a solar cell fabricated according to another exemplary embodiment of the present invention. Referring to Fig. 4, an N type semiconductor layer of the solar cell includes an upper electrode 140 formed on a given portion of an upper surface of the semiconductor layer and, in acϋtion, a porous structure formed over the remaining portion of the semiconductor layer except the given portion on which the upper electrode is positioned.

[69] Fig. 5 also shows a solar cell fabricated according to a still further exemplary embodiment of the present invention. Referring to Fig. 5, the solar cell has a P type silicon substrate 100, an N type semiconductor layer 120 and a P+ type semiconductor layer 160 interposed between the substrate 100 and the semiconductor layer 120, which is doped with a high concentration P type impurity. The concentration of the P type impurity doped on the P+ type semiconductor layer 160 must be higher than that of the P type impurity doped on the P type silicon substrate 100. The "high" concentration may be defined by 10 to 100 times the concentration of the P type impurity doped on the P type silicon substrate 100, but the present invention is not particularly restricted thereto. The concentration of the P type impurity doped on the P+ type semiconductor layer (referred to "P+ type semiconductor layer doping concentration") may preferably range from 10¹⁷cm ³ to 10¹⁹cm ³.

[70] Furthermore, an N+ type impurity doped on an N+ type impurity semiconductor layer having another N type impurity region, which may be formed on an upper surface of the P+ semiconductor layer, may also have a "high" concentration (referred to as "N+ type semiconductor layer doping concentration") comparable to the P+ type semiconductor layer doping concentration.

[71] The silicon solar cell shown in Fig. 5 may further include a passivation layer 180 on a surface of the porous structure formed on an upper surface of the N type semiconductor layer, so as to passivate the P type silicon substrate. Instead of the passivation layer, an anti-reflective layer may be provided.

[72] More particularly, the passivation layer 180 composed of a stable material is laminated on the porous structure in order to protect and passivate the silicon wafer 100 and a surface of the N type semiconductor layer 120, thereby reducing surface defects and improving the efficiency of the solar cell. For this purpose, the passivation layer 180 is preferably composed of any stable material unable to chemically react with the atmosphere. Examples of the stable material may include silicon oxides SiO _x but are not particularly limited thereto. Also, the passivation layer 180 may serve as an AR layer to prevent reflection of incident solar light. More particularly, the solar light incident on a solar cell through the atmosphere is duly absorbed by the silicon wafer 100 via the passivation layer 180 and converted into electric energy. If the passivation layer 180 has a refractive index between those of air and the silicon wafer 100, the incident solar light exhibits minimum reflection effects and most of the solar light passes through the passivation layer 180 and is absorbed by the silicon wafer 100. [73] Therefore, the passivation layer is preferably composed of any particular material having a certain refractive index in a range of 1.0 (refractive index of air) and 3.8 (refractive index of silicon). For example, using a silicon oxide SiO_x having a refractive index in a range of 1.7 to 2.2 to form the passivation layer results in minimum reflection effects of the incident solar light and an improvement in efficiency of the solar cell.

[74] Fig. 6 shows a solar cell fabricated according to another exemplary embodiment of the present invention. Referring to Fig. 6, the solar cell comprises a P type silicon substrate 100, a high concentration doped P+ type semiconductor layer 160 which is doped with a P type impurity, a high concentration doped N type semiconductor layer 120 which is doped with an N type impurity, and a passivation layer 180 formed over the entire portion of the upper surface of the N type semiconductor layer 120 except a given portion on which an upper electrode 140 is positioned. According to the present invention, the P+ type semiconductor layer 160 may be a porous silicon layer while the P type silicon substrate 100 may be fabricated using a polycrystalline silicon wafer, each of which is not particularly limited thereto but may include any conventional substrates for a variety of solar cells. The solar cell of the present invention may further comprise a lower electrode on a bottom portion of the P type silicon substrate 100 and the lower electrode may contain conductive materials, especially, conductive metal elements such as Al, Ag, Pt or the like which may be selected from metal element groups of the periodic table.

[75] Fig. 7 is a cross-sectional view showing a surface of the solar cell according to one exemplary embodiment of the present invention observed by electron microscope. Referring to Fig. 7, it can be seen that the solar cell has a porous structure that comprises a plurality of holes perforated through a surface of a wafer to a certain depth, compared to a conventional solar substrate surface-treated by a texturing process. Such a porous structure extending from a surface of the wafer to the certain depth may have a depth in a range of 0.5 to 50% of the overall thickness of the wafer, however, the present invention is not particularly restricted thereto.

[76] As shown in Fig. 7, the holes in the porous structure may have cross-sections in different shapes and/or in a configuration of overlapped layers in duplicate or triplicate or more. The holes have a smooth or rough inner surface with various forms. In this exemplary embodiment, a layer having the porous structure on the surface of the wafer may have a porosity in a range of 10 to 70%. The solar cell wafer having the porous structure according to the exemplary embodiment as shown in Fig. 7 may have a porosity of about 50%.

[77] Physical quantities such as porosity are substantially unable to be calculated for conventional solar cell substrates textured in a pyramid form by a texturing process. This is because a surface of the textured substrate generally shows a pyramid form of cross- section and each face of the pyramid is smooth and has no holes or pores. It is well known that the texturing process increases the effective area of a wafer, thus, induces high collecting efficiency of solar light by the wafer. On the other hand, the porous structure of the present invention which includes a number of holes on a surface of the wafer, can remarkably increase the effective area of the wafer and cause the incident solar light to be internally reflected at least twice, thereby preventing light leakage and improving the efficiency of the solar cell. A detailed description will be given of principles of the porous structure according to the present invention.

[78] Figs. 8 to 10 are top views showing surfaces of solar cells according to alternative exemplary embodiments of the present invention. As shown in these drawings, the porous structure may have a variety of forms in view of top side but not be particularly limited thereto. In view of morphology, the shape of the porous structure may be generally classified into polygonal, circular and amorphous forms. Fig. 8 shows polygonal forms including a square form of the porous structure, which have right angled interior angles. Fig. 9 shows circular and similar forms while Fig. 10 shows other polygonal forms without right-angled interior angles, which are between the right-angled polygonal forms and the circular forms.

[79] However, the shape of the porous structure according to the present invention is difficult to be defined by those shown in Figs. 8 to 10 and/or is difficult to have specifically fixed forms. Thus, it is considered that the holes may have not only clearly defined forms but also similar forms thereof. The holes shown in Figs. 8 to 10 may have desired dimensions such as a diagonal length or a diameter size ranging from IOnm to 10/M, but are not particularly restricted thereto.

[80] The dimensions of the holes may be defined by controlling process parameters through wet chemical reaction, dry chemical reaction, electrochemical reaction and/or mechanical processing. The process parameters may include reaction temperature, kinds of gaseous atmospheres, gas pressure, gas flow rate, reacting materials, reaction time and the like.

[81] A variety of holes in a porous structure of a wafer according to the exemplary embodiment of the present invention will be described in more detail with reference to Fig. 11. Fig. 11 is schematic cross-sectional views illustrating various shapes of cross- sections of a hole in a porous structure of the solar cell according to one exemplary embodiment of the present invention. Referring to Fig. 11, the solar cell has a variety of cross-sections such that an angle at which a lower part of the hole is in contact with the wafer, in other words, at which a face having a base point of the hole is in contact with a lateral side of the hole, is more than 0°and less than 135°.

[82] For example, the hole in the form (a) has an angle of 80°to 90°and a polygonal column or cylindrical form of which an opening size is substantially identical to a size of the inner portion. The hole in the form (b) has an angle of less than 60° and a pencil core like form of which the angle rapidly increases to 80°to 90°toward the opening of the hole. The hole in the form (c) has an angle of not more than 60°and a test tube like form of which the angle gradually increases to 80°to 90°toward the opening of the hole. The hole in the form (d) has an angle of 80°to 90°and a water glass like form of which the angle gradually decreases toward an opening of the hole, thereby increasing the opening size. The hole in the form (e) has an angle of 90°to 135°and a water bottle like form of which the angle gradually increases toward the opening of the hole, thereby decreasing the opening size. Lastly, the hole in the form (f) has an angle of less than 60°and a diamond form of which the angle rapidly increases in a range of more than 90°to less than 135°from the middle part to the opening of the hole.

[83] A width of the hole is defined by the largest width of exemplary holes and is identified based on a similar concept to the size of the hole.

[84] Therefore, the hole may have the width in a range of IOnm to 10/M. A depth of the hole is not particularly restricted but may range from IOnm to 10/M. The hole may further have a configuration of overlapped layers in duplicate or triplicate or more.

[85] A number of holes in the porous structure on the surface of the wafer may have fixed forms, amorphous forms or a combination thereof and/or be regularly arranged in a single form over the surface of the wafer. For each hole, a shape of inner wall or outer wall may depend on a size of the hole and a space between adjacent holes, which is determined by controlling the process parameters described above.

[86] Figs. 12 and 13 are cross-sectional photographs showing a surface of a substrate of the solar cell, which was illustrated in Fig. 11 according to the exemplary embodiment of the present invention, practically observed using an electron microscope. Fig. 12 shows holes in the form of a test tube corresponding to (c) in Fig. 11. Fig. 13 shows holes in the form of pencil core or diamond corresponding to (b) or (f) in Fig. 11.

[87] Referring to Figs. 12 and 13, although it can be seen that the holes are regularly formed in a single shape such as the test tube or the pencil core (or diamond) form, the present invention is not particularly restricted thereto. Therefore, a porous structure consisting of various holes having different cross-sectional forms may be obtained.

[88] With regard to a surface structure of a silicon wafer induing the holes described above, if a face having a base point is inclined at an angle of 45°to a lateral side of the hole, the incident light follows a path reflecting the light twice. Similarly, if the angle is 60°, the incident light follows a path reflecting the light three times. As a result, a porous structure consisting of these holes causes the incident light to be reflected at least twice, thereby once the light has been entered in the porous structure, making it unlikely the incident light is emitted outside. The technical concept of the present invention is a solar cell with a specific porous structure induing a plurality of holes, which increases a path length of solar light passing through a surface of a wafer to induce an increase in an amount of the light reaching a silicon structure of the solar cell, resulting in an improvement in efficiency of the solar cell.

[89] The technical features of the present invention may include a single crystalline or polycrystalline silicon wafer in a bulk type solar cell. In particular, when the solar cell has a porous structure consisting of holes on a single crystalline silicon wafer, it can be observed by crystal analysis via X-ray diffraction (XRD) that the solar cell has an additional crystalline face other than characteristics and related information (hereinafter, abbrev. characteristics) for the crystalline faces 100, 400 and 111, although the solar cell comprises the single crystalline silicon wafer. For a conventional single crystalline silicon wafer, the wafer is often used as a base substrate to be textured in a pyramid form and has typical crystalline faces 100 and 111. The crystalline face 100 may also be considered as the crystalline face 400. That is, these two faces are generally recognized to have the same crystalline face characteristics. For a solar cell with a silicon wafer having the crystalline face 100, the face 111 is exposed from a surface due to the pyramid texturing. Obtaining the results of the crystalline analysis using XRD patterns involves analyzing the faces 100 to 400 having the crystalline characteristics of the base substrate.

[90] However, a bulk type solar cell with a semiconductor wafer having a porous structure fabricated according to another exemplary embodiment of the present invention, has characteristics of crystalline faces 200, 311, 400, 331, 422, 511, 531, 320 and 533 since high angled portions of the surface have an influence on the characteristics owing to the porous structure, whereas a conventional solar cell with a single crystalline wafer does not have the characteristics described above. That is, in view of crystalline features, the solar cell with the porous structure according to the present invention has the characteristics of crystalline faces 220, 311, 400, 331, 422, 511, 531, 320 and 533, which is not found in conventional solar cells having single crystalline silicon wafers. For each solar cell, holes may have different forms, thus having the characteristics of the above multiple crystalline faces. Silicon (Si) related crystalline face characteristics may be based on data obtained from JCPDS cards.

[91] According to the exemplary embodiment of the present invention, the solar cell having the porous structure on a surface thereof exhibits excellent anti-reflection effects without an AR layer typically used in a conventional solar cell. However, the solar cell of the present invention may further include an AR layer over a wafer surface with the porous structure.

[92] In this case, the solar cell is expected to have considerably reduced reflectivity of incident solar light. A polished wafer surface reflects an average of 30 to 50% of the solar light at 300 to 1 lOOnm while a wafer surface treated by a pyramid texturing process, which is applied to the conventional solar cell, reflects an average of 10 to 20% of the solar light.

[93] Therefore, there is a continuous effort to significantly reduce the reflectivity of the solar cell using an AR layer. However, the present invention has an advantage of considerably reducing the reflectivity of the wafer surface even without application of a texturing process or deposition of an anti-reflective layer.

[94] Fig. 14 is graphs illustrating each reflectivity of a solar cell which was treated by a variety of surface treatment methods with respect to wavelength of solar light.

[95] Referring to Fig. 14, it is found that an initially polished wafer (a) shows a high reflectivity of 30 to 70% at a specific range of solar light wavelengths of 300nm to 1 lOOnm, however, after applying a conventionally known texturing process, the wafer (b) has sharply reduced reflectivity in the range of 10 to 30%.

[96] Conversely, a solar cell (c) with an AR layer generally used in the conventional solar cell shows more greatly reduced reflectivity of less than 10%, compared to the above examples. However, the solar cell (c) also has relatively high reflectivity of at least 15% at low solar light wavelength ranges of 300nm to 400nm. Consequently, it is understood that the solar cell (c) does not exhibit uniformly reduced reflectivity at all ranges of the solar light wavelengths.

[97] Compared to these solar cells, a solar cell having a porous structure on a wafer surface thereof (d) according to the present invention has low reflectivity of 1 to 5% at all ranges of the solar light wavelengths even without application of an AR layer.

[98] The present invention is not restricted to the solar cell without the AR layer requiring an alternative application process and may include a solar cell with minimum reflectivity, comprising an AR layer as well as a porous structure to reduce the reflectivity. Since a process for application of the AR layer using a vacuum deposition device may be omitted or reduced, the present invention has an economic advantage in production processes, leading to a great reduction of production costs and ensuring competitiveness in production of solar cells.

[99] For a method for fabrication of a solar cell according to one exemplary embodiment of the present invention, the solar cell has a wafer surface having a porous structure formed by any of wet chemical reaction, dry chemical reaction, wet electrochemical reaction and/or mechanical processing. In the wet chemical reaction and the wet electrochemical reaction, an acid such as fluoric acid HF, nitric acid HNO ₃, acetic acid CH 3C00H, etc., is used as a major material reacting with a silicon wafer. The reacting material may also include a combination of two or more of acids. Especially, a wet solution for a final chemical reaction is prepared by diluting the acid alone or as the combination thereof in any one solvent selected from acetonitrile, dimethyl formamide, formamide, diethyl sulfoxide, hexamethyl phosphoric triamide, dimethyl acetamide, water, methyl alcohol, ethyl alcohol and isopropyl alcohol alone or a combination or two to four thereof.

[100] A porous solar cell according to another exemplary embodiment of the present invention is applied to a typical solar cell having a PN junction provided by forming an emitter through diffusion. This solar cell has the PN junction formed by depositing a hydrogenated amorphous silicon material on a wafer, wherein the amorphous silicon material has an opposite polar property to a wafer of a conventional hetero-junction solar cell fabricated by a thin film deposition. A process for forming a porous structure in the solar cell according to the present invention can be added to any one of steps in a conventional method for fabrication of the hetero-junction solar cell and is not particularly limited in order or procedure for application thereof.

[101] Each group of Figs. 15 to 17, Figs. 18 to 23, and Figs. 24 to 28 is cross-sectional views illustrating a method for fabrication of a solar cell according to each of three exemplary embodiments of the present invention, respectively. All steps in the solar cell fabrication process may continuously or intermittently proceed. That is, individual steps of the fabrication process may be sequentially continued or separately or independently performed, and, another step may be further added to any of the separate steps.

[102] Figs. 15 to 17 are cross-sectional views illustrating a method for fabrication of a solar cell according to one exemplary embedment of the present invention. First, a P type silicon substrate 100 is prepared. An upper surface of the substrate 100 is doped with a high concentration N type impurity to form a semiconductor layer 120 having an N type impurity region (See Fig. 15).

[103] The high concentration N type impurity may include any one selected from Group 15 elements in the periodic table and, is preferably phosphorous P. The doping of the N type impurity may be performed by placing a P type silicon substrate in a high temperature furnace and injecting a gas containing the high concentration N type impurity, wherein a temperature of the furnace preferably ranges from 800 to 900⁰C, but the present invention is not particularly restricted thereto. The gas containing the high concentration N type impurity may be phosphooxychloride POCl ₃.

[104] A process for introduction of an impurity to form an N type impurity semiconductor layer may include ion implantation, thermal diffusion or other methods known to those skilled in the related art other than POCl₃ diffusion.

[105] The ion implantation is to implant at least one selected from Group 13 or 15 elements in the periodic table, such as boron B^ arsenic As, phosphorous P, etc., on the silicon wafer. As shown in Fig. 15, if the P type silicon substrate is a P type silicon wafer 100 as a starting substrate, the Group 15 element is implanted as the impurity source to the wafer in order to form the N type layer 120. Otherwise, if the starting substrate is an N type silicon wafer, the Group 13 element is implanted as the impurity source to the wafer in order to form an N type layer, thereby forming a PN junction structure.

[106] The implantation of impurity controls a thickness or depth of a hetero-junction layer by regulating the concentration of impurity and/or a reaction time, so as to vary characteristics of a PN junction device in a wide range.

[107] The impurity may include acceptor ions such as B^ Ga, In and the like to form a valence electron band or a P type semiconductor layer; or donor ions such as Sb, As, P, Bi and the like to form a conduction band or an N type semiconductor layer, which depends on types of semiconductors used in the starting substrate.

[108] For the ion implantation, an ion implanter such as a high current implanter having a current of at least 3mA or a medium current implanter having a current of less than 3Ma may be used.

[109] The ion implantation stated herein means introduction of an impurity and other atoms near a surface region of the semiconductor by various conventional methods. The ion implantation is used in applications requiring a relatively shallow junction, low processing temperature and/or relatively accurate control. The ion implantation is performed by generating impurity ions, accelerating the ions from low energy of 5eV to high energy of IMeV, and introducing an impurity to a semiconductor. The implanted ions enter into crystals of the semiconductor through a desired path to replace original atoms of the semiconductor. But, since the replaced ions are not stable over a matrix of the semiconductor, an aάϊtional annealing process may further be required for stabilizing the ions.

[110] As shown in Fig. 16, a next process is to form a porous structure consisting of various holes on the upper surface of the semiconductor layer 120 having the N type impurity region. The hole shown in Fig. 16 has a depth smaller than a thickness of the N type semiconductor layer 12, however, the depth may be equal to or larger than the thickness of the N type semiconductor layer, as shown in Figs. 2 and 3. The formation of the porous structure on the surface of the semiconductor layer may be performed by wet chemical reaction, dry chemical reaction, wet electrochemical reaction and/or mechanical processing, as described above.

[I l l] Following this, a further process for forming a passivation layer 180 according to the exemplary embodiment of the present invention is illustrated in Fig. 17. This process is occasionally adopted to passivate the substrate on a surface of the porous structure over the N type semiconductor layer 120.

[112] Although not shown in drawings, if an upper electrode is formed on the upper surface of the N type semiconductor layer 120, the porous structure is introduced over the entire portion of the upper surface of the semiconductor layer except a given portion on which the upper electrode is positioned, while the passivation layer 180 is formed on a surface of the porous structure.

[113] Hereinafter, a process for formation of a passivation layer 180 on an upper surface of the solar cell according to preferred exemplary embodiments of the present invention will be described in more detail by the following examples.

[114] EXAMPLE 1

[115] A passivation layer 180 was chemically formed on a porous surface structure by adopting a chemical reaction in forming the porous structure. In other words, according to the process shown in Fig. 16, the porous surface was prepared while simultaneously forming the passivation layer. The chemical reaction was substantially conducted by a reaction between a solid silicon wafer and a gas, a reaction between the solid silicon wafer and a liquid (a solution) or an electrochemical reaction comprising application of electric energy to the solid silicon wafer and the liquid to induce a reaction therebetween, so as to form the porous surface structure. [116] First, a silicon solar cell having a PN junction was fabricated (Fig. 15). A silicon wafer with the PN junction of the solar cell was dipped in a solution containing HF, followed by an electrochemical reaction with applied electric energy. In the electrochemical reaction of this example, a dominant reaction is carried out by the following chemical scheme 1 so as to form the passivation layer 180 comprising silicon oxide on the wafer, as shown in Fig. 17:

[117] ChemistryFigure 1 [Chem.l]

Si + 4OH^" + nh⁺ → Si(OH)₄ + (4 - n) e^" (Eq. 1)

Si(OH)₄ → SiO₁ + H₁O (Eq. 2)

SiO₁ + 6HF → H₂OSiF₆ + 2H₂O (Eq. 3)

[118] From the reaction by Eq. 1, a porous structure was formed on an upper surface of the solar cell. Silicon oxide SiO₂ was generated on a surface of the porous structure by Eq. 2, thereby producing a passivation layer 180.

[119] Next, SiO₂ generated by Eq. 2 was eliminated according to a reaction by Eq. 3. Continuously cycling all reactions shown by Eqs. 1, 2 and 3 in this order resulted in formation of the porous structure on the upper surface of the silicon wafer having the PN junction. The second reaction (Eq. 2) to generate SiO₂ was maintained as a final reaction by controlling all of the reactions, the solar cell having the passivation layer 180 was successfully fabricated as shown in Fig. 17.

[120] As a last process of this example, an aάϊtional step may be optionally applied to form an upper electrode on the uppermost face of the solar cell shown in Fig. 17. Formation of the upper electrode may be conducted by any known printing process.

[121] The silicon oxide, which is very stable with substantially no oxidation, is suitably used to compose the passivation layer. Such a passivation layer passivates the surface of the silicon wafer so as to considerably eliminate surface defects, thereby improving the efficiency of a solar cell.

[122] As disclosed above, the silicon oxide has a refractive index between those of air and silicon so that it minimizes reflection of incident solar light and allows a relatively great amount of the light to be absorbed into the solar cell, thereby improving the efficiency of the solar cell.

[123] Accordingly, the solar cell fabricated by the above method exhibits an improvement in efficiency of 5 to 15%, compared to a porous silicon solar cell without the passivation layer.

[124] The silicon solar cell having the passivation layer in this example may be activated by an electrochemical reaction method using electric energy and/or a chemical reaction method, however, the reaction is not particularly restricted so far as the reaction method induces the Eq. 1 reaction and maintains the Eq. 2 reaction as the final reaction. As a result, the silicon solar cell having the passivation layer is fabricated.

[125] EXAMPLE 2

[126] A porous silicon solar cell having a passivation layer was fabricated by forming the passivation layer through thermal oxidation. The thermal oxidation means an oxidation occurring at higher temperatures than room temperature. According to this example, a silicon wafer was reacted with oxygen at a higher temperature than room temperature to form a passivation layer. Such thermal oxidation may include wet oxidation which feeds oxygen ingredient in a water vapor state to derive the oxidation, and dry oxidation which feeds oxygen under a dry atmosphere.

[127] According to one exemplary embodiment of the present invention, an upper electrode was first formed on an N type semiconductor layer of a silicon solar cell having a PN junction. The upper electrode may be manufactured by any known printing process. Next, the silicon wafer having the upper electrode was dipped in a solution containing HF, followed by an electrochemical reaction with applied electric energy, or otherwise, the electrochemical reaction without electric energy.

[128] According to Example 2, the Eq. 1 reaction in the reaction scheme 1 is controlled to become a dominant reaction. Different from Example 1, in which the Eq. 2 reaction is maintained as the final reaction, Example 2 controls the Eq. 3 reaction as the final reaction. As disclosed above, the Eq. 3 reaction is conducted to remove the silicon oxide generated in the Eq. 2 reaction. For this reason, if the Eq. 3 reaction is maintained as the final reaction, a passivation layer is not generated while a silicon wafer having a porous structure, of which a surface of the silicon wafer was exposed, is obtainable as shown in Fig. 16. In this example, since the porous structure was formed after applying an upper electrode to the silicon wafer, the porous structure did not exist in a lower portion of the upper electrode.

[129] Next, the silicon wafer having the porous structure was subjected to oxidation to form a passivation layer 180, as shown in Fig. 17. More particularly, a surface of an N type semiconductor layer in the silicon solar cell was oxidized to produce the passivation layer 180 comprising silicon oxide. [130] In general, in order to generate the silicon oxide on a surface of a silicon wafer through thermal oxidation, a high temperature of above 600⁰C is required. The silicon wafer having the porous structure of the present invention has a wide specific surface area, therefore, the oxidation to produce the silicon oxide for stabilizing the surface of the silicon wafer may be accelerated. Accordingly, if compared to a general mechanism for silicon oxidation, initial oxidation is speedily conducted and, after a certain period of time sufficient to form an oxide film having a certain thickness, the oxidation depends on the general mechanism. For this reason, the high temperature required to oxidize the surface of the silicon wafer having the porous structure and form the passivation layer 180 may range from 200 to 600⁰C. Preferably, the oxidation is conducted in an oven at about 500⁰C for about 30 minutes to form the passivation layer 180.

[131] As is apparent from the above, the method for fabrication of a porous silicon wafer having a passivation layer according to Example 2 may have the passivation layer with excellent composition of constitutional ingredients at a relatively low temperature.

[132] Also, as disclosed above, the passivation layer comprising silicon oxide may function as an AR layer to improve the efficiency of the solar cell. In an experiment, it was found that a solar cell device fabricated in Example 2 exhibits an improvement in efficiency of the solar cell of about 8 to 20%, compared to an existing porous solar cell device.

[133] Moreover, the porous silicon substrate having the passivation layer according to

Example 2 may be applied to a surface of any one of porous solar cells fabricated by electrochemical reaction, chemical reaction, mechanical processing, and/or dry oxidation.

[134] EXAMPLE 3

[135] A solar cell having a passivation layer was fabricated by depositing the passivation layer 180 on a surface of an N type semiconductor layer in a silicon substrate having a porous structure.

[136] The passivation layer 180 is preferably formed by selecting a particular material for effectively eliminating surface defects from the silicon substrate and depositing the material on the surface of the N type semiconductor layer. This material may include silicon amorphous compounds and the silicon amorphous compounds preferably include any materials well known to those skilled in the related art and, more preferably, amorphous hjdrogenated silicon (a-Si:H) amorphous hydrogen nitride (a-Si_xN_y) etc. [137] Surface deposition of the passivation layer 180 may be performed using conventional thin film deposition technologies, preferably, plasma enhanced chemical vapor deposition PECVD. PECVD is a method for inducing deposition of a material by decomposing a gas mixture into ions and radicals through plasma energy. Using such a deposition, the passivation layer 180 may be deposited in a form of a multilayered structure as well as a single layered structure.

[138] The fabricated silicon solar cell was further subjected to printing of an upper electrode at the uppermost face of the solar cell, so as to complete the porous silicon solar cell having the passivation layer 180.

[139] The passivation layer 180 formed in Example 3 can minimize surface defects and serve as an AR layer, thereby improving the efficiency of a solar cell. In an experiment, it was found that a solar cell device fabricated in Example 3 exhibits an improvement in the efficiency of the solar cell of about 10 to 25%, compared to an existing porous solar cell device.

[140] Other methods for fabrication of solar cells according to other exemplary embodiments of the present invention are proposed in Figs. 18 to 28. These embodiments are characterized in that an additional P+ semiconductor layer doped with a high concentration P type impurity is interposed between a P type silicon substrate 100 and an N type semiconductor layer 120.

[141] Referring to Figs. 18 to 23, illustrating a method for fabrication of a solar cell according to one exemplary embodiment of the present invention, there is first proposed a step of forming an N type semiconductor layer 120 by doping a P type silicon substrate 100 with a high concentration N type impurity (Fig. 18). The N type impurity may be doped throughout all sides of the P type silicon substrate, that is, on front and rear sides and both lateral sides of the substrate.

[142] The N type impurity semiconductor layer preferably has a thickness ranging from 100 to 600nm, but the present invention is not particularly restricted thereto.

[143] Next, a P+ semiconductor layer 160 doped with a high concentration P type impurity was formed between the P type silicon substrate 100 and any one of horizontal sides in contact with the N type semiconductor layer 120 (Fig. 19). This is only an example of a preferred embodiment of the invention .

[144] That is, the P+ semiconductor layer 160 is not restricted to the horizontal P+ semiconductor layer but may include another P+ semiconductor layer depressed in a P type silicon substrate.

[145] The P+ semiconductor layer may be provided by forming a porous silicon layer and be formed in multiple layers. The porous silicon layer can be simply prepared within a short time by no particular apparatus and effectively function as an AR layer. In particular, the porous silicon layer is formed by dipping a P type silicon substrate in an aqueous solution comprising HF-C₂H₅OH-H₂O, applying a certain electric current to the dipped substrate such that the solution is filled into holes to conduct a positive oxidation etching process. The positive oxidation etching process may include, for example, a chemical etching using HNO₃ and an electrochemical etching with application of electric current.

[146] The formed porous silicon layer may serve as a surface protective layer as well as the AR layer, thereby maximally increasing the efficiency of a solar cell.

[147] Following this, after removing the N type semiconductor layer formed at the lateral sides (Fig. 20) the N type semiconductor layer in contact with the P type silicon substrate 100 was also eliminated, followed by production of a lower electrode 200 (Fig. 21). The removal of the N type semiconductor layer formed at the lateral sides may be conducted by edge isolation, as shown in Fig. 20. This removal process is required since the N type semiconductor layer formed at the lateral sides may cause shorting of positive and negative electrodes of the solar cell when the solar cell is later connected to a metal layer or a metal electrode, therefore, is an undesired element in operating the solar cell.

[148] On the other hand, the N type semiconductor layer formed on the horizontal side may not be removed by an alternative process since this is not significant and/or may be neglected by formation of a back surface field (BSF) containing a conductive material such as Al. The removal of the N type semiconductor layer may be conducted by any conventional method without a particular limitation thereof. Examples of preferable edge isolation processes may include plasma wet etching, plasma dry etching, laser etching, laser scribing and the like. According to types of the isolation process, the solar cell may exhibit a little variation in behavior characteristics. In consideration of mass production, more preferable are plasma dry etching and plasma wet etching processes. A plasma etching process is commonly known and means a method for separation of PN junctions by laminating a plurality of substrates in order and exposing the lamination to a solution.

[149] The lower electrode shown in Fig. 21 is preferably BSF containing Al among different metal elements. Otherwise, BSF may contain Ag, Pt and the like having excellent conductive properties. Accordingly, the solar cell comprises the P type silicon substrate where the N type semiconductor layer acting as an edge was removed, the P+ semiconductor layer and the N type semiconductor layer. In this solar cell, the BSF containing Al is substantially formed by applying a paste, which includes at least one metal element such as Al, to a front side of the P type silicon substrate depending on a shape of a rear side of the P type silicon substrate and/or a lamination form of the solar cell; and heating the coated P type silicon substrate.

[150] The heating process may be performed at 600 to 900⁰C. Al acts as an impurity source on the silicon surface to allow the rear side or front side of the P type silicon substrate to be changed into a P+ semiconductor region or a P++ semiconductor region, respectively, which are doped with the high concentration P impurity. Such regions inhibit electrons, which were released from electron-hole pairs generated in the P type substrate by light, from being bound again to the electron holes, thus improving the efficiency of the solar cell. The electrode preferably has a thickness of 10 to 30/M.

[151] After the above processes, a porous structure was formed on an upper surface of the remaining N type semiconductor layer 120 (Fig. 22) and the passivation layer 180 was formed on a surface of the porous structure. Although not shown in the drawings, the upper electrode may be formed on an upper surface of the N type semiconductor layer.

[152] The method of preparing the electrode shown in Fig. 21 may comprise coating a metal and heating the metal at a high temperature, wherein the metal may include at least one metal element and, is preferably Al, Ag, Pt and so on.

[153] The solar cell of the present invention particularly comprises a P type silicon substrate 100, a high concentration N type semiconductor layer 120 and a P+ semiconductor layer 160 made by a process for porous silicon formation, in which all are in close contact with one another and electrically connected through an electrode 200. The P+ semiconductor layer 160 does not necessarily have a laminar structure but may be provided in a plurality of depression forms to be embedded into the P type silicon wafer. To consider a relation of each of conduction bands and valence electron bands as well as Fermi energy levels with respect to semiconductor layer of the solar cell having a structure described above, it is understood that electron-hole pairs excited by light are generated from the P type silicon substrate and the excited electrons are greatly accumulated at an interface between the P type silicon substrate and the P+ semiconductor layer because the P+ semiconductor layer has a structure with another energy level.

[154] The solar cell fabricated by the method described above has a particular structure in that the P+ layer and another P+ layer in the Al containing BSF layer have different Fermi energy levels and an electron accumulation area is formed due to the difference in Fermi energy levels, thereby improving the efficiency of the solar cell. Briefly, the solar cell of the present invention has a structure in that electrons generated in the P type silicon substrate are temporarily held and accumulated by regulating a lamination structure and artificially designing a Fermi energy level, thereby greatly increasing accumulation of the electrons at the interface between the silicon wafer and the P type semiconductor layer. Therefore, the accumulated electrons are bound together so as to reduce electron loss and generate high electric power related to an amount of electrons, thus providing high photoelectric conversion efficiency.

[155] As shown in Fig. 23 which is a cross-sectional view illustrating the solar cell of the present invention, the solar cell comprises a P type silicon substrate 100, and a high concentration P+ semiconductor layer 160 and an electron layer 200 both being arranged by interposing the silicon substrate 100 therebetween. As a result, this solar cell reduces electron loss and improves photoelectric conversion efficiency.

[156] Figs. 24 to 28 are cross-sectional views illustrating a method for fabrication of a solar cell according to another exemplary embodiment similar to the exemplary embodiment in Fig. 23. However, referring to Fig. 24, the solar cell comprises an N type semiconductor layer 120 around a P type silicon substrate 100, and a P+ type semiconductor layer 160 formed between the P type silicon substrate 100 and a lower horizontal part among a certain area of the N type semiconductor layer 120 in horizontal contact with the substrate 100.

[157] Referring to Fig. 25, illustrating a middle step of the method according to the exemplary embodiment in Fig. 24, the solar cell is illustrated in a cross sectional view, which comprises an N type semiconductor layer 120, a P+ semiconductor layer 160, a P type silicon substrate 100 and an N type semiconductor layer 120 laminated in this order from the bottom side. The resulting solar cell has a specific structure in that electron-hole pairs are generated from the P type substrate and the excited electrons are isolated and accumulated in the P type substrate. That is, in order to arrange two P+ semiconductor layers by interposing the P type silicon substrate therebetween, the N type semiconductor layer formed on a top surface of the solar cell is removed and then replaced by an Al containing electron layer 200. The N type semiconductor layer 120 formed on the lowermost part (that is, bottom surface) of the solar cell has another electrode, that is, substantially identical to the upper electrode 140 described above but positioned in a reverse direction.

[158] Furthermore, referring to Fig. 27, a solar cell according to another exemplary embodiment of the present invention comprises a porous structure consisting of various holes formed on an exposed face of an N type semiconductor layer other than a given portion on which an upper electrode 140 is positioned. Another solar cell of the present invention shown in Fig. 28 has a passivation layer 180 on a surface of a porous structure.

[159] Separate steps of a method for fabrication of a solar cell according to each of exemplary embodiments of the present invention are continuously or intermittently conducted. Especially, the process of forming a PN junction and the process of forming a porous structure may be sequentially conducted or not and, occasionally, have at least one independent process therebetween.

[160] According to a further exemplary embodiment of the present invention, the solar cell fabrication method may further include a process of forming an AR layer on a top surface of the solar cell. The AR layer may be prepared using any one selected from conventional materials for forming an AR layer used in the solar cell.

[161] It is considered that the improvement in photoelectric conversion efficiency of a solar cell is based on the specific structure of the solar cell disclosed above. This is more clearly understood with reference to Fig. 29 which is a graph illustrating a Fermi energy level for each of semiconductor layers.

[162] Fig. 29 shows conduction band- valence electron band regions partitioned in compartments with respect to a structure of a solar cell.

[163] Consequently, it can be seen that electrons generated and isolated from the P type silicon substrate 100 migrate to the N type semiconductor layer 120 until they are blocked by the P+ type semiconductor layer, and then, are isolated and accumulated at an interface between the P type silicon substrate and the P+ semiconductor layer.

[164] As is apparent from the above, the above particular embodiments have been given to illustrate the purposes and technical constructions of the present invention but do not limit the scope of the present invention. It will be understood by those skilled in the art that various modifications and variations may be made therein without departing from the scope of the present invention as defined by the appended claims. Each raw material for constitutional elements described in the text is easily selected and replaced by other conventional materials known to those skilled in the art.

[165] Aάϊtionally, various modifications, variations, aάϊtions and applications of technical constructions of the invention may be made by those skilled in the art in order to omit or improve the technical constructions without deterioration thereof. Furthermore, the order of individual steps in the fabrication method of the present invention may be suitably altered by those skilled in the art depending on processing environment or apparatus. Industrial Applicability

[166] According to the present invention, there is provided a bulk type solar cell having a porous structure on a silicon wafer, which has various forms of holes in view of crystalline features and/or construction, so as to exhibit uniformly decreased reflectivity in a wide range of solar light wavelengths.

[167] Because of the porous surface structure described above, the semiconductor substrate has a considerably larger surface area than that of a conventional semiconductor substrate, and the solar cell can be fabricated by reduced processes for optimal impurity implantation, thereby improving the efficiency of solar cell. Moreover, the passivation layer formed on the porous silicon wafer can greatly reduce surface defects and improve the efficiency of the solar cell.

[168] The method of the present invention may be applied to fabricate a solar cell while utilizing any conventional method so as to greatly reduce production costs, which in turn, ensures competitiveness in rapidly extended solar cell markets. Briefly, by maximally applying the conventional method for fabrication of a solar cell, an improved solar cell having a desired energy level structure capable of accumulating electrons can be resulted, thereby enhancing a photoelectric conversion efficiency of the solar cell and providing an economic advantage in production.

Claims

[1] A solar cell comprising a silicon substrate having a first impurity region and a semiconductor layer having a second impurity region distinguished from the first impurity region, which is laminated on the silicon substrate; wherein the semiconductor layer having the second impurity region has a porous structure consisting of a plurality of holes formed on a surface thereof.

[2] The solar cell according to claim 1, wherein the semiconductor layer includes an upper electrode positioned on a given portion of the surface, and the porous structure of the semiconductor is formed on the remaining portion of the surface except the given portion on which the upper electrode is positioned.

[3] The solar cell according to claim 1, wherein the silicon substrate having the first impurity region is provided with a lower electrode made of at least one selected from conductive metals on a bottom portion of the substrate.

[4] The solar cell according to claim 1, further comprising another semiconductor layer having another first impurity region between the silicon substrate having the first impurity region and the semiconductor layer having the second impurity region, wherein the first impurity region in the semiconductor layer has higher concentration than that of the first impurity region in the silicon substrate, and has a porous structure therein.

[5] The solar cell according to claim 4, wherein the semiconductor layer having the first impurity region has a thickness ranging from lOOnm to 600nm.

[6] The solar cell according to claim 1, wherein the hole has a depth smaller, equal to or larger than the thickness of the semiconductor layer having the second impurity region.

[7] The solar cell according to claim 1, wherein each hole has independently a cross- section in the form of any one selected from a U shape, V shape and polygonal shape.

[8] The solar cell according to claim 1, wherein a face induing a base point of the hole is inclined at an angle of more than 0°to less than 135° to a lateral side of the hole.

[9] The solar cell according to claim 1, wherein a porous structure of the semiconductor layer having the second impurity region has surface porosity ranging from 10 to 70%.

[10] The solar cell according to claim 1, wherein the surface of the semiconductor layer having the second impurity region includes at least one selected from crystalline faces (220} (33 U (320} (331} (400} (411} (422} (511} (531) and (533} which are observed by a crystalline analysis method using X-ray diffraction (XRD).

[11] The solar cell according to claim 1 or 2, wherein the semiconductor layer having the second impurity region includes a passivation layer or an anti-reflective layer on a surface of the porous structure.

[12] The solar cell according to claim 11, wherein the passivation layer passivates the silicon substrate.

[13] The solar cell according to claim 11, wherein the passivation layer comprises at least one layer made of silicon oxide or a silicon amorphous compound.

[14] The solar cell according to claim 11, wherein the constitutional ingredients of the passivation layer have a refractive index between those of air and the silicon substrate.

[15] A method for fabrication of a solar cell comprising: doping an upper surface of a silicon substrate having a first impurity region with a second impurity different from the first impurity contained in the first impurity region to form a semiconductor layer having a second impurity region; and forming a porous structure consisting of a plurality of holes on a surface of the formed semiconductor layer having the second impurity region.

[16] A method for fabrication of a solar cell comprising: doping an upper surface of a silicon substrate having a first impurity region with a second impurity different from the first impurity contained in the first impurity region to form a semiconductor layer having a second impurity region; forming another semiconductor layer having another first impurity region, which contains another first impurity with higher concentration than that of the first impurity doped on the silicon substrate having the first impurity region, between the silicon substrate having the first impurity region and any one selected from horizontal sides in contact with the semiconductor layer having the second impurity region; removing a part of the formed semiconductor layer having the second impurity region, which was formed at a lateral side of the solar cell; removing a part of the semiconductor layer having the second impurity region, which was in contact with the silicon substrate having the first impurity region to form an electrode; and forming a porous structure consisting of a plurality of holes on a surface of the remaining part of the semiconductor layer having the second impurity region.

[17] The method according to claim 16, wherein the semiconductor layer having the first impurity region is formed by a porous silicon layer formation process.

[18] The method according to claim 16, wherein the semiconductor layer having the second impurity region, which was formed at the lateral side, is removed by edge isolation.

[19] The method according to claim 15 or 16, wherein the porous structure on the surface of the semiconductor layer having the second impurity region is formed by preparing an upper electrode on a given portion of the upper surface of the semiconductor layer, then, forming a porous structure on the entire portion of the upper surface of the semiconductor layer having the second impurity region except the given portion on which the upper electrode is positioned.

[20] The method according to claim 15 or 16, wherein the second impurity doping step is performed by at least one selected from ion implantation, thermal diffusion and phosphooxychloride POCl ₃ diffusion.

[21] The method according to claim 15 or 16, wherein the second impurity doping step is performed by placing the silicon substrate having the first impurity region in a furnace at 800 to 900⁰C then injecting a gas containing the second impurity thereinto.

[22] The method according to claim 21, wherein the first impurity is P type while the second impurity is N type, and the gas containing the second impurity includes POCl₃.

[23] The method according to claim 15 or 16, wherein the porous structure is formed by etching the silicon substrate using any one selected from wet chemical etching, dry chemical etching, electrochemical etching and mechanical etching processes.

[24] The method according to claim 23, wherein the wet etching and the electrochemical etching processes are performed by using at least one of acids selected from a group consisting of fluoric acid HF, nitric acid HNO ₃ and acetic acid CH₃ COOH as a material reacting with the silicon substrate.

[25] The method according to claim 23, wherein the wet etching and the electrochemical etching processes are performed by using a combination of: at least one of acids selected from a group consisting of fluoric acid HF, nitric acid HNO ₃ and acetic acid CH₃COOH; and at least one compound selected from acetonitrile, dimethyl formamide, formamide, diethyl sulfoxide, hexamethyl phosphoric triamide, dimethyl acetamide, water, methyl alcohol, ethyl alcohol and isopropyl alcohol, as a material reacting with the silicon substrate.

[26] The method according to claim 23, wherein any one selected from the wet etching, the dry etching and the electrochemical etching processes is maintained to allow a reaction of removing the silicon oxide formed on the surface having the porous structure to be a final reaction.

[27] The method according to claim 15 or 16, further comprising a step of forming a passivation layer or an anti-reflective layer to passivate the silicon substrate on the surface of the semiconductor having the second impurity region with the porous structure, after each of the steps.

[28] The method according to claim 27, wherein the passivation layer is formed by any one selected from: a thermal wet oxidation of the surface of the silicon substrate having the porous structure; a thermal dry oxidation of the surface of the silicon substrate having the porous structure; and a plasma chemical vapor deposition to deposit a silicon amorphous compound on an upper surface of the silicon substrate having the porous structure.