JP3838911B2 - Method for manufacturing solar cell element - Google Patents

Method for manufacturing solar cell element Download PDF

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JP3838911B2
JP3838911B2 JP2001392773A JP2001392773A JP3838911B2 JP 3838911 B2 JP3838911 B2 JP 3838911B2 JP 2001392773 A JP2001392773 A JP 2001392773A JP 2001392773 A JP2001392773 A JP 2001392773A JP 3838911 B2 JP3838911 B2 JP 3838911B2
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solar cell
electrode
silicon substrate
region
cell element
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JP2003197932A (en
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周太郎 石川
宏明 高橋
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Description

【0001】
【発明の属する技術分野】
本発明は太陽電池素子およびその製造方法に関する。
【0002】
【従来の技術】
図5は従来の太陽電池素子を示す図である。図5において、1は一導電型不純物を含有するシリコン基板、1aはシリコン基板1の表面部に形成された逆導電型不純物拡散領域、2は反射防止膜、3は表面電極、4は裏面電極である。裏面電極4は銀などから成る電極取出部4aとアルミニウムなどから成る集電部4bで構成される。表面電極3と裏面電極4の電極取出部4aは他の配線部材(不図示)との接続を容易にするために、はんだ層11で被覆されている。
【0003】
この従来の太陽電池素子の製造方法を図6に示す。まず、図6(a)に示すような一導電型を呈する板状のシリコン基板1の一主面側を図6(b)に示すように例えばリアクティブイオンエッチング法などで微細な凹凸1aを多数形成して粗面状にする。これはシリコン基板1の表面での反射を極力低減して光をシリコン基板1内へ有効に取り込むためである。多結晶シリコン基板1はアルカリ水溶液を用いるウェットエッチングでは、良好に粗面状にできないことから、リアクティブイオンエッチング法で行なう。
【0004】
次に、図6(c)に示すように、一導電型を呈するシリコン基板1の表面部に逆導電型半導体不純物を拡散した領域1aを形成して、シリコン基板1内に半導体接合部を形成する。また、図6(d)に示すように、シリコン基板1の他の主面側の周縁部に切欠部1dを設けて、逆導電型不純物拡散領域1bを分断する。半導体基板1の一主面側に、窒化シリコン膜などから成る反射防止膜2を形成する。
【0005】
しかる後、図5に示すように、シリコン基板1の一主面側に表面電極3を形成するとともに、シリコン基板1の他の主面側に裏面電極4を形成する。表面電極3は、銀粉末とガラスフリットを樹脂に混練したペーストを反射防止膜2上に塗布して、焼き付けることにより、この電極材料3が反射防止膜2を貫通してシリコン基板1の一主面側の逆導電型不純物を拡散した領域1aに接合して形成される。また、裏面電極4は銀粉末とガラスフリットを樹脂に混練したペースト4aと、アルミニウムとガラスフリットを樹脂に混練したペースト4bを塗布して焼き付けることにより、シリコン基板1の他の主面側に一導電型半導体不純物を高濃度に拡散させながら焼き付ける。
【0006】
このように、従来の太陽電池素子では、シリコン基板1の一主面側を粗面状にした後に、逆導電型半導体不純物を拡散した領域1bを形成し、表面電極3は逆導電側不純物を拡散した領域1bに接続するように設けていた。
【0007】
【発明が解決しようとする課題】
ところが、この従来の太陽電池における逆導電型不純物拡散領域1bは、集電効率を考慮して、シリコン基板1の一主面側のシート抵抗が60〜300Ω/□となるように形成されることから、表面電極3との接触抵抗が増大するとともに、太陽電池素子の直列抵抗が増大し、また表面電極3部分のキャリア再結合が増大して太陽電池の高効率化が達成できないという問題があった。
【0008】
本発明は、このような従来技術の問題点に鑑みてなされたものであり、低反射により高い発生電流を得る微小な凹凸を有する太陽電池構造において、直列抵抗の増大が少なく、かつ電極側への少数キャリアの拡散を抑制し、オーミックコンタクト電極部のキャリア再結合を低減することによって、高効率化した太陽電池素子を提供することを目的とする。
【0009】
【問題点を解決するための手段】
上記目的を達成するために、請求項1に係る太陽電池素子の製造方法は、シリコン基板の一主面側にシート抵抗が10〜40Ω/□となる高濃度拡散領域を形成する工程と、この高濃度拡散領域の電極下部に当たる部分をマスクで保護する工程と、このマスクで保護された領域以外の高濃度拡散領域をドライエッチング法で微細な突起を形成しつつ除去する工程と、シリコン基板の一主面側で前記微細な突起が形成された領域にシート抵抗が60〜300Ω/□となる低濃度拡散領域を形成する工程と、前記マスクが除去された前記高濃度拡散領域の上に前記電極を形成する工程と、を含むことを特徴とする。
【0011】
【発明の実施の形態】
以下、各請求項に係る発明の実施形態を図面に基づいて説明する。
図1は請求項1に係る太陽電池素子を示す図であり、1はシリコン基板、2は反射防止膜、3は表面電極、4は裏面電極である。
【0012】
シリコン基板1は、例えばp型などの一導電型を呈し、その表面部分には、反射を防止するために、微細な凹凸1aが形成されている。この微細な凹凸1aは、シリコン基板1の表面部分での反射を防止して、シリコン基板1内に有効に取り込むために、高低差が2.0μm以下で、アスペクト比(凸部の高さ/凸部の底辺の長さ)が2以上であることが望ましい。この微細な凹凸1aは例えばRIE法などのドライエッチング法で形成する。このRIE法では、結晶の面方位に影響されずに微細な凹凸を均一に多数形成できることから、シリコン基板1として多結晶シリコン基板を用いた場合に特に有利である。
【0013】
シリコン基板1の表面にはリンなどの逆導電型不純物を含有させた領域1bが厚み0.5μm程度に形成されている。この領域1bは、そのシート抵抗が60〜300Ω/□となるように逆導電側不純物を含有させる。この領域1bのシート抵抗が60Ω/□以下の場合、受光面の不純物濃度が高くなり、受光面の表面再結合が増大するため、太陽電池特性の低下を招き不適である。また、この領域1bのシート抵抗が300Ω/□以上の場合、表面抵抗の増大によるFFの低下を招き不適である。なお、この逆導電型不純物を含有させた領域1bは、正極と負極の分離を行なうために、シリコン基板1の他の主面側の周縁部1dで切断されている。
【0014】
逆導電型半導体不純物を含有させた領域1bのうち、表面電極3を形成する領域1cは、シート抵抗が10〜40Ω/□となるように逆導電型不純物を含有させる。このように、表面電極3を接続する領域1cのシート抵抗が10〜40Ω/□となるように逆導電型不純物を含有させると、図4に示すように、接合部の突き抜けによるリーク電流が小さくなるため開放電圧が向上し、太陽電池の変換効率が向上する。また、表面電極3を接続する領域1cのシート抵抗が10〜40Ω/□となるように逆導電型不純物を含有させると、図3に示すように、表面電極3が形成される領域以外の一主面側の逆導電型不純物拡散領域1aのシート抵抗を高くすることができ、表面濃度が低くなるため表面再結合が低減され、太陽電池の開放電圧が向上し、太陽電池の変換効率が向上する。このとき電極下部のシート抵抗を、太陽電池素子の特性を下げずに10Ω/□以下とするためには、長時間プロセスが必要となる。これは太陽電池製造コストの上昇につながり不適である。また40Ω/□以上にすると、接触抵抗の増大によるシリーズ抵抗の増大や、接合が浅いことによる電極の突き抜けが太陽電池素子の特性の低下を招き不適である。なお、図3は一主面側の電極下部以外のシート抵抗が20Ω/□のときの例である。
【0015】
このシリコン基板1の一主面側のシート抵抗は、半導体不純物を熱拡散させる際の温度や時間や不純物濃度などを適宜調整して、10〜40Ω/□あるいは60〜300Ω/□となるように調整すればよい。
【0016】
シリコン基板1の受光面側には反射防止膜2が形成されている。この反射防止膜2は、例えば厚み80nm程度の窒化シリコン膜などから成り、その表面はシリコン基板1の微細な凹凸形状をそのまま引き継いだ微細な凹凸形状になっている。この反射防止膜2は、例えばプラズマCVD法などで形成するのが望ましい。すなわち、この反射防止膜2をプラズマCVD法で形成すると、その膜形成の過程で、シリコン基板1内に水素が注入され、多結晶シリコンの粒堺の界面準位を低下させて高効率化を図ることができる。
【0017】
逆導電型不純物が高濃度に拡散された領域1cには表面電極3が形成されている。この表面電極3は例えば銀を主成分として構成される。また、シリコン基板2の他の主面側には、裏面電極4が形成されている。この裏面電極4は例えば銀などを主成分とする電極取出部4aとアルミニウムなどを主成分とする集電部4bから成る。さらに、表面電極3と裏面電極4の電極取出部4aは、複数の太陽電池素子同志の接続を容易に行なうために、はんだ層5で被覆されている。
【0018】
拡散層のシート抵抗を求めるには、四探針法のような電流−電圧特性から直接電気抵抗を求めて計算する方法や、不純物濃度の深さ分布からシート抵抗を求める方法がある。不純物濃度の深さ分布測定は、C−V法や広がり抵抗法など電気的に測定する方法や、SIMS(二次イオン質量分析法)やRBS(ラザフォード後方散乱法)など物理的に測定する方法がある。しかし、物理的分析手法は装置が高価で測定に手間がかかるため、一般的には電気的に測定する方法で特に簡便である四探針法が広く用いられている。
【0019】
次に、上述した太陽電池の製造方法を説明する。図2(a)に示すように、シリコン基板1は、高濃度にリンが拡散された高濃度リン拡散層2が形成される。この高濃度リン拡散層2は1μm程度の深さを有する。この高濃度拡散領域1cは、後に表面電極3の接続部になるものであり、そのシート抵抗が10〜40Ω/□と比較的低抵抗なるように形成される。
【0020】
次に、図2(b)に示すように、シリコン基板1の表面電極を形成する領域に耐プラズマ性レジスト12が印刷され、図1(c)に示すように、シリコン基板1の表面電極下部の高濃度リン拡散層2が耐プラズマ性レジスト12で保護された状態で、微小な凹凸1aを形成するためのエッチングが施される。この微小な凹凸1aを形成する工程の目的は、凹凸1aの形成のみでなく、光活性領域に存在する高濃度のリン拡散層1cを除去することも含まれている。従って、凹凸1aを形成するときのエッチング深さは、凹凸1aを形成する面で高濃度リン拡散層1c以上を必要とする。
【0021】
次に、図2(d)に示すように、電極下部領域を保護していたレジスト13が除去される。ここで、表面電極3の下部となる高濃度リン拡散層2は、微小な凹凸1aが形成されない。そのため、高濃度のリン拡散領域1cが光活性領域と容易に判別できる。この表面形状は、後工程の表面電極の印刷において、位置合わせが容易となるという大きなメリットを生むことになる。すなわち、表面電極3を形成するためのペーストをスクリーン印刷する際に、スクリーンのパターンとシリコン基板1の表面電極を形成する位置を目視で位置合わせすることが可能となり、表面電極の形成が極めて容易になる。
【0022】
続いて、図2(e)〜(g)に示すように、従来工程と同様に、シリコン基板1にpn接合6が形成され、シリコン基板1の他の主面側の周縁部1dでpn分離を行った後、プラズマCVD法で反射防止膜3が形成される。さらに、スクリーン印刷法で表面電極3と裏面電極4を形成するペーストをスクリーン印刷して焼成し、焼成後にはんだ層5で被覆して完成する(図1参照)。これによって、基板1を含む太陽電池素子が完成する。
【0023】
図1に示すような太陽電池素子においては、反射を防止するための微小な凹凸(2.0μm以下)構造及び、浅く拡散されたn型拡散層領域1aは短絡電流の向上に大きく作用する。他方、表面電極3の下部に形成された高濃度リン拡散領域1cは十分な深さを有しているため、表面電極3がpn接合を破壊する可能性が少ない。さらに、表面電極3の下部に形成された高濃度リン拡散領域1cは小さな面抵抗を有しているため発生したキャリアを効率よく収集することができ、太陽電池の光電変換効率の改善に寄与することができる。
【0024】
実際に、先行技術である微小な凹凸を利用した生産品である図5の太陽電池素子構造に比べて、本発明による図1の太陽電池素子では光電変換効率が約1.0%程度改善される。
【0025】
【実施例】
厚みが300μmで、比抵抗が1.5Ωcmの15cm角の多結晶シリコンから成る基板を25%の水酸化ナトリウム水溶液に浸漬し片面10μmエッチングしたあと、高濃度のリン拡散を行うものと、行わないもの作製した。高濃度リン拡散層のシート抵抗は20Ω/□とした。高濃度拡散を行った基板には、フォトレジストをスピンコートし、露光、現像することで、表面電極の領域にマスクを形成した。次に高濃度拡散した基板と、拡散していない基板全てに対し、反応性イオンエッチングを行い微小な凹凸を形成した。
【0026】
次に、シリコン基板表面部のシート抵抗が、40Ω/□、70Ω/□、80Ω/□、100Ω/□、となるようにリン(P)を拡散した。さらに、pn分離を行い、シリコン基板一主面側に、屈折率1.2、膜厚80nmのSiN膜をプラズマCVD法で形成して反射防止膜とした。次に、表面に銀ペーストを、裏面にはアルミニウムペースト及び銀ペーストをスクリーン印刷し、ベルト炉を用いて焼成した。最後にシリコン基板をはんだ槽に浸漬させ受光面電極、及び裏面の銀電極にはんだをコーティングして、はんだ層を形成する。
【0027】
それぞれの試料について、開放電圧を測定した。その結果を図2に示す。電極下部に高濃度リン拡散層がある試料では、拡散シート抵抗が高くなるのに伴い、開放電圧も向上する。これに対し、高濃度リン拡散層がない試料では拡散シート抵抗に対する開放電圧は、70Ω/□をピークに低下している。これより、RIEを用いた微小な凹凸(2.0μm以下)をもつ太陽電池構造においても、表面電極下部に高濃度のリン拡散層を有することで、光活性領域のシート抵抗を高くすることが可能となった。
【0028】
さらに、電極下部の高濃度リン拡散層のリン濃度を変更し、シート抵抗を20Ω/□、40Ω/□、50Ω/□、60Ω/□として素子化を行った。素子化手順は上記と同様で、光活性層の拡散シート抵抗は70Ω/□とした。それぞれの試料に対するFFを図3に示す。これより、電極下部のシート抵抗が50Ω/□以上になるとFFが低下することが分かった。
【0029】
【発明の効果】
以上のように、請求項1に係る発明によれば、シリコン基板の一主面側にシート抵抗が10〜40Ω/□となる高濃度拡散領域を形成する工程と、この高濃度拡散領域の電極下部に当たる部分をマスクで保護する工程と、このマスクで保護された領域以外の高濃度拡散領域をドライエッチング法で微細な突起を形成しつつ除去する工程と、シリコン基板の一主面側で前記微細な突起が形成された領域にシート抵抗が60〜300Ω/□となる低濃度拡散領域を形成する工程と、前記マスクが除去された前記高濃度拡散領域の上に前記電極を形成する工程と、を含むことから、太陽電池の製造コストの上昇を抑制しつつ、微小な凹凸を形成した太陽電池の表面電極下部に高濃度リン拡散層を有する構造を持つ太陽電池を提供することができる。
【図面の簡単な説明】
【図1】請求項1に係る太陽電池素子の一実施形態を示す図である。
【図2】請求項2に係る太陽電池素子の製造方法の一実施形態を示す図である。
【図3】請求項1に係る太陽電池素子と従来の太陽電池素子における一主面側の電極下部以外のシート抵抗と開放電圧との関係を示す図である。
【図4】請求項1に係る太陽電池素子における一主面側の電極下部のシート抵抗と開放電圧との関係を示す図である。
【図5】従来の太陽電池素子の構造を示す図である。
【図6】従来の太陽電池素子の製造方法を示す図である。
【符号の説明】
1;シリコン基板、1a;低濃度拡散層、1b;微細な凹凸、1c;高濃度拡散領域、1d;分離部、2;反射防止膜、3;表面電極、4;裏面電極、4a;電極取出部、4b;集電部、5;はんだ層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solar cell element and a manufacturing method thereof.
[0002]
[Prior art]
FIG. 5 is a diagram showing a conventional solar cell element. In FIG. 5, 1 is a silicon substrate containing one conductivity type impurity, 1a is a reverse conductivity type impurity diffusion region formed on the surface portion of the silicon substrate 1, 2 is an antireflection film, 3 is a front electrode, and 4 is a back electrode. It is. The back electrode 4 includes an electrode extraction part 4a made of silver or the like and a current collecting part 4b made of aluminum or the like. The electrode extraction part 4a of the front surface electrode 3 and the back surface electrode 4 is covered with a solder layer 11 in order to facilitate connection with other wiring members (not shown).
[0003]
FIG. 6 shows a method for manufacturing this conventional solar cell element. First, as shown in FIG. 6B, the fine irregularities 1a are formed on one main surface side of the plate-like silicon substrate 1 having one conductivity type as shown in FIG. 6A by the reactive ion etching method or the like. Many are formed to have a rough surface. This is because reflection on the surface of the silicon substrate 1 is reduced as much as possible and light is effectively taken into the silicon substrate 1. The polycrystalline silicon substrate 1 is formed by a reactive ion etching method because it cannot be satisfactorily roughened by wet etching using an alkaline aqueous solution.
[0004]
Next, as shown in FIG. 6C, a region 1 a in which a reverse conductivity type semiconductor impurity is diffused is formed on the surface portion of the silicon substrate 1 exhibiting one conductivity type, and a semiconductor junction is formed in the silicon substrate 1. To do. Further, as shown in FIG. 6D, a notch 1d is provided in the peripheral portion on the other main surface side of the silicon substrate 1 to divide the reverse conductivity type impurity diffusion region 1b. An antireflection film 2 made of a silicon nitride film or the like is formed on one main surface side of the semiconductor substrate 1.
[0005]
Thereafter, as shown in FIG. 5, the front surface electrode 3 is formed on one main surface side of the silicon substrate 1 and the back surface electrode 4 is formed on the other main surface side of the silicon substrate 1. The surface electrode 3 is formed by applying a paste obtained by kneading a silver powder and glass frit to a resin on the antireflection film 2 and baking the electrode material 3 so that the electrode material 3 penetrates the antireflection film 2 and is a main component of the silicon substrate 1. It is formed by bonding to the region 1a in which the reverse conductivity type impurity on the surface side is diffused. The back electrode 4 is applied to the other main surface side of the silicon substrate 1 by applying and baking a paste 4a in which silver powder and glass frit are kneaded in resin and paste 4b in which aluminum and glass frit are kneaded in resin. Baking while diffusing conductive semiconductor impurities in high concentration.
[0006]
As described above, in the conventional solar cell element, after one main surface side of the silicon substrate 1 is roughened, the region 1b in which the reverse conductivity type semiconductor impurity is diffused is formed, and the surface electrode 3 has the reverse conductivity side impurity. It was provided so as to be connected to the diffused region 1b.
[0007]
[Problems to be solved by the invention]
However, the reverse conductivity type impurity diffusion region 1b in this conventional solar cell is formed so that the sheet resistance on one main surface side of the silicon substrate 1 is 60 to 300Ω / □ in consideration of the current collection efficiency. Therefore, the contact resistance with the surface electrode 3 is increased, the series resistance of the solar cell element is increased, and the carrier recombination at the surface electrode 3 portion is increased, so that high efficiency of the solar cell cannot be achieved. It was.
[0008]
The present invention has been made in view of such problems of the prior art, and in a solar cell structure having minute unevenness that obtains a high generated current by low reflection, there is little increase in series resistance, and the electrode side. It is an object to provide a highly efficient solar cell element by suppressing the diffusion of minority carriers and reducing carrier recombination in the ohmic contact electrode portion.
[0009]
[Means for solving problems]
In order to achieve the above object, a method of manufacturing a solar cell element according to claim 1 includes a step of forming a high concentration diffusion region having a sheet resistance of 10 to 40Ω / □ on one main surface side of a silicon substrate, A step of protecting a portion of the high-concentration diffusion region that is under the electrode with a mask, a step of removing the high-concentration diffusion region other than the region protected by the mask while forming fine protrusions by a dry etching method, A step of forming a low-concentration diffusion region having a sheet resistance of 60 to 300 Ω / □ in a region where the fine protrusions are formed on one main surface side, and the high-concentration diffusion region from which the mask has been removed. Forming an electrode.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the invention according to the claims will be described with reference to the drawings.
FIG. 1 is a view showing a solar cell element according to claim 1, wherein 1 is a silicon substrate, 2 is an antireflection film, 3 is a front electrode, and 4 is a back electrode.
[0012]
The silicon substrate 1 has one conductivity type such as p-type, for example, and a fine unevenness 1a is formed on the surface portion to prevent reflection. The fine unevenness 1a prevents reflection at the surface portion of the silicon substrate 1 and effectively incorporates it into the silicon substrate 1, so that the height difference is 2.0 μm or less and the aspect ratio (height of the convex portion / It is desirable that the length of the base of the convex portion is 2 or more. The fine irregularities 1a are formed by a dry etching method such as an RIE method. This RIE method is particularly advantageous when a polycrystalline silicon substrate is used as the silicon substrate 1 because a large number of fine irregularities can be formed uniformly without being affected by the crystal plane orientation.
[0013]
On the surface of the silicon substrate 1, a region 1b containing a reverse conductivity type impurity such as phosphorus is formed with a thickness of about 0.5 μm. This region 1b contains a reverse-conductivity-side impurity so that its sheet resistance is 60 to 300Ω / □. When the sheet resistance of this region 1b is 60 Ω / □ or less, the impurity concentration on the light receiving surface becomes high and the surface recombination on the light receiving surface increases, which is unsuitable because it causes deterioration in solar cell characteristics. Moreover, when the sheet resistance of this area | region 1b is 300 ohms / square or more, the fall of FF by the increase in surface resistance is caused and it is unsuitable. The region 1b containing the reverse conductivity type impurity is cut at the peripheral portion 1d on the other main surface side of the silicon substrate 1 in order to separate the positive electrode and the negative electrode.
[0014]
Of the region 1b containing the reverse conductivity type semiconductor impurity, the region 1c forming the surface electrode 3 contains the reverse conductivity type impurity so that the sheet resistance becomes 10 to 40Ω / □. Thus, when the reverse conductivity type impurity is included so that the sheet resistance of the region 1c to which the surface electrode 3 is connected is 10 to 40Ω / □, the leakage current due to the penetration of the junction is small as shown in FIG. Therefore, the open circuit voltage is improved, and the conversion efficiency of the solar cell is improved. In addition, when a reverse conductivity type impurity is included so that the sheet resistance of the region 1c to which the surface electrode 3 is connected is 10 to 40Ω / □, as shown in FIG. The sheet resistance of the reverse conductivity type impurity diffusion region 1a on the main surface side can be increased, the surface concentration is reduced, so that surface recombination is reduced, the open voltage of the solar cell is improved, and the conversion efficiency of the solar cell is improved. To do. At this time, in order to make the sheet resistance below the electrode 10Ω / □ or less without lowering the characteristics of the solar cell element, a long process is required. This leads to an increase in solar cell manufacturing costs and is not suitable. On the other hand, if it is 40Ω / □ or more, an increase in series resistance due to an increase in contact resistance and a penetration of electrodes due to a shallow junction result in deterioration of the characteristics of the solar cell element, which is unsuitable. FIG. 3 shows an example in which the sheet resistance other than the lower part of the electrode on one main surface side is 20Ω / □.
[0015]
The sheet resistance on the one main surface side of the silicon substrate 1 is adjusted to 10 to 40Ω / □ or 60 to 300Ω / □ by appropriately adjusting the temperature, time, impurity concentration, etc. when the semiconductor impurities are thermally diffused. Adjust it.
[0016]
An antireflection film 2 is formed on the light receiving surface side of the silicon substrate 1. The antireflection film 2 is made of, for example, a silicon nitride film having a thickness of about 80 nm, and the surface thereof has a fine concavo-convex shape that inherits the fine concavo-convex shape of the silicon substrate 1 as it is. The antireflection film 2 is desirably formed by, for example, a plasma CVD method. That is, when the antireflection film 2 is formed by the plasma CVD method, hydrogen is injected into the silicon substrate 1 in the process of forming the film, and the interface state of the polycrystalline silicon grains is lowered to increase the efficiency. Can be planned.
[0017]
A surface electrode 3 is formed in the region 1c where the reverse conductivity type impurity is diffused at a high concentration. The surface electrode 3 is composed mainly of silver, for example. A back electrode 4 is formed on the other main surface side of the silicon substrate 2. The back electrode 4 is composed of, for example, an electrode extraction part 4a mainly composed of silver or the like and a current collecting part 4b mainly composed of aluminum or the like. Furthermore, the electrode extraction part 4a of the front surface electrode 3 and the back surface electrode 4 is covered with a solder layer 5 in order to easily connect a plurality of solar cell elements.
[0018]
In order to obtain the sheet resistance of the diffusion layer, there are a method of obtaining the electric resistance directly from the current-voltage characteristics such as the four-probe method and a method of obtaining the sheet resistance from the depth distribution of the impurity concentration. The depth distribution measurement of the impurity concentration is performed by electrical measurement methods such as CV method and spreading resistance method, and physical measurement methods such as SIMS (secondary ion mass spectrometry) and RBS (Rutherford backscattering method). There is. However, since the physical analysis method is expensive and takes a lot of time for measurement, the four-probe method, which is particularly convenient as a method of electrical measurement, is widely used.
[0019]
Next, a method for manufacturing the above-described solar cell will be described. As shown in FIG. 2A, the silicon substrate 1 is formed with a high concentration phosphorus diffusion layer 2 in which phosphorus is diffused at a high concentration. The high concentration phosphorus diffusion layer 2 has a depth of about 1 μm. This high-concentration diffusion region 1c will be a connection portion of the surface electrode 3 later, and is formed so that its sheet resistance is relatively low, 10 to 40Ω / □.
[0020]
Next, as shown in FIG. 2B, a plasma-resistant resist 12 is printed in the region where the surface electrode of the silicon substrate 1 is to be formed, and as shown in FIG. In the state where the high-concentration phosphorus diffusion layer 2 is protected by the plasma-resistant resist 12, etching is performed to form minute irregularities 1a. The purpose of the step of forming the minute unevenness 1a includes not only the formation of the unevenness 1a but also the removal of the high-concentration phosphorus diffusion layer 1c existing in the photoactive region. Therefore, the etching depth when forming the unevenness 1a requires a high-concentration phosphorus diffusion layer 1c or more on the surface where the unevenness 1a is formed.
[0021]
Next, as shown in FIG. 2D, the resist 13 protecting the electrode lower region is removed. Here, in the high-concentration phosphorus diffusion layer 2 which is the lower part of the surface electrode 3, the minute unevenness 1a is not formed. Therefore, the high concentration phosphorus diffusion region 1c can be easily distinguished from the photoactive region. This surface shape brings about a great merit that alignment is easy in the printing of the surface electrode in a later step. That is, when the paste for forming the surface electrode 3 is screen-printed, it is possible to visually align the screen pattern and the position where the surface electrode of the silicon substrate 1 is formed, and the formation of the surface electrode is very easy. become.
[0022]
Subsequently, as shown in FIGS. 2E to 2G, a pn junction 6 is formed on the silicon substrate 1 and pn separation is performed at the peripheral portion 1d on the other main surface side of the silicon substrate 1, as in the conventional process. After performing, the antireflection film 3 is formed by plasma CVD. Further, a paste for forming the front surface electrode 3 and the back surface electrode 4 is screen-printed and fired by a screen printing method, and after firing, the paste is covered with a solder layer 5 to complete (see FIG. 1). Thereby, the solar cell element including the substrate 1 is completed.
[0023]
In the solar cell element as shown in FIG. 1, the minute unevenness (2.0 μm or less) structure for preventing reflection and the shallowly diffused n-type diffusion layer region 1a greatly affect the short-circuit current. On the other hand, since the high concentration phosphorus diffusion region 1c formed under the surface electrode 3 has a sufficient depth, the surface electrode 3 is less likely to break the pn junction. Furthermore, since the high concentration phosphorus diffusion region 1c formed under the surface electrode 3 has a small surface resistance, the generated carriers can be collected efficiently, which contributes to the improvement of the photoelectric conversion efficiency of the solar cell. be able to.
[0024]
Actually, compared with the solar cell element structure of FIG. 5 which is a product using minute unevenness as the prior art, the photoelectric conversion efficiency is improved by about 1.0% in the solar cell element of FIG. 1 according to the present invention. The
[0025]
【Example】
A substrate made of 15 cm square polycrystalline silicon having a thickness of 300 μm and a specific resistance of 1.5 Ωcm is immersed in a 25% aqueous sodium hydroxide solution and etched 10 μm on one side. Things were made. The sheet resistance of the high concentration phosphorus diffusion layer was 20Ω / □. On the substrate subjected to high concentration diffusion, a photoresist was spin-coated, exposed, and developed to form a mask in the surface electrode region. Next, reactive ion etching was performed on all of the highly diffused substrate and the undiffused substrate to form minute irregularities.
[0026]
Next, phosphorus (P) was diffused so that the sheet resistance of the surface portion of the silicon substrate was 40Ω / □, 70Ω / □, 80Ω / □, and 100Ω / □. Further, pn separation was performed, and an SiN film having a refractive index of 1.2 and a film thickness of 80 nm was formed on one main surface side of the silicon substrate by a plasma CVD method to form an antireflection film. Next, a silver paste was screen-printed on the front surface, and an aluminum paste and a silver paste were screen-printed on the back surface, and baked using a belt furnace. Finally, the silicon substrate is immersed in a solder bath, and the light-receiving surface electrode and the silver electrode on the back surface are coated with solder to form a solder layer.
[0027]
The open circuit voltage was measured for each sample. The result is shown in FIG. In a sample having a high-concentration phosphorus diffusion layer under the electrode, the open-circuit voltage is improved as the diffusion sheet resistance increases. On the other hand, in the sample without the high-concentration phosphorus diffusion layer, the open-circuit voltage with respect to the diffusion sheet resistance decreases at a peak of 70Ω / □. As a result, even in a solar cell structure having minute irregularities (2.0 μm or less) using RIE, the sheet resistance of the photoactive region can be increased by having a high-concentration phosphorus diffusion layer below the surface electrode. It has become possible.
[0028]
Furthermore, the phosphorus concentration of the high-concentration phosphorus diffusion layer under the electrode was changed, and the sheet resistance was changed to 20Ω / □, 40Ω / □, 50Ω / □, and 60Ω / □. The device fabrication procedure was the same as described above, and the diffusion sheet resistance of the photoactive layer was 70Ω / □. The FF for each sample is shown in FIG. From this, it was found that the FF decreases when the sheet resistance at the lower part of the electrode is 50Ω / □ or more.
[0029]
【The invention's effect】
As described above, according to the first aspect of the present invention, the step of forming a high concentration diffusion region having a sheet resistance of 10 to 40Ω / □ on one main surface side of the silicon substrate, and the electrode of the high concentration diffusion region A step of protecting the lower portion with a mask, a step of removing a high-concentration diffusion region other than the region protected by the mask while forming fine protrusions by a dry etching method, and the main surface side of the silicon substrate Forming a low-concentration diffusion region having a sheet resistance of 60 to 300 Ω / □ in a region where fine protrusions are formed, and forming the electrode on the high-concentration diffusion region from which the mask has been removed; Therefore, it is possible to provide a solar cell having a structure having a high-concentration phosphorus diffusion layer below the surface electrode of the solar cell in which minute irregularities are formed while suppressing an increase in the manufacturing cost of the solar cell.
[Brief description of the drawings]
1 is a view showing an embodiment of a solar cell element according to claim 1;
FIG. 2 is a diagram showing an embodiment of a method for manufacturing a solar cell element according to claim 2;
FIG. 3 is a diagram showing the relationship between the sheet resistance and the open circuit voltage except for the lower part of the electrode on one main surface side in the solar cell element according to claim 1 and the conventional solar cell element.
FIG. 4 is a diagram showing the relationship between the sheet resistance at the lower part of the electrode on the one main surface side and the open circuit voltage in the solar cell element according to claim 1;
FIG. 5 is a diagram showing a structure of a conventional solar cell element.
FIG. 6 is a diagram showing a conventional method for manufacturing a solar cell element.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1; Silicon substrate, 1a; Low concentration diffusion layer, 1b; Fine unevenness, 1c; High concentration diffusion region, 1d; Separation part, 2; Antireflection film, 3; Front electrode, 4: Back electrode, 4a; Part, 4b; current collecting part, 5; solder layer

Claims (4)

シリコン基板の一主面側にシート抵抗が10〜40Ω/□となる高濃度拡散領域を形成する工程と、
この高濃度拡散領域の電極下部に当たる部分をマスクで保護する工程と、
このマスクで保護された領域以外の高濃度拡散領域をドライエッチング法で微細な突起を形成しつつ除去する工程と、
シリコン基板の一主面側で前記微細な突起が形成された領域にシート抵抗が60〜300Ω/□となる低濃度拡散領域を形成する工程と、
前記マスクが除去された前記高濃度拡散領域の上に前記電極を形成する工程と、を含むことを特徴とする太陽電池素子の製造方法。
Forming a high concentration diffusion region having a sheet resistance of 10 to 40Ω / □ on one main surface side of the silicon substrate;
A step of protecting a portion corresponding to the lower part of the electrode of the high concentration diffusion region with a mask;
Removing a high concentration diffusion region other than the region protected by this mask while forming fine protrusions by a dry etching method;
Forming a low-concentration diffusion region having a sheet resistance of 60 to 300 Ω / □ in the region where the fine protrusions are formed on one main surface side of the silicon substrate;
Forming the electrode on the high-concentration diffusion region from which the mask has been removed, and a method for manufacturing a solar cell element.
耐プラズマ性レジストをスクリーン印刷することによって前記マスクを形成することを特徴とする請求項に記載の太陽電池素子の製造方法。The method for manufacturing a solar cell element according to claim 1 , wherein the mask is formed by screen printing a plasma resistant resist. 前記マスクとして金属マスクを用いることを特徴とする請求項に記載の太陽電池素子の製造方法。The method for manufacturing a solar cell element according to claim 1 , wherein a metal mask is used as the mask. 前記ドライエッチング法が反応性イオンエッチング法であることを特徴とする請求項1乃至3のいずれかに記載の太陽電池素子の製造方法。Method of manufacturing a solar cell device according to any one of claims 1 to 3, wherein the dry etching method is reactive ion etching.
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